Patents by Inventor Koji Adachi
Koji Adachi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20100123285Abstract: A medium transport device includes a sensor unit, a timing data collection unit, and a sampling resolution changing unit. The sensor unit is provided in a transport path of a print recording medium to detect a transport timing of the print recording medium. A timing data collection unit receives an output from the sensor unit and samples the output at a sampling interval as timing data. A sampling resolution changing unit changes the sampling interval.Type: ApplicationFiled: September 2, 2009Publication date: May 20, 2010Applicant: FUJI XEROX CO., LTD.Inventors: Kaoru Yasukawa, Koji Adachi, Norikazu Yamada, Koki Uwatoko, Tetsuichi Satonaga, Shigehiro Furukawa
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Publication number: 20100082945Abstract: A multi-thread processor in accordance with an exemplary aspect of the present invention includes a plurality of hardware threads each of which generates an independent instruction flow, a thread scheduler that outputs a thread selection signal TSEL designating a hardware thread to be executed in a next execution cycle, a first selector that outputs an instruction generated by a hardware thread selected according to the thread selection signal, and an execution pipeline that executes an instruction output from the first selector, wherein the thread scheduler specifies execution of at least one hardware thread selected in a fixed manner in a predetermined first execution period, and specifies execution of an arbitrary hardware thread in a second execution period.Type: ApplicationFiled: September 28, 2009Publication date: April 1, 2010Applicant: NEC Electronics CorporationInventors: Koji Adachi, Kazunori Miyamoto
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Publication number: 20100083267Abstract: A multi-thread processor in accordance with an exemplary aspect of the present invention includes a plurality of hardware threads each of which generates an independent instruction flow, a first thread scheduler that outputs a first thread selection signal designating a hardware thread to be executed in the next execution cycle, a first selector that outputs an instruction generated by the selected hardware thread according to the first thread selection signal, and an execution pipeline that executes an instruction output from the first selector, wherein whenever a hardware thread is executed in the execution pipeline, the first thread scheduler updates the priority rank of the executed hardware thread and outputs the first thread selection signal in accordance with the updated priority rank.Type: ApplicationFiled: September 28, 2009Publication date: April 1, 2010Applicant: NEC ELECTRONICS CORPORATIONInventors: Koji Adachi, Teppei Oomoto
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Publication number: 20100082867Abstract: A first exemplary aspect of an embodiment of the present invention is a multi-thread processor including a plurality of hardware threads each of which generates an independent instruction flow, and an interrupt controller that determines whether or not an input interrupt request signal is associated with one or more than one of the plurality of hardware threads, and when the input interrupt request signal is associated, assigns the interrupt request to an associated hardware thread.Type: ApplicationFiled: September 25, 2009Publication date: April 1, 2010Applicant: NEC Electronics CorporationInventors: Koji Adachi, Kazunori Miyamoto
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Publication number: 20100082944Abstract: In an exemplary aspect, the present invention provides a multi-thread processor including a plurality of hardware threads each of which generates an independent instruction flow, a thread scheduler that outputs a thread selection signal in accordance with a first or second schedule, the thread selection signal designating a hardware thread to be executed in a next execution cycle among the plurality of hardware threads, a first selector that selects one of the plurality of hardware threads according to the thread selection signal and outputs an instruction generated by the selected hardware thread, and an execution pipeline that executes an instruction output from the first selector, wherein when the multi-thread processor is in a first state, the thread scheduler selects the first schedule, and when the multi-thread processor is in a second state, the thread scheduler selects the second schedule.Type: ApplicationFiled: September 23, 2009Publication date: April 1, 2010Applicant: NEC ELECTRONICS CORPORATIONInventors: Koji Adachi, Toshiyuki Matsunaga
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Publication number: 20100053671Abstract: An image formation apparatus, which includes: a detector unit that detects a status of consumables; a prediction unit that predicts a run-out timing of the consumables on the basis of the status detected by the detector unit; a transmission unit that transmits the status detected by the detector unit to a management apparatus as consumables information; a reception unit that receives run-out timing information indicating a run-out timing predicted by the management apparatus on the basis of the consumables information transmitted by the transmission unit; and a notification unit that notifies the run-out timing of the consumables on the basis of the run-out timing information received by the reception unit if communication with the management apparatus is possible, or notifies the run-out timing of the consumables on the basis of the run-out timing predicted by the prediction unit if communication with the management apparatus is not possible.Type: ApplicationFiled: June 12, 2009Publication date: March 4, 2010Applicant: FUJI XEROX CO., LTD.Inventors: Akiko SETA, Noriyuki MATSUDA, Masayasu TAKANO, Koji ADACHI, Kaoru YASUKAWA, Tetsuichi SATONAGA
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Patent number: 7489881Abstract: A failure prevention diagnosis support system includes: an acquiring portion that acquires internal information about an internal state of an image forming apparatus; a storage portion that stores one or a plurality of logistic regression models that define an estimate value of a regression coefficient through a logistic regression analysis using the internal information obtained when the image forming apparatus is in a failed state and in a normal state; and a controller that performs a control operation to select a logistic regression model from the one or the plurality of the logistic regression models stored in the storage portion in accordance with the image forming apparatus, and to calculate risk degrees as objective variables that are indicators of failure degrees in the image forming apparatus by assigning the internal information acquired by the acquiring portion or the value obtained from the internal information to the selected logistic regression model.Type: GrantFiled: December 28, 2006Date of Patent: February 10, 2009Assignee: Fuji Xerox Co., Ltd.Inventors: Kaoru Yasukawa, Koji Adachi, Koki Uwatoko, Tetsuichi Satonaga, Norikazu Yamada, Eigo Nakagawa
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Patent number: 7403870Abstract: A trouble sensing device has a first unit and a second unit. The first unit determines a total sum of driving current of two or more of a plurality of driving mechanisms that are turned on. The second unit judges whether trouble has arisen based on the total sum of the driving current.Type: GrantFiled: October 4, 2005Date of Patent: July 22, 2008Assignee: Fuji Xerox Co., Ltd.Inventors: Kaoru Yasukawa, Koji Adachi, Norikazu Yamada, Koki Uwatoko, Eigo Nakagawa, Tetsuichi Satonaga
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Patent number: 7324909Abstract: A fault diagnosis section activates a driving component alone, measures an operation state signal and a paper passage time, and stores feature values (Vm, ?v, Tqs, ?ts) extracted as a determination reference in a storage medium. A paper passage fault determination section determines whether or not a fault has arisen on the basis of the paper passage time when an apparatus is under normal operating conditions. A diagnosis target block determination section determines an order to operate a detail fault diagnosis when it is determined that there is a plurality of diagnosis target blocks.Type: GrantFiled: December 27, 2006Date of Patent: January 29, 2008Assignee: Fuji Xerox Co., Ltd.Inventors: Kaoru Yasukawa, Koji Adachi, Eigo Nakagawa, Tetsuichi Satonaga, Norikazu Yamada, Koki Uwatoko
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Publication number: 20070280706Abstract: A failure prevention diagnosis support system includes: an acquiring portion that acquires internal information about an internal state of an image forming apparatus; a storage portion that stores one or a plurality of logistic regression models that define an estimate value of a regression coefficient through a logistic regression analysis using the internal information obtained when the image forming apparatus is in a failed state and in a normal state; and a controller that performs a control operation to select a logistic regression model from the one or the plurality of the logistic regression models stored in the storage portion in accordance with the image forming apparatus, and to calculate risk degrees as objective variables that are indicators of failure degrees in the image forming apparatus by assigning the internal information acquired by the acquiring portion or the value obtained from the internal information to the selected logistic regression model.Type: ApplicationFiled: December 28, 2006Publication date: December 6, 2007Applicant: FUJI XEROX CO., LTD.Inventors: Kaoru Yasukawa, Koji Adachi, Koki Uwatoko, Tetsuichi Satonaga, Norikazu Yamada, Eigo Nakagawa
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Publication number: 20070237399Abstract: A failure analysis system includes an obtaining portion that obtains read-in image information that is image information obtained by reading an output image, a memory that stores fundamental image reduction information that is information in which an information amount of fundamental image information is reduced, the fundamental image information serving as a fundamental of the output image, a calculating portion that calculates a characteristic value of a projecting waveform by use of differential information between read-in image reduction information and the fundamental image reduction information, the read-in image reduction information being information in which the information amount of the read-in image information obtained by the obtaining portion is reduced, the fundamental image reduction information being stored in the memory; and a determining portion that determines a defect type group that is a group of defect types of elements included in the output image by use of a clustering process.Type: ApplicationFiled: January 12, 2007Publication date: October 11, 2007Applicant: FUJI XEROX CO., LTD.Inventors: Tetsuichi Satonaga, Koki Uwatoko, Koji Adachi, Kaoru Yasukawa
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Patent number: 7275009Abstract: A fault diagnosis section activates a driving component alone, measures an operation state signal and a paper passage time, and stores feature values (Vm, ?v, Tqs, ?ts) extracted as a determination reference in a storage medium. A paper passage fault determination section determines whether or not a fault has arisen on the basis of the paper passage time when an apparatus is under normal operating conditions. A diagnosis target block determination section determines an order to operate a detail fault diagnosis when it is determined that there is a plurality of diagnosis target blocks.Type: GrantFiled: April 20, 2006Date of Patent: September 25, 2007Assignee: Fuji Xerox Co., Ltd.Inventors: Kaoru Yasukawa, Koji Adachi, Eigo Nakagawa, Tetsuichi Satonaga, Norikazu Yamada, Koki Uwatoko
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Patent number: 7250781Abstract: A circuit board inspection device for inspecting the operation of a circuit board having a predetermined part or wire formed therein includes a supporting substrate disposed substantially in parallel with the parts mounting surface of the circuit board, and a signal change detection unit made of a coil or a capacitor disposed in a position of the supporting substrate corresponding to the part or wire of the circuit board, with the supporting substrate being disposed substantially in parallel with the circuit board.Type: GrantFiled: November 26, 2003Date of Patent: July 31, 2007Assignee: Fuji Xerox Co., Ltd.Inventors: Eigo Nakagawa, Koji Adachi, Kaoru Yasukawa, Norikazu Yamada, Koki Uwatoko, Tetsuichi Satonaga
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Patent number: 7239738Abstract: An image defect inspecting apparatus of the present invention includes a template image producing section for producing a template image from reference image data, a corresponding image extracting section for extracting a predetermined image located at a position corresponding to a template image from digital data of a scanned image for inspection, data embedding sections for embedding desired same pattern data into the template image and the image extracted by the corresponding image extracting section, a normalized correlation value calculation processing unit for acquiring a normalized correlation coefficient from the template image and the extracted image, into which the pattern data is embedded, and a defect judging section for judging as to whether a defect is present by comparing the normalized correlation coefficient acquired by the normalized correlation value calculation processing unit with a predetermined threshold value so as to acquire a large/small relationship thereof.Type: GrantFiled: March 4, 2003Date of Patent: July 3, 2007Assignee: Fuji Xerox Co., Ltd.Inventors: Kaoru Yasukawa, Koji Adachi, Norikazu Yamada, Eigo Nakagawa, Koki Uwatoko, Tetsuichi Satonaga
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Publication number: 20070113692Abstract: A fault diagnosis section activates a driving component alone, measures an operation state signal and a paper passage time, and stores feature values (Vm, ?v, Tqs, ?ts) extracted as a determination reference in a storage medium. A paper passage fault determination section determines whether or not a fault has arisen on the basis of the paper passage time when an apparatus is under normal operating conditions. A diagnosis target block determination section determines an order to operate a detail fault diagnosis when it is determined that there is a plurality of diagnosis target blocks.Type: ApplicationFiled: December 27, 2006Publication date: May 24, 2007Applicant: FUJI XEROX CO., LTD.Inventors: Kaoru Yasukawa, Koji Adachi, Eigo Nakagawa, Tetsuichi Satonaga, Norikazu Yamada, Koki Uwatoko
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Patent number: 7174264Abstract: A fault diagnosis section activates a driving component alone, measures an operation state signal and a paper passage time, and stores feature values (Vm, ov, Tqs, ots) extracted as a determination reference in a storage medium. A paper passage fault determination section determines whether or not a fault has arisen on the basis of the paper passage time when an apparatus is under normal operating conditions. A diagnosis target block determination section determines an order to operate a detail fault diagnosis when it is determined that there is a plurality of diagnosis target blocks.Type: GrantFiled: July 13, 2004Date of Patent: February 6, 2007Assignee: Fuji Xerox Co., Ltd.Inventors: Kaoru Yasukawa, Koji Adachi, Eigo Nakagawa, Tetsuichi Satonaga, Norikazu Yamada, Koki Uwatoko
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Publication number: 20060253654Abstract: A memory transfer routine detection unit detects a combination of instructions indicating a data transfer process in a data cache by checking instruction codes and operand codes of a sequence of instructions stored in an instruction buffer. A combination of instructions representing a data transfer process in a data cache detected by the memory transfer routine detection unit are allocated to a memory transfer unit for execution.Type: ApplicationFiled: April 18, 2006Publication date: November 9, 2006Applicant: NEC ELECTRONICS CORPORATIONInventor: Koji Adachi
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Publication number: 20060226846Abstract: A trouble sensing device has a first unit and a second unit. The first unit determines total sum of driving current of a plurality of driving mechanisms. The second unit judges whether trouble has arisen based on the total sum of the driving current.Type: ApplicationFiled: October 4, 2005Publication date: October 12, 2006Applicant: FUJI XEROX CO., LTD.Inventors: Kaoru Yasukawa, Koji Adachi, Norikazu Yamada, Koki Uwatoko, Eigo Nakagawa, Tetsuichi Satonaga
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Publication number: 20060207355Abstract: A fault diagnosis section activates a driving compornent alone, measures an operation state signal and a paper passage time, and stores feature values (Vm, ?v, Tqs, ?ts) extracted as a determination reference in a storage medium. A paper passage fault determination section determines whether or not a fault has arisen on the basis of the paper passage time when an apparatus is under normal operating conditions. A diagnosis target block determination section determines an order to operate a detail fault diagnosis when it is determined that there is a plurality of diagnosis target blocks.Type: ApplicationFiled: April 20, 2006Publication date: September 21, 2006Applicant: FUJI XEROX CO., LTD.Inventors: Kaoru Yasukawa, Koji Adachi, Eigo Nakagawa, Tetsuichi Satonaga, Norikazu Yamada, Koki Uwatoko
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Patent number: 7004827Abstract: A carrier has openings for holding workpieces during polishing. Upper and lower polishing pads push against upper and lower surfaces of the workpieces, respectively. A ring is provided within the openings. This ring surrounds the workpieces, and prevents or reduces roll-off.Type: GrantFiled: February 12, 2004Date of Patent: February 28, 2006Assignee: Komag, Inc.Inventors: Shoji Suzuki, Koji Adachi, Richard Shigetoshi Mori