Abstract: A multilayer conductive wire is formed of a plurality of conductive layers stacked upon each other, and has a slit shaped groove extending in the direction intersecting the direction of stress in at least one conductive layer. With the groove mating with a protrusion in another conductive layer or a protrusion in an insulating film layer, a sliding phenomenon between the layers due to the stress can be restrained, so that a multilayer conductive wire free from destruction due to the sliding phenomenon caused by the stress and without losing conductivity can be provided.

Abstract: A semiconductor device capable of effectively preventing a dielectric breakdown of a gate oxide film without adversely affecting the characteristics of a transistor and a process of manufacturing the same are disclosed. The semiconductor device comprises a SOI film 2 whose upper angular parts are rounded off by sputter etching and a gate oxide film 3 formed on SOI film 2 with an almost uniform thickness. Therefore, electric field concentration in the upper angular parts of SOI film 2 is reduced. Furthermore, the control characteristics of the transistor are enhanced by the uniform gate oxide film 3. As a result, a dielectric breakdown of the gate oxide film is effectively prevented without adversely affecting the characteristics of the transistor. Sputter etching enabling processing at a low temperature is used, so that the upper angular parts of SOI film 2 are rounded off without adversely affecting a semiconductor element formed in the lower layer.

Abstract: A semiconductor device is provided which includes a conductive layer, an insulating film formed on the surface of the conductive layer, and a conductive metal interconnection layer formed on the insulating film and electrically connected to the conductive layer through a contact hole formed in a predetermined position of the insulating film. The conductive metal interconnection and the surface of the conductive layer are directly joined together and a silicon layer including a single crystal or polycrystalline silicon having a grain size of at least about 10 .mu.m is interposed between the conductive metal interconnection layer and the insulating film. The conductive metal interconnection layer becomes a single crystal or a polycrystal having a grain size of about 10 .mu.m or above under the influence of the crystalline properties of the underlying crystal of the silicon layer.

Abstract: A wiring connection structure for a semiconductor integrated circuit device interconnects a plurality of wiring layers isolated by an insulating layer, via a through hole defined in the insulating layer. The wiring connection structure comprises a semiconductor substrate, a first insulating layer, a first wiring layer, a second insulating layer and a second wiring layer. The first insulating layer is formed on a main surface of the semiconductor substrate. The first wiring layer is formed on the first insulating layer. The second insulating layer is formed on the first wiring layer. The through hole is formed in the second insulating layer so as to extend to a surface of the first wiring layer. The second wiring layer is formed on the second insulating layer and connected to the first wiring layer via the through hole. The through hole is a single through hole formed in a region where the second wiring layer overlaps with the first wiring layer.

Abstract: Two or three trenches are formed in a silicon substrate, and a conductive layer is formed in the silicon substrate facing the trenches. An oxide film for insulation is formed on a surface of the conductive layer facing the trenches. The trenches are filled with polysilicon, and the conductive layer and the polysilicon constitute a capacitor through the oxide film. Since this capacitor has two or three trenches, an effective area sufficiently large for increasing a capacitance value of the capacitor can be obtained without increasing the plane area of the device. The conductive layer and the polysilicon are connected to aluminum interconnection layers through a silicide layer, so as to be connected to other integrated circuits.

Abstract: Two or three trenches are formed in a silicon substrate, and a conductive layer is formed in the silicon substrate facing the trenches. An oxide film for insulation is formed on a surface of the conductive layer facing the trenches. The trenches are filled with polysilicon, and the conductive layer and the polysilicon constitute a capacitor through the oxide film. Since this capacitor has two or three trenches, an effective area sufficiently large for increasing a capacitance value of the capacitor can be obtained without increasing the plane area of the device. The conductive layer and the polysilicon are connected to aluminum interconnection layers through a silicide layer, so as to be connected to other integrated circuits.