Patents by Inventor Koji Kitamura

Koji Kitamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9779844
    Abstract: To provide a containment cask for storage or transport of radioactive material, without employing a homogenization treatment. Pouring a molten lead between an inner shell 2 and an intermediate shell 3 to serve as a gamma ray shielding material, allowing the lead to cool, and subsequently, filling either one or both of a first void layer 9a formed at a boundary between the inner shell 2 and the poured lead 5a or a second void layer 9b formed at a boundary between the intermediate shell 3 and the poured lead 5a, using a low melting point metal 10 in a closely adhering state. To provide the cask 1 with a good heat-dissipating effect, by filling the void layers 9a, 9b that prevent the cask 1 from dissipating heat, with the low melting point metal 10 that has a superb thermal conductivity.
    Type: Grant
    Filed: June 3, 2016
    Date of Patent: October 3, 2017
    Assignee: HITACHI ZOSEN CORPORATION
    Inventors: Hiroaki Arai, Satoshi Ashida, Koji Kitamura, Jyun Okada, Toki Ma
  • Publication number: 20170090228
    Abstract: A display device includes a substrate and a seal. The seal is provided in a first frame region and a second frame region when seen in a plan view. A spacer is formed from a first end of the substrate to a second end of the substrate on the opposite side of the first end at a boundary between the first frame region and the second frame region. Further, the spacer is in contact with the seal on the first frame region side and on the second frame region side.
    Type: Application
    Filed: September 20, 2016
    Publication date: March 30, 2017
    Applicant: Japan Display Inc.
    Inventors: Tomokazu ISHIKAWA, Masahiko NAKAMURA, Masayuki MURAKAMI, Koji KITAMURA, Daisuke ITO
  • Publication number: 20160284431
    Abstract: To provide a containment cask for storage or transport of radioactive material, without employing a homogenization treatment. Pouring a molten lead between an inner shell 2 and an intermediate shell 3 to serve as a gamma ray shielding material, allowing the lead to cool, and subsequently, filling either one or both of a first void layer 9a formed at a boundary between the inner shell 2 and the poured lead 5a or a second void layer 9b formed at a boundary between the intermediate shell 3 and the poured lead 5a, using a low melting point metal 10 in a closely adhering state. To provide the cask 1 with a good heat-dissipating effect, by filling the void layers 9a, 9b that prevent the cask 1 from dissipating heat, with the low melting point metal 10 that has a superb thermal conductivity.
    Type: Application
    Filed: June 3, 2016
    Publication date: September 29, 2016
    Inventors: Hiroaki ARAI, Satoshi ASHIDA, Koji KITAMURA, Jyun OKADA, Toki MA
  • Publication number: 20140193202
    Abstract: To make it possible to raise a door body even if it is damaged by an impact of vehicle traffic or falling objects when it is in a lowered state, and to keep the door body in a raised state even if it is damaged by a water pressure of a tsunami or a high tide when it is in a raised state. A door body 2 of a floating flap gate 1 is disposed at an opening or at an access way. When water flows in, a forward end 2b of which swings upwards, in a direction in which the water flows in and within a plane in a height direction, around a base end 2a thereof which serves as a center of rotation, to block the opening or the access way. The door body 2 is formed from a hard polyurethane foam 4 in the form of a sheet.
    Type: Application
    Filed: June 5, 2012
    Publication date: July 10, 2014
    Applicant: HITACHI ZOSEN CORPORATION
    Inventors: Hiroaki Arai, Hideyuki Niizato, Koji Kitamura, Jun Okada, Satoshi Ashida, Kyouichi Nakayasu, Yoshito Yamakawa
  • Patent number: 8598879
    Abstract: A magnetic resonance diagnostic apparatus is configured in such a manner that: a high-frequency transmission coil transmits a high-frequency electromagnetic wave at a magnetic resonance frequency to an examined subject; a heating coil performs a heating process by radiating a high-frequency electromagnetic wave onto the examined subject at a frequency different from the magnetic resonance frequency; based on a magnetic resonance signal, a measuring unit measures the temperature of the examined subject changing due to the high-frequency electromagnetic wave radiated by the heating coil; and a control unit exercises control so that the measuring unit measures the temperature while the heating coil is performing the heating process, by ensuring that the transmission of the high-frequency electromagnetic wave by the high-frequency transmission coil and the radiation of the high-frequency electromagnetic wave by the heating coil are performed in parallel.
    Type: Grant
    Filed: May 16, 2011
    Date of Patent: December 3, 2013
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Medical Systems Corporation
    Inventors: Yoshitomo Sakakura, Satoshi Sugiura, Tomoyuki Yoshida, Takashi Yanashima, Masateru Iwasa, Yutaka Kato, Koji Kitamura, Kazuto Nogami, Hidekazu Tanaka, Makoto Sato, Shigehide Kuhara, Taketo Kawakami, Yasutake Yasuhara, Hiroshi Sugimoto
  • Publication number: 20110279116
    Abstract: A magnetic resonance diagnostic apparatus is configured in such a manner that: a high-frequency transmission coil transmits a high-frequency electromagnetic wave at a magnetic resonance frequency to an examined subject; a heating coil performs a heating process by radiating a high-frequency electromagnetic wave onto the examined subject at a frequency different from the magnetic resonance frequency; based on a magnetic resonance signal, a measuring unit measures the temperature of the examined subject changing due to the high-frequency electromagnetic wave radiated by the heating coil; and a control unit exercises control so that the measuring unit measures the temperature while the heating coil is performing the heating process, by ensuring that the transmission of the high-frequency electromagnetic wave by the high-frequency transmission coil and the radiation of the high-frequency electromagnetic wave by the heating coil are performed in parallel.
    Type: Application
    Filed: May 16, 2011
    Publication date: November 17, 2011
    Inventors: Yoshitomo Sakakura, Satoshi Sugiura, Tomoyuki Yoshida, Takashi Yanashima, Masateru Iwasa, Yutaka Kato, Koji Kitamura, Kazuto Nogami, Hidekazu Tanaka, Makoto Sato, Shigehide Kuhara, Taketo Kawakami, Yasutake Yasuhara, Hiroshi Sugimoto
  • Patent number: 7511981
    Abstract: A non-volatile memory device according to one embodiment comprises a plurality of memory cells each comprising a magneto resistive element and a selection transistor; wherein at least some of the memory cells are arranged into a two dimensional array; a first interconnect line extending in a first direction of the memory array and functioning as a gate electrode of a selection transistor included in each memory cell; a second interconnect line extending in the first direction of the memory array; a third interconnect line extending in a second direction; wherein the magneto resistive element of at least some of the memory cells is sandwiched between the second and third interconnect lines, wherein the second interconnect line extends at least partially along all magneto resistive elements in a particular one of the memory cells.
    Type: Grant
    Filed: October 22, 2007
    Date of Patent: March 31, 2009
    Assignee: International Business Machines Corporation
    Inventors: Hideo Asano, Koji Kitamura, Hisatada Miyatake, Kohki Noda, Toshio Sunaga, Hiroshi Umezaki
  • Patent number: 7474557
    Abstract: A magnetic random access memory (MRAM) array is disclosed herein in which a plurality of wordlines and a plurality of bitlines are provided in matrix form, the wordlines including read wordlines and write wordlines, and memory elements are provided at the intersections of the wordlines and the bitlines, memory elements, respectively, including at least a ferromagnetic layer having a magnetization direction determined by the orientation of a magnetic field generated by an electric current passing through the bitline, and a read wordline driver connected to the memory array adapted to provide a first read signal to a first read wordline of a plurality of read wordlines, wherein a second read signal is provided to activate a second read wordline while the first read wordline remains activated.
    Type: Grant
    Filed: April 26, 2002
    Date of Patent: January 6, 2009
    Assignee: International Business Machines Corporation
    Inventors: Toshio Sunaga, Hisatada Miyatake, Koji Kitamura
  • Patent number: 7434752
    Abstract: A fuel injection valve is provided that includes a valve seat member (3) having provided therein a conical valve seat (8) and a valve seat hole (7) communicating with the downstream end of the valve seat (8), a flat fuel diffusion chamber (43) radially extending from the valve seat hole (7), the fuel diffusion chamber (43) being formed between the valve seat member (3) and an injector plate (10), and a plurality of fuel injection holes (11) bored in the injector plate (10) so as to open in the fuel diffusion chamber (43), wherein the fuel injection holes (11) are arranged so as to be radially outwardly separated from the valve seat hole (7), and when the height of the fuel diffusion chamber (43) is t1 and the length of the valve seat hole (7) is t2, t2/t1?2.
    Type: Grant
    Filed: October 5, 2004
    Date of Patent: October 14, 2008
    Assignee: Keihin Corporation
    Inventors: Eishi Matsumoto, Koji Kitamura, Gaku Sato
  • Publication number: 20080094882
    Abstract: A non-volatile memory device according to one embodiment comprises a plurality of memory cells each comprising a magneto resistive element and a selection transistor; wherein at least some of the memory cells are arranged into a two dimensional array; a first interconnect line extending in a first direction of the memory array and functioning as a gate electrode of a selection transistor included in each memory cell; a second interconnect line extending in the first direction of the memory array; a third interconnect line extending in a second direction; wherein the magneto resistive element of at least some of the memory cells is sandwiched between the second and third interconnect lines, wherein the second interconnect line extends at least partially along all magneto resistive elements in a particular one of the memory cells.
    Type: Application
    Filed: October 22, 2007
    Publication date: April 24, 2008
    Inventors: Hideo Asano, Koji Kitamura, Hisatada Miyatake, Kohki Noda, Toshio Sunaga, Hiroshi Umezaki
  • Patent number: 7349235
    Abstract: A non-volatile memory device according to one embodiment includes a plurality of memory cells each comprising a magneto resistive element and a selection transistor, where the memory cells are arranged into a two dimensional array. A first interconnect line extends in a first direction of the memory array and functions as a gate electrode of a selection transistor included in each memory cell. A second interconnect line extends in the first direction of the memory array. A third interconnect line extends in a second direction. The magneto resistive element of at least some of the memory cells is sandwiched between the second and third interconnect lines.
    Type: Grant
    Filed: May 4, 2006
    Date of Patent: March 25, 2008
    Assignee: International Business Machines Corporation
    Inventors: Hisatada Miyatake, Kohki Noda, Toshio Sunaga, Hiroshi Umezaki, Hideo Asano, Koji Kitamura
  • Publication number: 20070262176
    Abstract: A fuel injection valve is provided that includes a valve seat member (3) having provided therein a conical valve seat (8) and a valve seat hole (7) communicating with the downstream end of the valve seat (8), a flat fuel diffusion chamber (43) radially extending from the valve seat hole (7), the fuel diffusion chamber (43) being formed between the valve seat member (3) and an injector plate (10), and a plurality of fuel injection holes (11) bored in the injector plate (10) so as to open in the fuel diffusion chamber (43), wherein the fuel injection holes (11) are arranged so as to be radially outwardly separated from the valve seat hole (7), and when the height of the fuel diffusion chamber (43) is t1 and the length of the valve seat hole (7) is t2, t2/t1?2.
    Type: Application
    Filed: October 5, 2004
    Publication date: November 15, 2007
    Inventors: Eishi Matsumoto, Koji Kitamura, Gaku Sato
  • Patent number: 7123498
    Abstract: MRAM has read word lines WLR and write word line WLW extending in the y direction, write/read bit line BLW/R and write bit line BLW extending in the x direction, and the memory cells MC disposed at the points of the intersection of these lines. The memory MC includes sub-cells SC1 and SC2. The sub-cell SC1 includes magneto resistive elements MTJ1 and MTJ2 and a selection transistor Tr1, and the sub-cell SC2 includes magneto resistive elements MTJ3 and MTJ4 and a selection transistor Tr2. The magneto resistive elements MTJ1 and MTJ2 are connected in parallel, and the magneto resistive elements MTJ3 and MTJ4 are also connected in parallel. Further, the sub-cells SC1 and SC2 are connected in series between the write/read bit line BLW/R and the ground.
    Type: Grant
    Filed: October 12, 2004
    Date of Patent: October 17, 2006
    Assignee: International Business Machines Corporation
    Inventors: Hisatada Miyatake, Kohki Noda, Toshio Sunaga, Hiroshi Umezaki, Hideo Asano, Koji Kitamura
  • Publication number: 20060227600
    Abstract: A non-volatile memory device according to one embodiment includes a plurality of memory cells each comprising a magneto resistive element and a selection transistor, where the memory cells are arranged into a two dimensional array. A first interconnect line extends in a first direction of the memory array and functions as a gate electrode of a selection transistor included in each memory cell. A second interconnect line extends in the first direction of the memory array. A third interconnect line extends in a second direction.
    Type: Application
    Filed: May 4, 2006
    Publication date: October 12, 2006
    Inventors: Hisatada Miyatake, Kohki Noda, Toshio Sunaga, Hiroshi Umezaki, Hideo Asano, Koji Kitamura
  • Patent number: 7065332
    Abstract: A remote control receiving circuit for receiving a remote control signal from a transmitter includes a header interrupt generation circuit that outputs a header interrupt signal when detecting the header of the signal, a data interrupt generation circuit that outputs a data interrupt signal when the header has been detected and the predetermined data receiving is completed, and a switch that selects the header interrupt signal or data interrupt signal in accordance with an instruction of the CPU. A CPU has one interrupt port for receiving the interrupt signal selected by the switch, and performs control in accordance with the received interrupt signal. Therefore, a remote control receiving system can reduce the codes, processing power, and resources of the CPU, which are used to implement the remote control signal receiving function, and reduce the cost of the entire system.
    Type: Grant
    Filed: August 8, 2003
    Date of Patent: June 20, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yasuyuki Tomida, Hironobu Mori, Koji Kitamura
  • Publication number: 20050117045
    Abstract: An image capturing system, image processing system, and camera in which color can be precisely corrected to realize invariability of color through simple calibration while decreasing the area of a reference image part. The system comprises a camera having a lens, an image capturing system device, and a reflecting surface. Reference signal values (rn, gn, bn) are determined by averaging the intensities of the reflected lights of a reference scene received by the image capturing system device from the respective color channels of a plurality of pixel parts. The reference signal values represent the light source color, and a main image is corrected using the reference signal values.
    Type: Application
    Filed: September 4, 2001
    Publication date: June 2, 2005
    Inventors: Mohamed Abdellatif, Koji Kitamura
  • Publication number: 20050073897
    Abstract: MRAM has read word lines WLR and write word line WLW extending in the y direction, write/read bit line BLW/R and write bit line BLW extending in the x direction, and the memory cells MC disposed at the points of the intersection of these lines. The memory MC includes sub-cells SC1 and SC2. The sub-cell SC1 includes magneto resistive elements MTJ1 and MTJ2 and a selection transistor Tr1, and the sub-cell SC2 includes magneto resistive elements MTJ3 and MTJ4 and a selection transistor Tr2. The magneto resistive elements MTJ1 and MTJ2 are connected in parallel, and the magneto resistive elements MTJ3 and MTJ4 are also connected in parallel. Further, the sub-cells SC1 and SC2 are connected in series between the write/read bit line BLW/R and the ground.
    Type: Application
    Filed: October 12, 2004
    Publication date: April 7, 2005
    Inventors: Hisatada Miyatake, Kohki Noda, Toshio Sunaga, Hiroshi Umezaki, Hideo Asano, Koji Kitamura
  • Patent number: 6826076
    Abstract: MRAM has read word lines WLR and write word line WLW extending in the y direction, write/read bit line BLW/R and write bit line BLW extending in the x direction, and the memory cells MC disposed at the points of the intersection of these lines. The memory MC includes sub-cells SC1 and SC2. The sub-cell SC1 includes magneto resistive elements MTJ1 and MTJ2 and a selection transistor Tr1, and the sub-cell SC2 includes magneto resistive elements MTJ3 and MTJ4 and a selection transistor Tr2. The magneto resistive elements MTJ1 and MTJ2 are connected in parallel, and the magneto resistive elements MTJ3 and MTJ4 are also connected in parallel. Further, the sub-cells SC1 and SC2 are connected in series between the write/read bit line BLW/R and the ground.
    Type: Grant
    Filed: January 24, 2002
    Date of Patent: November 30, 2004
    Assignee: International Business Machines Corporation
    Inventors: Hideo Asano, Koji Kitamura, Hisatada Miyatake, Kohki Noda, Toshio Sunaga, Hiroshi Umezaki
  • Patent number: 6785154
    Abstract: A magnetic random access memory (MRAM) circuit block and access method thereof are disclosed herein which includes a circuit for sensing a data write current passing through a bitline 32 and, for generating a stop signal for stopping a data write current supply to the bitline 32 and a write wordline 30 after data is written in an magnetic tunnel junction (MTJ) element 44. Further, when data to be written to the storage element is the same as the data already stored therein, no write current is supplied to the write wordline 30, thereby saving power.
    Type: Grant
    Filed: April 26, 2002
    Date of Patent: August 31, 2004
    Assignee: International Business Machines Corporation
    Inventors: Toshio Sunaga, Hisatada Miyatake, Koji Kitamura, Hideo Asano, Kohki Noda, Hiroshi Umezaki
  • Patent number: 6779743
    Abstract: In a fuel injection valve including a flat fuel diffusion chamber provided between a valve seat member and an injector plate to widen radially outwards from an outer end edge of a valve seat bore, an annular step is formed on a ceiling surface of the fuel diffusion chamber so that a level of the ceiling surface is gradually lowered radially outwards, and fuel injection orifices are disposed immediately below the step and at a distance from an inner peripheral wall of the fuel diffusion chamber. Thus, a fuel spread radially in the fuel diffusion chamber is allowed to collide with the annular step, leading to an enhancement in fuel diffusing effect, so that it is possible to further promote the atomization of the fuel injected from the fuel injection orifices and to form more stable fuel spray forms.
    Type: Grant
    Filed: June 19, 2003
    Date of Patent: August 24, 2004
    Assignee: Keihin Corporation
    Inventor: Koji Kitamura