Abstract: A searcher for a CDMA receiver apparatus includes a correlator obtaining a correlation value between a spreading code sequence and a spreading code sequence within a received signal, and a non-linear processor carrying out a non-linear conversion to convert one of the correlation value and a predetermined value indicative of the correlation value into correlation value information which has a data width smaller than that of the one of the correlation value and the predetermined value. The correlation value information is used to carry out a search process to search for a synchronizing timing with respect to the spreading code sequence within the received signal.

Abstract: A path search unit (1) detects the correlation between a received signal and a desired signal; (2) based on the correlation value, selects a plurality of paths over which the desired signal arrives; (3) if the difference between the detection time of the desired signal arriving via a path selected this time and the previous-time detection signal is within an allowable range, judges that the path selected this time is identical to a path previously allocated to prescribed finger units, and (4) if a path is identical, causes despreading and delay adjustment processing of the desired signal arriving over the selected path to be executed by the same finger unit as previously. A timing control unit calculates the difference between the detection time this time, over the identical path, and a reference time, and, based on the total of the time differences over the identical path, controls the timing lead/lag.

Abstract: By providing a interference power estimation unit obtaining the power of interference in a common pilot signal with ten symbols in one slot and outputting the power of interference as the estimate of the amount of interference in the data signal's pilot signal and a signal-to-interference power ratio calculation unit calculating a signal-to-interference power ratio (SIR) using an output of the interference power estimation unit, in a spread spectrum communication method, a correct SIR can be estimated even when the number of symbols of an individual pilot signal in the slot of the data channel is small.

Abstract: The present invention is directed to a path searching device and a CDMA receiver employing the same, having a reduced circuit scale and operating to carry out a smaller number of operations. For a direct spreading CDMA communication system, a CDMA receiver includes a reception demodulator including an antenna, a high-frequency amplifier a band-pass filter, demodulators, etc. The CDMA receiver also has despreading units, a determination unit, and a path search device. The path search device has a sampling unit for sampling an input signal by low-speed oversampling based on an integer multiple of a chip rate and by high-speed oversampling that is faster than the low-speed oversampling, a first circuit for finding a correlative value between a spreading code and a signal provided by the low-speed oversampling and finding timing corresponding to a maximum correlative value.

Abstract: Disclosed is a synchronization tracking circuit for synchronizing the phase of a despreading code sequence on a receiving side to the phase of a spreading code sequence on a transmitting side. The synchronization tracking circuit has a DLL circuit for performing synchronization tracking by DLL (Delay Locked Loop) control, and an interference-component estimation unit for estimating an interference component inflicted by another path upon a prescribed path of interest among multiple paths. The DLL circuit, which has an interference elimination unit, executes DLL control based upon a signal from which the interference component from the other path has been eliminated and causes the phase of the despreading code sequence on the receiving side to be synchronized with and track the phase of the spreading code on the transmitting side.

Abstract: A path search unit (1) detects the correlation between a received signal and a desired signal; (2) based on the correlation value, selects a plurality of paths over which the desired signal arrives; (3) if the difference between the detection time of the desired signal arriving via a path selected this time and the previous-time detection signal is within an allowable range, judges that the path selected this time is identical to a path previously allocated to prescribed finger units, and (4) if a path is identical, causes despreading and delay adjustment processing of the desired signal arriving over the selected path to be executed by the same finger unit as previously. A timing control unit calculates the difference between the detection time this time, over the identical path, and a reference time, and, based on the total of the time differences over the identical path, controls the timing lead/lag.

Abstract: A CDMA receiving apparatus receives a direct sequence CDMA signal produced through QPSK spreading modulation, performs coherent detection of the direct sequence CDMA signal, and despreads the signals, obtained through the coherent detection, through a despreading portion. The despreading portion comprises a selector portion. The selector portion selects signals as a demodulated and despread in-phase output signal and a demodulated and despread quadrature output signal, in accordance with despreading codes, from demodulated in-phase and quadrature signals obtained through the coherent detection, and an inverted in-phase and quadrature signals obtained as a result of the signs of the demodulated in-phase and quadrature signals being inverted.

Abstract: Disclosed is a spread-spectrum communication system that can increase an information transmission rate under conditions of a prescribed bandwidth and expansion ratio, and that can obtain chip timing and symbol timing synchronization characteristics comparable to those of a conventional spread-spectrum system. Using a delay element and a selector, a spreading code sequence for a Q-phase signal for quadrature modulation is phase-modulated with second information, whereas no phase modulation is applied to a spreading code sequence for an I-phase signal. At the receiving end, chip timing synchronization and code synchronization are performed for the I-phase signal.

Abstract: In an automatic gain control (AGC) circuit for controlling a preceding gain control unit and a following gain control unit, the AGC circuit according to the present invention includes at least a comparison unit, a first gain control signal output unit and a second gain control signal output unit. The comparison unit compares a signal level from the following gain control unit with a reference value. The first gain control signal output unit outputs a first gain control signal to the following gain control unit in response to an output signal obtained as a result of comparison in the comparison unit. The second gain control signal output unit outputs a second gain control signal to the preceding gain control unit. Further, the second gain control signal has a time constant longer than that of the first gain control signal output unit, in response to the output signal obtained as the result of comparison in the comparison unit.

Abstract: A clock signal regenerating circuit is provided for use in a receiver for receiving a burst signal or packet signal which is intermittently transmitted in digital radio communications, wherein a regenerated clock signal can be synchronized with a received signal having a short preamble. An edge extracting unit extracts an edge of the received signal and thereby detects synchronization timing involved in the received signal. A reference signal generating unit previously generates a plurality of quasi-reference signals having respective different phases and an identical frequency, and a selecting/outputting unit selects a quasi-reference signal having a phase closest to the synchronization timing involved in the received signal from among the quasi-reference signals, and outputs the selected signal as a clock signal for the receiver.

Abstract: An AFC method is used in a demodulator, which employs a 2.sup.n -phase phase shift keying modulation system, where n is an integer greater than or equal to two, to correct an error between a received carrier frequency and a local frequency. The AFC method includes the steps of (a) subjecting an intermediate frequency signal of a signal received by the demodulator to a quadrature wave detection to obtain I-axis and Q-axis signals, (b) converting amplitude information of the I-axis and Q-axis signals into phase information which includes frequency information, and (c) correcting the local frequency based on the frequency information included in the phase information.