Patents by Inventor Koji Ono

Koji Ono has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170037057
    Abstract: The present invention provides a fused heterocyclic compound that has CDK 8 and/or CDK 19 inhibitory activity. The present invention provides a compound represented by formula (I) (wherein the symbols are as defined in the description) or a salt thereof.
    Type: Application
    Filed: April 16, 2015
    Publication date: February 9, 2017
    Applicant: Takeda Pharmaceutical Company Limited
    Inventors: Masanori Okaniwa, Hiroshi BANNO, Takaharu HIRAYAMA, Douglas Robert CARY, Koji ONO, Naoki IWAMURA
  • Publication number: 20170015654
    Abstract: The present provides a pyridazine compound having an inhibiting effect on Stearoyl-CoA desaturase (SCD) (in particular, SCD1). The present provides a compound represented by formula (where each symbol is as defined as in the Specification) or a salt thereof.
    Type: Application
    Filed: March 11, 2015
    Publication date: January 19, 2017
    Inventors: Keisuke IMAMURA, Naoki TOMITA, Yoshiteru ITO, Koji ONO, Hironobu MAEZAKI, Noriyuki NII
  • Publication number: 20170002032
    Abstract: Disclosed are chemical entities which are compounds of formula (I): or pharmaceutically acceptable salts thereof; wherein Y, Ra, Ra?, Rb, Rc, X1, X2, X3, Rd, Z1, and Z2 have the values described herein and stereochemical configurations depicted at asterisked positions indicate absolute stereochemistry. Chemical entities according to the disclosure can be useful as inhibitors of Sumo Activating Enzyme (SAE). Further provided are pharmaceutical compositions comprising a compound of the disclosure and methods of using the compositions in the treatment of proliferative, inflammatory, cardiovascular, and neurodegenerative diseases or disorders.
    Type: Application
    Filed: June 30, 2015
    Publication date: January 5, 2017
    Applicant: MILLENNIUM PHARMACEUTICALS, INC.
    Inventors: Matthew O. Duffey, Dylan England, Scott Freeze, Zhigen Hu, Steven Langston, Charles McIntyre, Hirotake Mizutani, Koji Ono, He Xu
  • Patent number: 9343709
    Abstract: To provide a highly reliable light-emitting device and especially a light-emitting device which can be formed without use of a metal mask and includes a plurality of light-emitting elements. A structural body at least an end of which has an acute-angled shape is provided so that the end can pass downward through an electrically conductive film formed over the insulating layer and can be at least in contact with an insulating layer having elasticity, thereby physically separating the electrically conductive film, and the electrically conductive films are thus electrically insulated from each other. Such a structure may be provided between adjacent light-emitting elements so that the light-emitting elements can be electrically insulated from each other in the light-emitting device.
    Type: Grant
    Filed: August 15, 2014
    Date of Patent: May 17, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kensuke Yoshizumi, Koji Ono
  • Patent number: 9330940
    Abstract: There are provided a structure of a semiconductor device in which low power consumption is realized even in a case where a size of a display region is increased to be a large size screen and a manufacturing method thereof. A gate electrode in a pixel portion is formed as a three layered structure of a material film containing mainly W, a material film containing mainly Al, and a material film containing mainly Ti to reduce a wiring resistance. A wiring is etched using an IPC etching apparatus. The gate electrode has a taper shape and the width of a region which becomes the taper shape is set to be 1 ?m or more.
    Type: Grant
    Filed: May 23, 2014
    Date of Patent: May 3, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hideomi Suzawa, Yoshihiro Kusuyama, Koji Ono, Jun Koyama
  • Publication number: 20160099261
    Abstract: A metal wiring suitable for a substrate of large size is provided. The present invention is characterized in that at least one layer of conductive film is formed on an insulating surface, a resist pattern is formed on the conductive film, and the conductive film having the resist pattern is etched to form a metal wiring while controlling its taper angle ? in accordance with the bias power density, the ICP power density, the temperature of lower electrode, the pressure, the total flow rate of etching gas, or the ratio of oxygen or chlorine in etching gas. The thus formed metal wiring has less fluctuation in width or length and can satisfactorily deal with an increase in size of substrate.
    Type: Application
    Filed: October 2, 2015
    Publication date: April 7, 2016
    Applicant: Semiconductor Energy Laboratory Co., Ltd .
    Inventors: Koji Ono, Hideomi SUZAWA
  • Patent number: 9246133
    Abstract: One embodiment of the present invention relates to a light-emitting device comprising an insulating surface; a lower electrode over the insulating surface; a protrusion over the insulating surface having a sidewall sloping toward the lower electrode; a light-transmitting partition overlapping with an end portion of the lower electrode and the sidewall of the protrusion; and a light-emitting element including the lower electrode, an upper electrode overlapping with the lower electrode, and a layer containing a light-emitting organic compound between the lower electrode and the upper electrode. In the light-emitting device, the sidewall of the protrusion can reflect light emitted from the light-emitting element. As a result, the light-emitting device that has reduced power consumption is provided.
    Type: Grant
    Filed: April 2, 2014
    Date of Patent: January 26, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hisao Ikeda, Masataka Nakada, Masami Jintyou, Koji Ono
  • Publication number: 20160009744
    Abstract: Disclosed are chemical entities which are compounds of formula (I): or pharmaceutically acceptable salts thereof; wherein Y, Ra, Ra?, Rb, Rc, X1, X2, X3, Rd, Z1, and Z2 have the values described herein and stereochemical configurations depicted at asterisked positions indicate absolute stereochemistry. Chemical entities according to the disclosure can be useful as inhibitors of Sumo Activating Enzyme (SAE). Further provided are pharmaceutical compositions comprising a compound of the disclosure and methods of using the compositions in the treatment of proliferative, inflammatory, cardiovascular, and neurodegenerative diseases or disorders.
    Type: Application
    Filed: June 30, 2015
    Publication date: January 14, 2016
    Applicant: MILLENNIUM PHARMACEUTICALS, INC.
    Inventors: Matthew O. Duffey, Dylan England, Scott Freeze, Zhigen Hu, Steven Langston, Charles McIntyre, Hirotake Mizutani, Koji Ono, He Xu
  • Patent number: 9153352
    Abstract: A metal wiring suitable for a substrate of large size is provided. The present invention is characterized in that at least one layer of conductive film is formed on an insulating surface, a resist pattern is formed on the conductive film, and the conductive film having the resist pattern is etched to form a metal wiring while controlling its taper angle ? in accordance with the bias power density, the ICP power density, the temperature of lower electrode, the pressure, the total flow rate of etching gas, or the ratio of oxygen or chlorine in etching gas. The thus formed metal wiring has less fluctuation in width or length and can satisfactorily deal with an increase in size of substrate.
    Type: Grant
    Filed: July 28, 2014
    Date of Patent: October 6, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Koji Ono, Hideomi Suzawa
  • Patent number: 9142574
    Abstract: For forming a gate electrode, a conductive film with low resistance including Al or a material containing Al as its main component and a conductive film with low contact resistance for preventing diffusion of Al into a semiconductor layer are laminated, and the gate electrode is fabricated by using an apparatus which is capable of performing etching treatment at high speed.
    Type: Grant
    Filed: December 16, 2014
    Date of Patent: September 22, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hideomi Suzawa, Koji Ono, Yoshihiro Kusuyama
  • Patent number: 9110625
    Abstract: A portable terminal has a first display and a second display, and is transformable between a first form and a second form. The first form is formed by arranging the first display and the second display to form a combined display, and the second form is formed by overlaying the second display upon the first display. In the first form displaying is performed on the combined display and in the second form displaying is performed on only the second display. The portable terminal detects a tilt of the portable terminal at a primary surface of the second display. When the portable terminal is in the first form, the tilt that is detected is corrected and displaying is performed based on the corrected tilt. When the portable terminal is in the second form, displaying is performed based on the detected tilt.
    Type: Grant
    Filed: February 7, 2012
    Date of Patent: August 18, 2015
    Assignee: KYOCERA Corporation
    Inventor: Koji Ono
  • Patent number: 9108294
    Abstract: A grinding device includes a dresser head (7) at the front end of a spindle (1), and a dresser tool (8) mounted on the dresser head (7) for dressing the grinder (6). The dresser tool (8) is configured such that while the workpiece (W) is being ground by the grinder (6), the dresser tool (8) is out of contact with the grinder (6), and while the grinder (6) is being dressed by the dresser tool (8), the chuck (3) is out of contact with the grinder (6). Thus it is possible to press the dresser tool (8) against the grinder (6) using relative movement between the spindle (1) and the grinder shaft (4). The dresser head (7) can be rotated by rotating the spindle (1). The grinder (6) can thus be dressed without the need to mount the dresser tool (8) every time the grinder is to be dressed.
    Type: Grant
    Filed: June 14, 2010
    Date of Patent: August 18, 2015
    Assignee: NTN CORPORATION
    Inventors: Tsuyoshi Yagi, Koji Ono
  • Patent number: 9045831
    Abstract: A dry etching method for forming tungsten wiring having a tapered shape and having a large specific selectivity with respect to a base film is provided. If the bias power density is suitably regulated, and if desired portions of a tungsten thin film are removed using an etching gas having fluorine as its main constituent, then the tungsten wiring having a desired taper angle can be formed.
    Type: Grant
    Filed: January 18, 2008
    Date of Patent: June 2, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hideomi Suzawa, Koji Ono
  • Publication number: 20150137132
    Abstract: Disclosed is an electroluminescence device having a substrate, a thin film transistor over the substrate, an insulating film over the thin film transistor, an electroluminescence element over the insulating film, a passivation film over the electroluminescence element, and a counter substrate over the passivation film. The electroluminescence element is configured to emit light through the counter substrate, and a space between the substrate and the counter substrate is filled with a filler. The electroluminescence device is featured by the tapered side surface of a gate electrode of the thin film transistor.
    Type: Application
    Filed: January 5, 2015
    Publication date: May 21, 2015
    Inventors: Koji ONO, Hideomi SUZAWA, Tatsuya ARAO
  • Publication number: 20150099333
    Abstract: For forming a gate electrode, a conductive film with low resistance including Al or a material containing Al as its main component and a conductive film with low contact resistance for preventing diffusion of Al into a semiconductor layer are laminated, and the gate electrode is fabricated by using an apparatus which is capable of performing etching treatment at high speed.
    Type: Application
    Filed: December 16, 2014
    Publication date: April 9, 2015
    Inventors: Shunpei Yamazaki, Hideomi Suzawa, Koji Ono, Yoshihiro Kusuyama
  • Patent number: 8957424
    Abstract: Disclosed is an electroluminescence device having a substrate, a thin film transistor over the substrate, an insulating film over the thin film transistor, an electroluminescence element over the insulating film, a passivation film over the electroluminescence element, and a counter substrate over the passivation film. The electroluminescence element is configured to emit light through the counter substrate, and a space between the substrate and the counter substrate is filled with a filler. The electroluminescence device is featured by the tapered side surface of a gate electrode of the thin film transistor.
    Type: Grant
    Filed: March 24, 2014
    Date of Patent: February 17, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Koji Ono, Hideomi Suzawa, Tatsuya Arao
  • Patent number: 8933105
    Abstract: The present invention provides a compound having a superior acid secretion inhibitory effect and showing an antiulcer activity, which is represented by the formula (I) wherein R1 is an optionally substituted cyclic group, R2 is a substituent, R3 is an optionally substituted alkyl group, an acyl group, an optionally substituted hydroxy group, an optionally substituted amino group, a halogen atom, a cyano group or a nitro group, R4 and R5 are each a hydrogen atom, an optionally substituted alkyl group, an acyl group, an optionally substituted hydroxy group, an optionally substituted amino group, a halogen atom, a cyano group or a nitro group, R6 and R6? are each a hydrogen atom or an alkyl group, and n is an integer of 0-3, or a salt thereof.
    Type: Grant
    Filed: February 26, 2008
    Date of Patent: January 13, 2015
    Assignee: Takeda Pharmaceutical Company Limited
    Inventors: Masahiro Kajino, Haruyuki Nishida, Yasuyoshi Arikawa, Keizo Hirase, Koji Ono
  • Patent number: 8921169
    Abstract: For forming a gate electrode, a conductive film with low resistance including Al or a material containing Al as its main component and a conductive film with low contact resistance for preventing diffusion of Al into a semiconductor layer are laminated, and the gate electrode is fabricated by using an apparatus which is capable of performing etching treatment at high speed.
    Type: Grant
    Filed: May 9, 2013
    Date of Patent: December 30, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hideomi Suzawa, Koji Ono, Yoshihiro Kusuyama
  • Publication number: 20140357005
    Abstract: To provide a highly reliable light-emitting device and especially a light-emitting device which can be formed without use of a metal mask and includes a plurality of light-emitting elements. A structural body at least an end of which has an acute-angled shape is provided so that the end can pass downward through an electrically conductive film formed over the insulating layer and can be at least in contact with an insulating layer having elasticity, thereby physically separating the electrically conductive film, and the electrically conductive films are thus electrically insulated from each other. Such a structure may be provided between adjacent light-emitting elements so that the light-emitting elements can be electrically insulated from each other in the light-emitting device.
    Type: Application
    Filed: August 15, 2014
    Publication date: December 4, 2014
    Inventors: Kensuke Yoshizumi, Koji Ono
  • Publication number: 20140332251
    Abstract: A metal wiring suitable for a substrate of large size is provided. The present invention is characterized in that at least one layer of conductive film is formed on an insulating surface, a resist pattern is formed on the conductive film, and the conductive film having the resist pattern is etched to form a metal wiring while controlling its taper angle ? in accordance with the bias power density, the ICP power density, the temperature of lower electrode, the pressure, the total flow rate of etching gas, or the ratio of oxygen or chlorine in etching gas. The thus formed metal wiring has less fluctuation in width or length and can satisfactorily deal with an increase in size of substrate.
    Type: Application
    Filed: July 28, 2014
    Publication date: November 13, 2014
    Inventors: Koji ONO, Hideomi SUZAWA