Patents by Inventor Koji Ono

Koji Ono has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140306201
    Abstract: One embodiment of the present invention relates to a light-emitting device comprising an insulating surface; a lower electrode over the insulating surface; a protrusion over the insulating surface having a sidewall sloping toward the lower electrode; a light-transmitting partition overlapping with an end portion of the lower electrode and the sidewall of the protrusion; and a light-emitting element including the lower electrode, an upper electrode overlapping with the lower electrode, and a layer containing a light-emitting organic compound between the lower electrode and the upper electrode. In the light-emitting device, the sidewall of the protrusion can reflect light emitted from the light-emitting element. As a result, the light-emitting device that has reduced power consumption is provided.
    Type: Application
    Filed: April 2, 2014
    Publication date: October 16, 2014
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Hisao Ikeda, Masataka Nakada, Masami Jintyou, Koji Ono
  • Patent number: 8847379
    Abstract: A method for manufacturing a package comprises a first step of forming a metal pattern including a frame and a plurality of leads extending inward from the frame, a second step of molding a resin pattern including a first resin portion which holds the plurality of leads from an inner side thereof, and second resin portions which cover bottom surfaces of peripheral portions, adjacent to portions to be removed, in the plurality of leads while exposing bottom surfaces of the portions to be removed in the plurality of leads, so as to hold the plurality of leads from a lower side thereof, and a third step of cutting the plurality of leads into a plurality of first leads and a plurality of second leads by removing the portions to be removed in the plurality of leads while the resin pattern keeps holding the peripheral portions in the plurality of leads.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: September 30, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventor: Koji Ono
  • Publication number: 20140264391
    Abstract: A high reliability semiconductor display device is provided. A semiconductor layer in the semiconductor display device has a channel forming region, an LDD region, a source region, and a drain region, and the LDD region overlaps a first gate electrode, sandwiching a gate insulating film.
    Type: Application
    Filed: June 3, 2014
    Publication date: September 18, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Hideomi Suzawa, Koji Ono, Tatsuya Arao
  • Publication number: 20140256116
    Abstract: There are provided a structure of a semiconductor device in which low power consumption is realized even in a case where a size of a display region is increased to be a large size screen and a manufacturing method thereof. A gate electrode in a pixel portion is formed as a three layered structure of a material film containing mainly W, a material film containing mainly Al, and a material film containing mainly Ti to reduce a wiring resistance. A wiring is etched using an IPC etching apparatus. The gate electrode has a taper shape and the width of a region which becomes the taper shape is set to be 1 ?m or more.
    Type: Application
    Filed: May 23, 2014
    Publication date: September 11, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hideomi Suzawa, Yoshihiro Kusuyama, Koji Ono, Jun Koyama
  • Patent number: 8817105
    Abstract: An apparatus and method for restricting executable processing carried out in an information terminal, the method including: accepting an operation by an operator; in response to the accepted operation, executing processing corresponding to the operation; requesting an input of identification information; performing authentication of the identification information input in response to the request; in the case where an input of identification information is requested in the identification information requesting step, acquiring image data; storing the acquired image data; extracting an area including an image recognized as a person from the acquired image data; enabling execution of processing and deletion of the image data when an authentication succeeds and preventing deletion of the image data when the authentication fails.
    Type: Grant
    Filed: March 25, 2013
    Date of Patent: August 26, 2014
    Assignee: Kyocera Corporation
    Inventor: Koji Ono
  • Patent number: 8809879
    Abstract: To provide a highly reliable light-emitting device and especially a light-emitting device which can be formed without use of a metal mask and includes a plurality of light-emitting elements. A structural body at least an end of which has an acute-angled shape is provided so that the end can pass downward through an electrically conductive film formed over the insulating layer and can be at least in contact with an insulating layer having elasticity, thereby physically separating the electrically conductive film, and the electrically conductive films are thus electrically insulated from each other. Such a structure may be provided between adjacent light-emitting elements so that the light-emitting elements can be electrically insulated from each other in the light-emitting device.
    Type: Grant
    Filed: April 4, 2012
    Date of Patent: August 19, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kensuke Yoshizumi, Koji Ono
  • Patent number: 8791513
    Abstract: A metal wiring suitable for a substrate of large size is provided. The present invention is characterized in that at least one layer of conductive film is formed on an insulating surface, a resist pattern is formed on the conductive film, and the conductive film having the resist pattern is etched to form a metal wiring while controlling its taper angle ? in accordance with the bias power density, the ICP power density, the temperature of lower electrode, the pressure, the total flow rate of etching gas, or the ratio of oxygen or chlorine in etching gas. The thus formed metal wiring has less fluctuation in width or length and can satisfactorily deal with an increase in size of substrate.
    Type: Grant
    Filed: May 7, 2012
    Date of Patent: July 29, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Koji Ono, Hideomi Suzawa
  • Publication number: 20140203309
    Abstract: Disclosed is an electroluminescence device having a substrate, a thin film transistor over the substrate, an insulating film over the thin film transistor, an electroluminescence element over the insulating film, a passivation film over the electroluminescence element, and a counter substrate over the passivation film. The electroluminescence element is configured to emit light through the counter substrate, and a space between the substrate and the counter substrate is filled with a filler. The electroluminescence device is featured by the tapered side surface of a gate electrode of the thin film transistor.
    Type: Application
    Filed: March 24, 2014
    Publication date: July 24, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Koji ONO, Hideomi SUZAWA, Tatsuya ARAO
  • Patent number: 8772778
    Abstract: A high reliability semiconductor display device is provided. A semiconductor layer in the semiconductor display device has a channel forming region, an LDD region, a source region, and a drain region, and the LDD region overlaps a first gate electrode, sandwiching a gate insulating film.
    Type: Grant
    Filed: February 15, 2012
    Date of Patent: July 8, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Hideomi Suzawa, Koji Ono, Tatsuya Arao
  • Patent number: 8772820
    Abstract: A highly reliable light-emitting device, a light-emitting device which can be formed without using a metal mask, or a light-emitting device in which a voltage drop due to the resistance of an upper electrode layer is suppressed is provided. When an EL film is formed over a conductive connection electrode layer having an uneven shape, a surface of the conductive connection electrode layer cannot be fully covered. Subsequently, a conductive film to be an upper electrode layer of an EL element is formed thereover; thus, a region in contact with the conductive connection electrode layer is formed. Further, a structure is provided in a position on a counter substrate, which overlaps with the conductive connection electrode layer, and then substrates are bonded to each other so that the structure is physically in contact with the upper electrode layer over the conductive connection electrode layer.
    Type: Grant
    Filed: March 27, 2012
    Date of Patent: July 8, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kensuke Yoshizumi, Koji Ono
  • Patent number: 8772277
    Abstract: The present invention provides a novel compound having a superior activity as an ERR-? modulator and useful as an agent for the prophylaxis or treatment of ERR-? associated diseases. The present invention relates to a compound represented by the formula wherein each symbol is as defined in the specification, or a salt thereof.
    Type: Grant
    Filed: August 3, 2012
    Date of Patent: July 8, 2014
    Assignee: Takeda Pharmaceutical Company Limited
    Inventors: Shigemitsu Matsumoto, Koji Ono, Yusuke Tominari, Taisuke Katoh, Kazuhiro Miwa, Atsushi Hasuoka, Shinichi Imamura
  • Patent number: 8772795
    Abstract: To provide a light-emitting device including the plurality of light-emitting elements having a structure in which a light-emitting area is large and defects in patterning of light-emitting elements are suppressed. To provide a lighting device including the light-emitting device. The light-emitting device includes a first wiring provided over a substrate having an insulating surface, an insulating film provided over the first wiring, a second wiring provided over the insulating film, and a light-emitting element unit including a plurality of light-emitting elements provided over the first wiring with the insulating film provided therebetween. The plurality of light-emitting elements each include a first electrode layer having a light-blocking property, a layer containing an organic compound in contact with the first electrode layer, and a second electrode layer having a light-transmitting property in contact with the layer containing an organic compound.
    Type: Grant
    Filed: February 7, 2012
    Date of Patent: July 8, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Koji Ono, Yoshifumi Tanada
  • Patent number: 8735889
    Abstract: There are provided a structure of a semiconductor device in which low power consumption is realized even in a case where a size of a display region is increased to be a large size screen and a manufacturing method thereof. A gate electrode in a pixel portion is formed as a three layered structure of a material film containing mainly W, a material film containing mainly Al, and a material film containing mainly Ti to reduce a wiring resistance. A wiring is etched using an IPC etching apparatus. The gate electrode has a taper shape and the width of a region which becomes the taper shape is set to be 1 ?m or more.
    Type: Grant
    Filed: November 1, 2011
    Date of Patent: May 27, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hideomi Suzawa, Yoshihiro Kusuyama, Koji Ono, Jun Koyama
  • Patent number: 8729557
    Abstract: Disclosed is an electroluminescence device having a substrate, a thin film transistor over the substrate, an insulating film over the thin film transistor, an electroluminescence element over the insulating film, a passivation film over the electroluminescence element, and a counter substrate over the passivation film. The electroluminescence element is configured to emit light through the counter substrate, and a space between the substrate and the counter substrate is filled with a filler. The electroluminescence device is featured by the tapered side surface of a gate electrode of the thin film transistor.
    Type: Grant
    Filed: September 16, 2013
    Date of Patent: May 20, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Koji Ono, Hideomi Suzawa, Tatsuya Arao
  • Patent number: 8717470
    Abstract: The solid-state imaging apparatus illustrates a solid-state imaging element having a light receiving portion; a package which contains the solid-state imaging element; a light-transmissive member which is provided above the solid-state imaging element; and a partitioning member which is fixed to the package to isolate the light receiving portion of the solid-state imaging element from the surrounding portion of the light receiving portion of the solid-state imaging element.
    Type: Grant
    Filed: July 29, 2010
    Date of Patent: May 6, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventor: Koji Ono
  • Publication number: 20140117364
    Abstract: By providing appropriate TFT structures arranged in various circuits of the semiconductor device in response to the functions required by the circuits, it is made possible to improve the operating performances and the reliability of a semiconductor device, reduce power consumption as well as realizing reduced manufacturing cost and increase in yield by lessening the number of processing steps. An LDD region of a TFT is formed to have a concentration gradient of an impurity element for controlling conductivity which becomes higher as the distance from a drain region decreases. In order to form such an LDD region having a concentration gradient of an impurity element, the present invention uses a method in which a gate electrode having a taper portion is provided to thereby dope an ionized impurity element for controlling conductivity accelerated in the electric field so that it penetrates through the gate electrode and a gate insulating film into a semiconductor layer.
    Type: Application
    Filed: January 6, 2014
    Publication date: May 1, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hideomi Suzawa, Koji Ono, Yasuyuki Arai
  • Patent number: 8679414
    Abstract: Adsorbent dust can be recovered while spraying is prevented. An apparatus is provided with a desulfurization-denitration tower body and an adsorbent discharging device. An entrance louver and an exit louver are provided for forming a packed moving bed of an adsorbent that moves downward inside the tower body, the apparatus has a throttle portion provided with a side panel that is inclined so that a spacing gradually decreases toward a discharging device, the throttle portion being provided between the tower body and the discharging device, and first partitions are provided inside the throttle portion. A second partition extending along the incline direction of the side panel is provided at a predetermined distance from the bottom end of the exit louver above the side panel, and a gap is provided between the bottom end part of the exit louver and the side panel of the throttle portion.
    Type: Grant
    Filed: September 16, 2008
    Date of Patent: March 25, 2014
    Assignee: J-POWER EnTech, Inc.
    Inventors: Masahiro Miya, Koji Ono, Junya Mochida
  • Publication number: 20140014996
    Abstract: Disclosed is an electroluminescence device having a substrate, a thin film transistor over the substrate, an insulating film over the thin film transistor, an electroluminescence element over the insulating film, a passivation film over the electroluminescence element, and a counter substrate over the passivation film. The electroluminescence element is configured to emit light through the counter substrate, and a space between the substrate and the counter substrate is filled with a filler. The electroluminescence device is featured by the tapered side surface of a gate electrode of the thin film transistor.
    Type: Application
    Filed: September 16, 2013
    Publication date: January 16, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Koji ONO, Hideomi SUZAWA, Tatsuya ARAO
  • Patent number: 8624248
    Abstract: By providing appropriate TFT structures arranged in various circuits of the semiconductor device in response to the functions required by the circuits, it is made possible to improve the operating performances and the reliability of a semiconductor device, reduce power consumption as well as realizing reduced manufacturing cost and increase in yield by lessening the number of processing steps. An LDD region of a TFT is formed to have a concentration gradient of an impurity element for controlling conductivity which becomes higher as the distance from a drain region decreases. In order to form such an LDD region having a concentration gradient of an impurity element, the present invention uses a method in which a gate electrode having a taper portion is provided to thereby dope an ionized impurity element for controlling conductivity accelerated in the electric field so that it penetrates through the gate electrode and a gate insulating film into a semiconductor layer.
    Type: Grant
    Filed: June 27, 2011
    Date of Patent: January 7, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hideomi Suzawa, Koji Ono, Yasuyuki Arai
  • Publication number: 20130321244
    Abstract: A portable terminal has a first display and a second display, and is transformable between a first form and a second form. The first form is formed by arranging the first display and the second display to form a combined display, and the second form is formed by overlaying the second display upon the first display. In the first form displaying is performed on the combined display and in the second form displaying is performed on only the second display. The portable terminal detects a tilt of the portable terminal at a primary surface of the second display. When the portable terminal is in the first form, the tilt that is detected is corrected and displaying is performed based on the corrected tilt. When the portable terminal is in the second form, displaying is performed based on the detected tilt.
    Type: Application
    Filed: February 7, 2012
    Publication date: December 5, 2013
    Applicant: KYOCERA CORPORATION
    Inventor: Koji Ono