Patents by Inventor Koji Sawada

Koji Sawada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090084052
    Abstract: An external wall constructing structure excellent in ornamental appearance, weather resistance, contractibility, and safety is provided. An external wail constructing structure 1 comprising external wall panels that are joined to each other by vertical and horizontal shiplap joints and secured to a skeleton of a building by securing a metal fitting 5. A cut-off end portion 23 of a dimension-adjusted external wall panel 20 among the plurality of external wall panels is fixed to a skeleton 10 of the building via end constructing bracket 3. Left and right joint end portions of the dimension-adjusted external wall panel 20 are fixed to the skeleton 10 via lateral end securing metal fittings 6. In the end constructing bracket 3, a rear plate portion 31 is abutted on rear surface 26 of the dimension-adjusted external wall panel 20 and forward-bending portion 32 is abutted on cut-off end surface 231 of the dimension-adjusted external wall panel 20.
    Type: Application
    Filed: July 30, 2008
    Publication date: April 2, 2009
    Applicant: NICHIHA CORPORATION
    Inventors: Tsuneaki Ito, Koji Sawada, Shin Takami
  • Publication number: 20090007497
    Abstract: A window drain for preventing stains on a building wall and damage caused by (frozen) rain water, which is installable and sealable easily without impairing the appearance of a building. The present invention relates to a window drain adaptable to be positioned beneath a sill of a sash window frame having a vertical portion, a sloping portion, a front portion, and a horizontal portion for latching to an upper portion of an external wall. Further, the present invention relates to a window drain, wherein the horizontal portion has notches at both ends thereof. Further, the present invention relates to a window drain, further having upstanding portions at both ends of the window drain to regulate a stream of water so that the water is kept between the upstanding portions.
    Type: Application
    Filed: July 2, 2008
    Publication date: January 8, 2009
    Applicant: NICHIHA CORPORATION
    Inventor: Koji Sawada
  • Publication number: 20090007505
    Abstract: A window drain for preventing stains on a building wall and damage caused by frozen rain water, which is installable and sealable easily without impairing the appearance of a building. The present invention relates to a window drain adapted to be positioned at the portion beneath each vertical post of a sash window frame comprising a vertical portion, a sloping portion, a front portion and a horizontal portion for latching itself to an upper portion of an external wall. Further, the present invention relates to the window drain, wherein the horizontal portion has a notch at an end thereof and a sealing pocket.
    Type: Application
    Filed: July 2, 2008
    Publication date: January 8, 2009
    Applicant: NICHIHA CORPORATION
    Inventor: Koji Sawada
  • Patent number: 7235831
    Abstract: In order to reduce the capacitance of a light-receiving element, the present invention provides a light-receiving element which includes a first semiconductor region of the first conductivity type, a second semiconductor region of the second conductivity type, provided on the first semiconductor region, a third semiconductor region of the first conductivity type, provided between the second semiconductor region and an insulating film and an electrode region of the second conductivity type, provided in the second semiconductor region where the third semiconductor region is absent on and above the second semiconductor region, and connected to an anode or cathode electrode consisting of a conductor.
    Type: Grant
    Filed: August 11, 2003
    Date of Patent: June 26, 2007
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hiraku Kozuka, Toru Koizumi, Koji Sawada
  • Patent number: 7135668
    Abstract: A solid-state imaging device includes a plurality of pixels each including a photoelectric conversion element and a signal amplification element which receives a signal from the photoelectric conversion element to amplify and output the signal, a signal amplifier including a first input terminal which receives the signal from the signal amplification element and a second input terminal into which a reference voltage is input, and a reference electric power supply, which supplies the reference voltage to the second input terminal of the signal amplifier, the reference electric power supply including a circuit configuration equivalent to the signal amplification element.
    Type: Grant
    Filed: July 12, 2004
    Date of Patent: November 14, 2006
    Assignee: Canon Kabushiki Kaisha
    Inventors: Tetsunobu Kochi, Koji Sawada
  • Publication number: 20060080029
    Abstract: A navigation apparatus acquires geographic information from a server apparatus. When the navigation apparatus does not store any geographic information that provides a continuous route from the starting point to a destination point, it transmits data of the starting point and destination point to the server apparatus to acquire therefrom geographic information that provides a continuous route from the starting point to the destination point. This efficient acquisition of geographic information realizes reduction of communication time and communication costs.
    Type: Application
    Filed: June 13, 2003
    Publication date: April 13, 2006
    Inventors: Kiyoshi Kodani, Susumu Iida, Koji Sawada
  • Publication number: 20050035271
    Abstract: A solid-state imaging device includes a plurality of pixels each including a photoelectric conversion element and a signal amplification element which receives a signal from the photoelectric conversion element to amplify and output the signal, a signal amplifier including a first input terminal which receives the signal from the signal amplification element and a second input terminal into which a reference voltage is input, and a reference electric power supply, which supplies the reference voltage to the second input terminal of the signal amplifier, the reference electric power supply including a circuit configuration equivalent to the signal amplification element.
    Type: Application
    Filed: July 12, 2004
    Publication date: February 17, 2005
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Tetsunobu Kochi, Koji Sawada
  • Publication number: 20040046194
    Abstract: In order to reduce the capacitance of a light-receiving element, the present invention provides a light-receiving element comprises a first semiconductor region of the first conductivity type, a second semiconductor region of the second conductivity type, provided on the first semiconductor region, a third semiconductor region of the first conductivity type, provided between the second semiconductor region and an insulating film and an electrode region of the second conductivity type, provided in the second semiconductor region where the third semiconductor region is absent on and above the second semiconductor region, and connected to an anode or cathode electrode consisting of a conductor.
    Type: Application
    Filed: August 11, 2003
    Publication date: March 11, 2004
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Hiraku Kozuka, Toru Koizumi, Koji Sawada
  • Patent number: 6688060
    Abstract: A joiner for vertical joint which is adapted to be placed at a vertical joint formed between end faces of a couple of neighboring external wall members. This joiner is designed such that the adhesive force between the sealing material and the surface region of raised portion of the joiner is minimized, thereby making it possible to prevent the sealing material from being cracked or peeled away. This joiner is featured in that the surface region of said raised portion is constituted by a resin layer formed of a resin selected from the group consisting of polyethylene, polypropylene and fluororesin, and having an embossed surface.
    Type: Grant
    Filed: September 14, 2001
    Date of Patent: February 10, 2004
    Assignee: Nichiha Corporation
    Inventor: Koji Sawada
  • Patent number: 6649951
    Abstract: In order to reduce the capacitance of a light-receiving element, the present invention provides a light-receiving element comprises a first semiconductor region of the first conductivity type, a second semiconductor region of the second conductivity type, provided on the first semiconductor region, a third semiconductor region of the first conductivity type, provided between the second semiconductor region and an insulating film and an electrode region of the second conductivity type, provided in the second semiconductor region where the third semiconductor region is absent on and above the second semiconductor region, and connected to an anode or cathode electrode consisting of a conductor.
    Type: Grant
    Filed: October 31, 2002
    Date of Patent: November 18, 2003
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hiraku Kozuka, Toru Koizumi, Koji Sawada
  • Patent number: 6590242
    Abstract: In order to reduce the capacitance of a light-receiving element, the present invention provides a light-receiving element comprises a first semiconductor region of the first conductivity type, a second semiconductor region of the second conductivity type, provided on the first semiconductor region, a third semiconductor region of the first conductivity type, provided between the second semiconductor region and an insulating film and an electrode region of the second conductivity type, provided in the second semiconductor region where the third semiconductor region is absent on and above the second semiconductor region, and connected to an anode or cathode electrode consisting of a conductor.
    Type: Grant
    Filed: February 24, 2000
    Date of Patent: July 8, 2003
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hiraku Kozuka, Toru Koizumi, Koji Sawada
  • Publication number: 20030057431
    Abstract: In order to reduce the capacitance of a light-receiving element, the present invention provides a light-receiving element comprises a first semiconductor region of the first conductivity type, a second semiconductor region of the second conductivity type, provided on the first semiconductor region, a third semiconductor region of the first conductivity type, provided between the second semiconductor region and an insulating film and an electrode region of the second conductivity type, provided in the second semiconductor region where the third semiconductor region is absent on and above the second semiconductor region, and connected to an anode or cathode electrode consisting of a conductor.
    Type: Application
    Filed: October 31, 2002
    Publication date: March 27, 2003
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Hiraku Kozuka, Toru Koizumi, Koji Sawada
  • Patent number: 6528832
    Abstract: An image sensor having a plurality of photodetectors and a source follower, storing photo-charges generated by the photodetectors in gate of a MOS transistor and outputting voltage signals converted from the photo-charges, integrally formed on a single semiconductor substrate. The source follower is configured with p-channel MOS transistors to restrain generation of stray carrier. Further, the p-channel MOS transistor of the source follower on the power source side is formed on an n-type well whose impurity concentration is higher than that of an n-type semiconductor substrate where the p-channel MOS transistor on the ground side is formed. In this configuration, the absolute value of the threshold voltage of the p-channel MOS transistor on the ground side becomes lower than that of the p-channel MOS transistor on the power source side, thus gain of the source follower is increased.
    Type: Grant
    Filed: October 6, 2000
    Date of Patent: March 4, 2003
    Assignee: Canon Kabushiki Kaisha
    Inventors: Koji Sawada, Hiraku Kozuka
  • Patent number: 6444323
    Abstract: A semi-conductive silicone rubber composition contains carbon black. The carbon black contains thermal black obtained by thermally cracking a natural gas and having a specific surface area—nitrogen absorption method of 8.0 to 10.0 m2/g, a dibutyl phthalate absorption number (dibutyl phthalate absorption number) of 30 to 40 cm3/100 g and an averaged particle size of 200 to 330 nm.
    Type: Grant
    Filed: September 14, 2000
    Date of Patent: September 3, 2002
    Assignee: Tigers Polymer Corporation
    Inventors: Wataru Matsumoto, Tetsuya Nakamura, Koji Sawada
  • Publication number: 20020056243
    Abstract: A joiner for vertical joint which is adapted to be placed at a vertical joint formed between end faces of a couple of neighboring external wall members. This joiner is designed such that the adhesive force between the sealing material and the surface region of raised portion of the joiner is minimized, thereby making it possible to prevent the sealing material from being cracked or peeled away. This joiner is featured in that the surface region of said raised portion is constituted by a resin layer formed of a resin selected from the group consisting of polyethylene, polypropylene and fluororesin, and having an embossed surface.
    Type: Application
    Filed: September 14, 2001
    Publication date: May 16, 2002
    Applicant: NICHIHA CORPORATION
    Inventor: Koji Sawada
  • Patent number: 6303951
    Abstract: Photoelectric conversion chips having the same structure are disposed in line and electrically connected together to constitute a multi-chip type image sensor. The gate of a load transistor of a source follower circuit of each of the photoelectric conversion chips is connected in common to one constant current source circuit. The constant current source circuit and photoelectric conversion chips are mounted on a substrate. With this structure, the common current source circuit is used for all the source follower circuits so that noises will not be generated on the photoelectric conversion chip unit basis. The multi-chip type image sensor can therefore improve the image quality, and horizontal or vertical stripes to be caused by noises otherwise generated in separate constant current source circuits can be removed.
    Type: Grant
    Filed: April 10, 2000
    Date of Patent: October 16, 2001
    Assignee: Canon Kabushiki Kaisha
    Inventors: Koji Sawada, Hiraku Kozuka
  • Patent number: 6184516
    Abstract: A photoelectric conversion device and an image sensor having a plurality of photodetectors and peripheral circuits, configured with MOS transistors, which are integrally formed on a semiconductor substrate. In the peripheral circuits, including a MOS operational amplifier, for outputting electric signals obtained from the photodetectors to outside, a source follower using an n-channel MOS transistor and a source follower using a p-channel MOS transistor are formed subsequent to the MOS operational amplifier. Output from the MOS operational amplifier enters the gate of the source follower of the n-channel MOS transistor, output from the source follower of the n-channel MOS transistor enters the gate of the source follower using a p-channel MOS transistor, and output from the source follower of the p-channel MOS transistor enters a negative input terminal of the MOS operational amplifier as well as is outputted to outside to drive an external load.
    Type: Grant
    Filed: May 28, 1998
    Date of Patent: February 6, 2001
    Assignee: Canon Kabushiki Kaisha
    Inventors: Koji Sawada, Hiraku Kozuka
  • Patent number: 6169317
    Abstract: To make the thickness of an interlevel insulating film uniform and suppress variations in output signal, in a photoelectric conversion element including a plurality of photoelectric conversion portions, and light-shielding units having openings formed above the photoelectric conversion portions, the light-shielding units have first light-shielding layers, and second light-shielding layers formed on the first light-shielding layers via an interlevel insulating film. The first light-shielding layers have gaps (GP) for allowing two adjacent openings (OP) to communicate with each other. The second light-shielding layers have light-shielding portions (12a) above the gaps of the first light-shielding layers.
    Type: Grant
    Filed: February 11, 1999
    Date of Patent: January 2, 2001
    Assignee: Canon Kabushiki Kaisha
    Inventors: Koji Sawada, Hiraku Kozuka, Shigeru Nishimura
  • Patent number: 6150682
    Abstract: An image sensor having a plurality of photodetectors and a source follower, storing photo-charges generated by the photodetectors in gate of a MOS transistor and outputting voltage signals converted from the photo-charges, integrally formed on a single semiconductor substrate. The source follower is configured with p-channel MOS transistors to restrain generation of stray carrier. Further, the p-channel MOS transistor of the source follower on the power source side is formed on an n-type well whose impurity concentration is higher than that of an n-type semiconductor substrate where the p-channel MOS transistor on the ground side is formed. In this configuration, the absolute value of the threshold voltage of the p-channel MOS transistor on the ground side becomes lower than that of the p-channel MOS transistor on the power source side, thus gain of the source follower is increased.
    Type: Grant
    Filed: May 26, 1998
    Date of Patent: November 21, 2000
    Assignee: Canon Kabushiki Kaisha
    Inventors: Koji Sawada, Hiraku Kozuka
  • Patent number: 5729893
    Abstract: A method for producing a multilayer ceramic circuit substrate having therein internal conductor patterns comprising W and/or Mo as a main component and surface conductor patterns comprising Cu as a main component formed onto a surface layer of the multilayer ceramic circuit substrate, wherein an intermediate metal layer comprising 40 to 90 wt. % of W and/or Mo and 10 to 60 wt. % of at least one element selected from the group consisting of Ir, Pt, Ti, and Cr is formed in through-holes of the surface layer and on parts of the surface layer in the vicinity of the through holes on the surface layer, whereby the internal conductor patterns and the surface conductor patterns are electrically connected through the intermediate metal layer. The alumina multilayer ceramic circuit substrate enables an excellent bonding strength and electrical conductivity between the internal conductors and the surface conductors and high precision wiring and miniaturization of an electronic circuit part.
    Type: Grant
    Filed: November 22, 1995
    Date of Patent: March 24, 1998
    Assignee: Sumitomo Metal (SMI) Electronics Devices, Inc.
    Inventors: Nozomi Tanifuji, Akihiko Naito, Koji Sawada, Tohru Nomura, Yoshiyuki Miyase, Takashi Nagasaka