Patents by Inventor Koji Shigematsu

Koji Shigematsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7426136
    Abstract: An electrically programmable and erasable non-volatile semiconductor memory such as a flash memory is designed into a configuration in which, when a cutoff of the power supply occurs in the course of a write or erase operation carried out on a memory cell employed in the non-volatile semiconductor memory, the operation currently being executed is discontinued and a write-back operation is carried out to change a threshold voltage of the memory cell in the reversed direction. In addition, the configuration also allows the number of charge-pump stages in an internal power-supply configuration to be changed in accordance with the level of a power-supply voltage so as to make the write-back operation correctly executable. As a result, no memory cells are put in deplete state even in the event of a power-supply cutoff in the course of a write or erase operation.
    Type: Grant
    Filed: May 17, 2005
    Date of Patent: September 16, 2008
    Assignees: Renesas Technology Corp., Hitachi ULSI Systems Co., Ltd.
    Inventors: Ryotaro Sakurai, Hitoshi Tanaka, Satoshi Noda, Koji Shigematsu
  • Publication number: 20080030852
    Abstract: An illumination optical apparatus is able to accomplish desired annular illumination, circular illumination, and so on, without substantial influence of the zero-order light from a diffractive optical element.
    Type: Application
    Filed: October 12, 2005
    Publication date: February 7, 2008
    Inventor: Koji Shigematsu
  • Publication number: 20080030707
    Abstract: An illumination optical apparatus is able to adjust each of pupil luminance distributions at respective points on a surface to be illuminated to being almost uniform, while maintaining or adjusting an illuminance distribution on the surface to be illuminated to being almost uniform. The illumination optical apparatus illuminates the surface to be illuminated (M, W), with a light beam from a light source (1). The apparatus is provided with a pupil distribution forming device (1-4) for forming a pupil luminance distribution with a predetermined luminance distribution on an illumination pupil plane; and an adjuster (8, 9) for independently adjusting each of pupil luminance distributions about respective points on the surface to be illuminated. The adjuster has a plurality of adjustment surfaces each of which is disposed in an optical path between the pupil distribution forming device and the surface to be illuminated and has a predetermined transmittance distribution or reflectance distribution.
    Type: Application
    Filed: August 3, 2005
    Publication date: February 7, 2008
    Applicant: NIKON CORPORATION
    Inventors: Hirohisa Tanaka, Koji Shigematsu
  • Publication number: 20070146676
    Abstract: An illumination optical apparatus is arranged to illuminate a surface to be illuminated, with light in a desired polarization state, without substantive influence of manufacturing error of an optical member functioning as a wave plate. The illumination optical apparatus illuminates the surface to be illuminated (M, W) on the basis of light from a light source (1). The illumination optical apparatus is provided with a polarization converting element (12) disposed on or near an illumination pupil plane and adapted for converting a polarization state of incident light into a predetermined polarization state. The polarization converting element has a plurality of variable optical rotating members for variably yielding an angle of rotation to incident linearly polarized light. Each variable optical rotating member has two deviation prisms which are made of an optical material with an optical rotatory power and which are movable relative to each other along a direction intersecting with the optical axis (AX).
    Type: Application
    Filed: December 26, 2006
    Publication date: June 28, 2007
    Applicant: NIKON CORPORATION
    Inventors: Osamu Tanitsu, Hiroyuki Hirota, Koji Shigematsu, Shinichi Kurita
  • Patent number: 7154585
    Abstract: Provided is a projection optical system for forming an image of a pattern of a first object (R) on a second object (W). The projection optical system is made of an optical material having a refractive index of not more than 1.6 and is substantially telecentric both on the first object side and on the second object side. The projection optical system satisfies the condition of (?×L)/(NA×Y02)<1.5×10?3, where ? is a wavelength of light, L a distance between the first object and the second object, MA a numerical aperture on the second object side, and Y0 a maximum image height on the second object.
    Type: Grant
    Filed: July 3, 2003
    Date of Patent: December 26, 2006
    Assignee: Nikon Corporation
    Inventors: Koji Shigematsu, Youhei Fujishima, Yasuhiro Omura, Toshiro Ishiyama
  • Publication number: 20060170901
    Abstract: There is disclosed a polarization-modulating element for modulating a polarization state of incident light into a predetermined polarization state, the polarization-modulating element being made of an optical material with optical activity and having a circumferentially varying thickness profile.
    Type: Application
    Filed: February 6, 2006
    Publication date: August 3, 2006
    Applicant: NIKON CORPORATION
    Inventors: Osamu Tanitsu, Koji Shigematsu, Hiroyuki Hirota, Tomoyuki Matsuyama
  • Publication number: 20050219904
    Abstract: An electrically programmable and erasable non-volatile semiconductor memory such as a flash memory is designed into a configuration in which, when a cutoff of the power supply occurs in the course of a write or erase operation carried out on a memory cell employed in the non-volatile semiconductor memory, the operation currently being executed is discontinued and a write-back operation is carried out to change a threshold voltage of the memory cell in the reversed direction. In addition, the configuration also allows the number of charge-pump stages in an internal power-supply configuration to be changed in accordance with the level of a power-supply voltage so as to make the write-back operation correctly executable. As a result, no memory cells are put in deplete state even in the event of a power-supply cutoff in the course of a write or erase operation.
    Type: Application
    Filed: May 17, 2005
    Publication date: October 6, 2005
    Inventors: Ryotaro Sakurai, Hitoshi Tanaka, Satoshi Noda, Koji Shigematsu
  • Patent number: 6947121
    Abstract: The present invention is directed toward a high performance yet compact projection optical system that is both-sidedly telecentric, has the ability to minimize the reduction of image formation performance that occurs due to the absorption by the glass material used, can secure a sufficiently large numerical aperture and a broad exposure area, and has the ability to very favorably correct aberrations and especially distortion. In a projection optical system that projects a pattern of a first object onto a second object, comprising in order from the first object side, a positive first lens group, a negative second lens group, a positive third lens group, a negative fourth lens group, and positive fifth lens group that provides at least 2 negative lens compositions, and where the fifth lens group includes two lens planes that satisfy the expression ?/?exp?3.5, and a first lens composition L59 constituted of a first material that satisfies the expression n?1.
    Type: Grant
    Filed: June 12, 2003
    Date of Patent: September 20, 2005
    Assignee: Nikon Corporation
    Inventor: Koji Shigematsu
  • Patent number: 6912094
    Abstract: A projection optical system that projects an image on a first side onto a second plane through a plurality of lenses includes the following elements in order from the first side to the second plane: a first lens group that has a negative refractive power, a second lens group that has a positive refractive power, a third lens group that has a negative refractive power, a fourth lens group that has an aperture stop in the optical path, and a fifth lens group that has a positive refractive power. A clear aperture of a lens surface or an outer diameter of a lens in the projection optical system has a relative maximum in the second lens group, a relative minimum in the third lens group, and a relative maximum in the third-fifth lens groups, and has only one significant minimum between the first side and the second plane.
    Type: Grant
    Filed: December 28, 2001
    Date of Patent: June 28, 2005
    Assignee: Nikon Corporation
    Inventors: Koji Shigematsu, Masayuki Mizusawa, Youhei Fujishima, Miho Matsumoto
  • Patent number: 6912155
    Abstract: An electrically programmable and erasable nonvolatile semiconductor memory such as a flash memory is designed into a configuration in which, when a cutoff of the power supply occurs in the course of a write or erase operation carried out on a memory cell employed in the non-volatile semiconductor memory, the operation currently being executed is discontinued and a write-back operation is carried out to change a threshold voltage of the memory cell in the reversed direction. In addition, the configuration also allows the number of charge-pump stages in an internal power-supply configuration to be changed in accordance with the level of a power-supply voltage so as to make the write-back operation correctly executable. As a result, no memory cells are put in deplete state even in the event of a power-supply cutoff in the course of a write or erase operation.
    Type: Grant
    Filed: September 23, 2003
    Date of Patent: June 28, 2005
    Assignee: Renesas Technology Corp.
    Inventors: Ryotaro Sakurai, Hitoshi Tanaka, Satoshi Noda, Koji Shigematsu
  • Publication number: 20040105324
    Abstract: An electrically programmable and erasable nonvolatile semiconductor memory such as a flash memory is designed into a configuration in which, when a cutoff of the power supply occurs in the course of a write or erase operation carried out on a memory cell employed in the non-volatile semiconductor memory, the operation currently being executed is discontinued and a write-back operation is carried out to change a threshold voltage of the memory cell in the reversed direction. In addition, the configuration also allows the number of charge-pump stages in an internal power-supply configuration to be changed in accordance with the level of a power-supply voltage so as to make the write-back operation correctly executable. As a result, no memory cells are put in deplete state even in the event of a power-supply cutoff in the course of a write or erase operation.
    Type: Application
    Filed: September 23, 2003
    Publication date: June 3, 2004
    Applicants: Renesas Technology Corp., Hitachi ULSI Systems Co., Ltd.
    Inventors: Ryotaro Sakurai, Hitoshi Tanaka, Satoshi Noda, Koji Shigematsu
  • Patent number: 6700645
    Abstract: A projection optical system (20), exposure apparatus (10) incorporating same, and methods pertaining to same, for manufacturing devices and elements, such as integrated circuits, crystal displays, detectors, MR (magneto-resistive) heads, and the like. The projection optical system comprises a first lens group (G1) having positive refractive power, a second lens group (G2) having negative refractive power, a third lens group (G3) having positive refractive power, a fourth lens group (G4) having negative refractive power and a least a first aspherical surface (ASP1), and a fifth lens group (G5) having positive refractive power and an aperture stop (AS). The projection optical system is designed such that paraxial rays traveling parallel to optical axis (A) imagewise to objectwise intersect the optical axis at a location (Q) between the fourth lens group and the fifth lens group.
    Type: Grant
    Filed: November 28, 2000
    Date of Patent: March 2, 2004
    Assignee: Nikon Corporation
    Inventor: Koji Shigematsu
  • Publication number: 20040009415
    Abstract: Provided is a projection optical system for forming an image of a pattern of a first object (R) on a second object (W). The projection optical system is made of an optical material having a refractive index of not more than 1.6 and is substantially telecentric both on the first object side and on the second object side. The projection optical system satisfies the condition of (&lgr;×L)/(NA×Y02)<1.5×10−3, where &lgr; is a wavelength of light, L a distance between the first object and the second object, MA a numerical aperture on the second object side, and Y0 a maximum image height on the second object.
    Type: Application
    Filed: July 3, 2003
    Publication date: January 15, 2004
    Applicant: NIKON CORPORATION
    Inventors: Koji Shigematsu, Youhei Fujishima, Yasuhiro Omura, Toshiro Ishiyama
  • Publication number: 20030210385
    Abstract: The present invention is directed toward a high performance yet compact projection optical system that is both-sidedly telecentric, has the ability to minimize the reduction of image formation performance that occurs due to the absorption by the glass material used, can secure a sufficiently large numerical aperture and a broad exposure area, and has the ability to very favorably correct aberrations and especially distortion. In a projection optical system that projects a pattern of a first object onto a second object, comprising in order from the first object side, a positive first lens group, a negative second lens group, a positive third lens group, a negative fourth lens group, and positive fifth lens group that provides at least 2 negative lens compositions, and where the fifth lens group includes two lens planes that satisfy the expression &phgr;/&phgr;exp≦3.5, and a first lens composition L59 constituted of a first material that satisfies the expression n≦1.
    Type: Application
    Filed: June 12, 2003
    Publication date: November 13, 2003
    Applicant: Nikon Corporation
    Inventor: Koji Shigematsu
  • Patent number: 6600550
    Abstract: The present invention is directed to a batch type projection exposure apparatus for being used with a scanning type exposure apparatus. The apparatus may include an illumination optical system and a projection optical system. The illumination optical system may have a light source that illuminates a mask with an exposure light from the light source, and the projection optical system may have an image field that projects a reduction image of a pattern on the mask onto the image field on a work piece. The image field may include a rectangular shaped pattern transfer area of the scanning type exposure apparatus. The projection optical system may also have a numerical aperture at the side of the work piece that is greater than or equal to 0.5 m, and a rectangular pattern transfer area which is same as the rectangular shaped pattern transfer area of the scanning type exposure apparatus.
    Type: Grant
    Filed: June 5, 2000
    Date of Patent: July 29, 2003
    Assignee: Nikon Corporation
    Inventor: Koji Shigematsu
  • Patent number: 6567319
    Abstract: A semiconductor memory is designed to avoid a situation that the program cannot escape from a writing operation, and the writing operation can be promptly finished according to the level of an external source voltage. This semiconductor memory has a voltage detecting circuit for detecting whether a boosted voltage has reached a predetermined potential and a timer capable of counting predetermined time. A control circuit applies the boosted voltage to a selected memory cell when the voltage detecting circuit detects that the boosted voltage has reached the predetermined potential or when it is detected that the predetermined time has elapsed since the start of the boosting operation.
    Type: Grant
    Filed: June 17, 2002
    Date of Patent: May 20, 2003
    Assignees: Hitachi, Ltd., Hitachi ULSI Systems, Co., Ltd.
    Inventors: Hiroshi Sato, Satoshi Noda, Kiichi Manita, Shoji Kubono, Koji Shigematsu
  • Publication number: 20030007138
    Abstract: A projection optical system that projects an image on a first side onto a second plane through a plurality of lenses includes the following elements in order from the first side to the second plane: a first lens group that has a negative refractive power, a second lens group that has a positive refractive power, a third lens group that has a negative refractive power, a fourth lens group that has an aperture stop in the optical path, and a fifth lens group that has a positive refractive power. A clear aperture of a lens surface or an outer diameter of a lens in the projection optical system has a relative maximum in the second lens group, a relative minimum in the third lens group, and a relative maximum in the third-fifth lens groups, and has only one significant minimum between the first side and the second plane.
    Type: Application
    Filed: December 28, 2001
    Publication date: January 9, 2003
    Applicant: NIKON CORPORATION
    Inventors: Koji Shigematsu, Masayuki Mizusawa, Youhei Fujishima, Miho Matsumoto
  • Publication number: 20020149974
    Abstract: Disclosed is a semiconductor memory having an internal booster, such as a flash memory, in which a situation that the program cannot escape from a writing operation can be avoided, and the writing operation can be promptly finished according to the level of an external source voltage. This semiconductor memory having an internal booster has a voltage detecting circuit (limiter LM) for detecting whether a boosted voltage has reached a predetermined potential or not and a timer capable of counting predetermined time.
    Type: Application
    Filed: June 17, 2002
    Publication date: October 17, 2002
    Applicant: Hitachi, Ltd.
    Inventors: Hiroshi Sato, Satoshi Noda, Kiichi Manita, Shoji Kubono, Koji Shigematsu
  • Patent number: 6418065
    Abstract: Disclosed is a semiconductor memory having an internal booster, such as a flash memory, in which a situation that the program cannot escape from a writing operation can be avoided, and the writing operation can be promptly finished according to the level of an external source voltage. This semiconductor memory having an internal booster has a voltage detecting circuit (limiter LM) for detecting whether a boosted voltage has reached a predetermined potential or not and a timer capable of counting predetermined time.
    Type: Grant
    Filed: June 19, 2001
    Date of Patent: July 9, 2002
    Assignees: Hitachi, Ltd., Hitachi ULSI Systems Co., Ltd.
    Inventors: Hiroshi Sato, Satoshi Noda, Kiichi Manita, Shoji Kubono, Koji Shigematsu
  • Publication number: 20020006063
    Abstract: Disclosed is a semiconductor memory having an internal booster, such as a flash memory, in which a situation that the program cannot escape from a writing operation can be avoided, and the writing operation can be promptly finished according to the level of an external source voltage. This semiconductor memory having an internal booster has a voltage detecting circuit (limiter LM) for detecting whether a boosted voltage has reached a predetermined potential or not and a timer capable of counting predetermined time.
    Type: Application
    Filed: June 19, 2001
    Publication date: January 17, 2002
    Applicant: Hitachi, Ltd.
    Inventors: Hiroshi Sato, Satoshi Noda, Kiichi Manita, Shoji Kubono, Koji Shigematsu