Patents by Inventor Konami Izumi

Konami Izumi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8030651
    Abstract: To manufacture a micro structure and an electric circuit included in a micro electro mechanical device over the same insulating surface in the same step. In the micro electro mechanical device, an electric circuit including a transistor and a micro structure are integrated over a substrate having an insulating surface. The micro structure includes a structural layer having the same stacked-layer structure as a layered product of a gate insulating layer of the transistor and a semiconductor layer provided over the gate insulating layer. That is, the structural layer includes a layer formed of the same insulating film as the gate insulating layer and a layer formed of the same semiconductor film as the semiconductor layer of the transistor. Further, the micro structure is manufactured by using each of conductive layers used for a gate electrode, a source electrode, and a drain electrode of the transistor as a sacrificial layer.
    Type: Grant
    Filed: December 28, 2009
    Date of Patent: October 4, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Mayumi Yamaguchi, Konami Izumi
  • Patent number: 8026813
    Abstract: To provide an individual management system for managing products with the use of an automatic identification technology using a wireless communication device. In the individual management system, an individual management device is attached to a managed object, an individual identification device can wirelessly communicate with the individual management device, and an individual information management device can communicate with the individual identification device. The individual management device includes a detection portion such as a sensor. The individual identification device includes a position analysis portion which calculates a distance between the individual management device and the individual identification device. Information on the distance between the individual management device and the individual identification device, and information from the detection portion included in the individual management device are transmitted to the individual identification device.
    Type: Grant
    Filed: March 24, 2008
    Date of Patent: September 27, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yumiko Saito, Mayumi Yamaguchi, Konami Izumi
  • Patent number: 8008737
    Abstract: A micromachine includes a microstructure and a semiconductor element formed over one insulating substrate. The micromachine includes including a movable layer containing polycrystalline silicon and a space below or above the layer. Such polycrystalline silicon is formed on an insulating surface, so that it is used as a microstructure and used for forming a semiconductor element. Accordingly, a semiconductor device may include a microstructure and a semiconductor element provided over one insulating substrate.
    Type: Grant
    Filed: June 11, 2009
    Date of Patent: August 30, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Konami Izumi, Mayumi Yamaguchi
  • Patent number: 8008735
    Abstract: A semiconductor element of the electric circuit includes a semiconductor layer over a gate electrode. The semiconductor layer of the semiconductor element is formed of a layer including polycrystalline silicon which is obtained by crystallizing amorphous silicon by heat treatment or laser irradiation, over a substrate. The obtained layer including polycrystalline silicon is also used for a structure layer such as a movable electrode of a structure body. Therefore, the structure body and the electric circuit for controlling the structure body can be formed over one substrate. As a result, a micromachine can be miniaturized. Further, assembly and packaging are unnecessary, so that manufacturing cost can be reduced.
    Type: Grant
    Filed: March 12, 2007
    Date of Patent: August 30, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Mayumi Yamaguchi, Konami Izumi
  • Patent number: 7999335
    Abstract: A structure which prevents thinning and disconnection of a wiring is provided, in a micromachine (MEMS structure body) formed with a surface micromachining technology. A wiring (upper auxiliary wiring) over a sacrificial layer is electrically connected to a different wiring (upper connection wiring) over the sacrificial layer, so that thinning, disconnection, and the like of the wiring formed over the sacrificial layer at a step portion generated due to the thickness of the sacrificial layer can be prevented. The wiring over the sacrificial layer is formed of the same conductive film as an upper driving electrode which is a movable electrode and is thus thin. However, the different wiring is formed over a structural layer, which is formed by a CVD method and has a rounded step, and has a thickness of 200 nm to 1 ?m, whereby thinning, disconnection, and the like of the wiring can be further prevented.
    Type: Grant
    Filed: December 3, 2008
    Date of Patent: August 16, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Mayumi Mikami, Konami Izumi
  • Publication number: 20110139880
    Abstract: The invention provides a wireless chip which can secure the safety of consumers while being small in size, favorable in communication property, and inexpensive, and the invention also provides an application thereof. Further, the invention provides a wireless chip which can be recycled after being used for managing the manufacture, circulation, and retail. A wireless chip includes a layer including a semiconductor element, and an antenna. The antenna includes a first conductive layer, a second conductive layer, and a dielectric layer sandwiched between the first conductive layer and the second conductive layer, and has a spherical shape, an ovoid shape, an oval spherical shape like a go stone, an oval spherical shape like a rugby ball, or a disc shape, or has a cylindrical shape or a polygonal prism shape in which an outer edge portion thereof has a curved surface.
    Type: Application
    Filed: December 30, 2010
    Publication date: June 16, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Konami IZUMI
  • Publication number: 20110089955
    Abstract: A substrate including a semiconductor layer, where characteristics of an element can be evaluated with high reliability, and an evaluating method thereof are provided. A substrate including a semiconductor layer of the invention has a closed-loop circuit in which an antenna coil and a semiconductor element are connected in series, and a surface of an area over which the circuit is formed is covered with an insulating film. By using such a circuit, a contactless inspection can be carried out. Further, a ring oscillator can be substituted for the closed-loop circuit.
    Type: Application
    Filed: October 22, 2010
    Publication date: April 21, 2011
    Inventors: Kiyoshi Kato, Konami Izumi, Masahiko Hayakawa, Koichiro Kamata
  • Patent number: 7875483
    Abstract: To provide a method of easily forming a three-dimensional structure typified by a cantilever by using a thin film formed over an insulating surface, and provide a microelectromechanical system formed by such a method. A three-dimensional structure typified by a cantilever is formed by using a mask having a nonuniform thickness. Specifically, a microstructure is manufactured by processing a structural layer formed over a sacrificial layer by using a mask having a nonuniform thickness and then removing the sacrificial layer. The sacrificial layer can be formed by using a silicon layer or a metal layer.
    Type: Grant
    Filed: August 3, 2006
    Date of Patent: January 25, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Konami Izumi, Mayumi Yamaguchi, Fuminori Tateishi
  • Publication number: 20110006784
    Abstract: It is an object to provide a test method of a process, an electric characteristic, and a mechanical characteristic of a structure body in a micromachine without contact. A structure body including a first conductive layer, a second conductive layer provided in parallel to the first conductive layer, and a sacrifice layer or a space provided between the first conductive layer and the second conductive layer is provided; an antenna connected to the structure body is provided; electric power is supplied to the structure body wirelessly through the antenna; and an electromagnetic wave generated from the antenna is detected as a characteristic of the structure body.
    Type: Application
    Filed: September 23, 2010
    Publication date: January 13, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Mayumi Yamaguchi, Konami Izumi, Fuminori TATEISHI
  • Patent number: 7864115
    Abstract: The invention provides a wireless chip which can secure the safety of consumers while being small in size, favorable in communication property, and inexpensive, and the invention also provides an application thereof. Further, the invention provides a wireless chip which can be recycled after being used for managing the manufacture, circulation, and retail. A wireless chip includes a layer including a semiconductor element, and an antenna. The antenna includes a first conductive layer, a second conductive layer, and a dielectric layer sandwiched between the first conductive layer and the second conductive layer, and has a spherical shape, an ovoid shape, an oval spherical shape like a go stone, an oval spherical shape like a rugby ball, or a disc shape, or has a cylindrical shape or a polygonal prism shape in which an outer edge portion thereof has a curved surface.
    Type: Grant
    Filed: April 25, 2006
    Date of Patent: January 4, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Konami Izumi
  • Publication number: 20100285627
    Abstract: It is an object of the present invention to provide a micro-electro-mechanical-device having a microstructure and a semiconductor element over one surface. In particular, it is an object of the present invention to provide a method for simplifying the process of forming the microstructure and the semiconductor element over one surface. A space in which the microstructure is moved, that is, a movable space for the microstructure is formed by procecssing an insulating layer which is formed in a process of forming the semiconductor element. The movable space can be formed by forming the insulating layer having a plurality of openings and making the openings face each other to be overlapped each other.
    Type: Application
    Filed: July 23, 2010
    Publication date: November 11, 2010
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Fuminori TATEISHI, Konami Izumi, Mayumi Yamaguchi
  • Publication number: 20100273319
    Abstract: A method for manufacturing a semiconductor device includes: forming a first and second layers not firmly adhering to each other over a substrate; forming a first semiconductor element layer and a first insulating layer over the second layer; forming a hole reaching the first layer in the first insulating layer; oxidizing the first layer exposed at a bottom of the hole; forming a wiring electrically connected to the first semiconductor element layer over the first insulating layer and in the hole; and separating the first layer and the substrate from the second layer and the first semiconductor element layer and expose the wiring. Further, another method includes providing an anisotropic conductive adhesive between a second semiconductor element layer separated through a manufacturing process similar to the above and the wiring, whereby the first and second semiconductor element layers are electrically connected through the anisotropic conductive adhesive and the wiring.
    Type: Application
    Filed: April 26, 2010
    Publication date: October 28, 2010
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Mayumi MIKAMI, Konami IZUMI
  • Patent number: 7821279
    Abstract: A substrate including a semiconductor layer, where characteristics of an element can be evaluated with high reliability, and an evaluating method thereof are provided. A substrate including a semiconductor layer of the invention has a closed-loop circuit in which an antenna coil and a semiconductor element are connected in series, and a surface of an area over which the circuit is formed is covered with an insulating film. By using such a circuit, a contactless inspection can be carried out. Further, a ring oscillator can be substituted for the closed-loop circuit.
    Type: Grant
    Filed: March 2, 2006
    Date of Patent: October 26, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kiyoshi Kato, Konami Izumi, Masahiko Hayakawa, Koichiro Kamata
  • Patent number: 7808253
    Abstract: It is an object to provide a test method of a process, an electric characteristic, and a mechanical characteristic of a structure body in a micromachine without contact. A structure body including a first conductive layer, a second conductive layer provided in parallel to the first conductive layer, and a sacrifice layer or a space provided between the first conductive layer and the second conductive layer is provided; an antenna connected to the structure body is provided; electric power is supplied to the structure body wirelessly through the antenna; and an electromagnetic wave generated from the antenna is detected as a characteristic of the structure body.
    Type: Grant
    Filed: November 30, 2006
    Date of Patent: October 5, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Mayumi Yamaguchi, Konami Izumi, Fuminori Tateishi
  • Publication number: 20100244250
    Abstract: A step of forming a through hole in a semiconductor substrate, or a step of polishing the semiconductor substrate from its back surface requires a very long time and causes decrease of productivity. In addition, when semiconductor substrates are stacked, a semiconductor integrated circuit which is formed of the stack is thick and has poor mechanical flexibility. A release layer is formed over each of a plurality of substrates, layers each having a semiconductor element and an opening for forming a through wiring are formed over each of the release layers. Then, layers each having the semiconductor element are peeled off from the substrates, and then overlapped and stacked, a conductive layer is formed in the opening, and the through wiring is formed; thus, a semiconductor integrated circuit is formed.
    Type: Application
    Filed: June 9, 2010
    Publication date: September 30, 2010
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Mayumi YAMAGUCHI, Konami IZUMI
  • Publication number: 20100239907
    Abstract: A power storage device having a small thickness is manufactured. A manufacturing method of the power storage device includes: forming a first layer and a second layer over a first substrate; forming a first insulating layer, a positive electrode and a negative electrode over the second layer; forming a solid electrolyte layer over the first insulating layer, the positive electrode, and the negative electrode; forming a sealing layer to cover the solid electrolyte layer; forming a planarization film and a support over the sealing layer; separating the first layer and the second layer from each other so that the second layer, the positive electrode, the negative electrode, the solid electrolyte layer, the sealing layer, the planarization film, and the support are separated from the first substrate; attaching the separated structure to a second substrate which is flexible; and separating the support from the planarization film.
    Type: Application
    Filed: March 15, 2010
    Publication date: September 23, 2010
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Konami Izumi
  • Publication number: 20100227228
    Abstract: The present invention relates to a power storage device including: a positive electrode having a positive-electrode current collector, a positive-electrode active material with a plurality of first projections on the positive-electrode current collector, and a first insulator on an end of each of the plurality of first projections; a negative electrode having a negative-electrode current collector, a negative-electrode active material with a plurality of second projections on a surface of the negative-electrode current collector, and a second insulator on an end of each of the plurality of second projections; a separator between the positive electrode and the negative electrode; and an electrolyte provided in a space between the positive electrode and the negative electrode and containing carrier ions. In each of the first projections and the second projections, a ratio of the height to the width is 3 or more and 1000 or less to 1, i.e. (3 to 1000):1.
    Type: Application
    Filed: March 8, 2010
    Publication date: September 9, 2010
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei Yamazaki, Konami Izumi
  • Patent number: 7785938
    Abstract: A step of forming a through hole in a semiconductor substrate, or a step of polishing the semiconductor substrate from its back surface requires a very long time and causes decrease of productivity. In addition, when semiconductor substrates are stacked, a semiconductor integrated circuit which is formed of the stack is thick and has poor mechanical flexibility. A release layer is formed over each of a plurality of substrates, layers each having a semiconductor element and an opening for forming a through wiring are formed over each of the release layers. Then, layers each having the semiconductor element are peeled off from the substrates, and then overlapped and stacked, a conductive layer is formed in the opening, and the through wiring is formed; thus, a semiconductor integrated circuit is formed.
    Type: Grant
    Filed: April 16, 2007
    Date of Patent: August 31, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd
    Inventors: Mayumi Yamaguchi, Konami Izumi
  • Publication number: 20100209784
    Abstract: An embodiment of the present invention relates to a power storage device which includes a positive electrode having a positive-electrode current collector with a plurality of first projections, a first insulator provided over each of the plurality of first projections, and a positive-electrode active material provided on a surface of the first insulator and the positive-electrode current collector with the plurality of first projections; a negative electrode having a negative-electrode current collector with a plurality of second projections, a second insulator provided over each of the plurality of second projections, and a negative-electrode active material provided on a surface of the second insulator and the negative-electrode current collector with the plurality of second projections; a separator provided between the positive electrode and the negative electrode; and an electrolyte provided in a space between the positive electrode and the negative electrode and containing carrier ions.
    Type: Application
    Filed: February 3, 2010
    Publication date: August 19, 2010
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei Yamazaki, Konami Izumi
  • Patent number: 7776665
    Abstract: It has been difficult to manufacture a semiconductor device equipped with a microstructure having a space, an electric circuit for controlling the microstructure, and the like over one substrate. In a semiconductor device, a microstructure and an electric circuit for controlling the microstructure can be provided over one substrate by manufacturing the microstructure in such a way that a structural layer having polycrystalline silicon obtained by laser* crystallization or thermal crystallization using a metal element is formed and processed at low temperature. As the electric circuit, a wireless communication circuit for carrying out wireless communication with an antenna is given.
    Type: Grant
    Filed: December 11, 2009
    Date of Patent: August 17, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Konami Izumi, Mayumi Yamaguchi