Abstract: The present invention provides a waterproof softshell construction having a face fabric layer, a laminate layer, and a back layer. The three layers are joined at a joint seam using a sonic welder. The joint seam is covered by a seam seal, the seam seal including face fabric tape, having a first major surface and a second major surface, and stretch adhesive located on at least the first major surface of the face fabric tape. The present invention also provides a method for preparing a waterproof softshell construction. The present invention further provides a waterproof softshell construction prepared by a process including the steps of joining a face fabric layer, a laminate layer, and a backer layer at a joint seam by sonic welding and attaching face fabric tape to the joint seam using stretch adhesive.

Abstract: An interface driver circuit includes a plurality of delay cells. Each delay cell includes a data input, a delayed data output configured to communicate with the data input of an adjacent one of the plurality of delay cells. A delay time input is configured to set a delay value between receiving data at the data input and generating the delayed data output. A plurality of predrivers is configured to receive an output enable signal. A plurality of predrivers is configured to receive a corresponding one of the plurality of delayed data outputs. A plurality of predrivers is configured to generate a predriver output signal based on the output enable signal and the corresponding one of the plurality of delayed data outputs. The output enable signal enables and disables the plurality of predrivers and is independent of data of each delayed data output.

Abstract: A transformer includes a bobbin, an iron core and two spiral flat windings. The bobbin has a primary side portion, a secondary side portion and a separating plate. The separating plate is provided between the primary side portion and the secondary side portion. The first, second and third through holes are in communication with each other. The iron core penetrates the first, second and third through holes. The spiral flat winding is formed from a plurality of flat loops. The two spiral flat windings are provided on both sides of the separating plate and surround the primary side portion and the secondary side portion. Via the above arrangement, the spiral flat winding can be disposed around the bobbin, so that the assembling process can be performed simply and quickly. Thus, the working hours for assembling and the cost can be reduced.

Abstract: A circuit is adapted to activate a writer head of a data storage media drive during both the boost periods as well as the steady state periods. The current supplied to the writer head during the boost periods exceeds the steady state current and flows between positive and negative voltage supplies so as to provide the required magnetic flux change in the inductor disposed in the write head. During the steady state periods, a switch circuit is turned on to provide a second current path across the writer head. During the steady state periods, the current flows between the positive voltage supply and the ground to reduce power consumption. The switch circuit is turned off during the boost periods.

Abstract: A shipping container having side walls, a bottom and a top defining an internal volume. The top is selectively displaceable for gaining access to the internal volume and for sealing the internal volume of the container. A valve drawing a vacuum on the internal volume from outside of the container is provided. The side walls are capable of contracting and expanding as a result of the pressure within the internal volume.

Abstract: An interface driver circuit comprises N cascaded delay cells, each including a data bit input, a delayed data bit output that communicates with the data bit input of an adjacent one of the N cascaded delay cells, and a delay time input that sets delay values between receiving data at the data bit input and generating the delayed data bit output. N predrivers receive an output enable signal that is independent of the data, receive a corresponding one of the N delayed data bit outputs and generate a predriver output signal based on the output enable signal and the corresponding one of the N delayed data bit outputs.

Abstract: The present disclosure relates to increasing the external efficiency of light emitting diodes, and specifically to increasing the outcoupling of light from an organic light emitting diode utilizing a diffraction grating.

Abstract: A power transformer combined with balance windings is used for driving a CCFL. The power transformer makes use of a ferrite core structure to achieve a closed magnetic circuit, and is combined with balance windings. When used in application circuits, the power transformer combined with balance windings can provide stable induction voltages and balance load currents to CCFLs to enhance the luminous efficiency and uniformity of the CCFLs, thereby improving the drawbacks of a irregular current flowing through the CCFLs and too high a manufacturing cost of conventional CCFL application circuits.

Abstract: A fishing lure device. The device has a weighted head member configured as a fish head. In a specific embodiment, the weighted head member comprises primarily of a metal material. The weighted head member has a first end forming an apex extending to a second end. In a specific embodiment, the device has an elongated body member attached to the weighted head member at the second end. The elongated body member comprising a shaped wood material, which is buoyant. In a specific embodiment, the elongated body member extends from the second end to a tail end. The device also has a triangular cross-section characterizing a portion of the elongated body member. The triangular cross-section comprises a first side region, a second side region, and a base region. In a specific embodiment, the base region is a bottom portion of the elongated body member.

Abstract: A chip scale atomic clock is disclosed that provides a low power atomic time/frequency reference that employs direct RF-interrogation on an end-state transition.

Abstract: A chip scale atomic clock is disclosed that provides a low power atomic time/frequency reference that employs direct RF-interrogation on an end-state transition.

Abstract: A full bridge inverter includes a push/pull control chip outputting a first control signal and a second control signal. Each duty cycle of the two control signals is smaller than 50%. Moreover, both a first driver and a second driver are coupled to the push/pull control chip and a DC power. A full bridge switch assembly with four N-MOSes couples to the DC power, the first driver, the second driver and a transformer, and converts the DC power into an AC power by the first driver and the second driver. The AC power is transmitted to a first side of the transformer.

Abstract: A multi-lamp backlight module integrates the capacitors into a circuit board, and the circuit board is located on the liquid crystal display panel. The backlight module includes a driving unit having a driving transformer, and a backlight unit. The driving transformer provides two output terminals. The backlight unit includes a circuit board and at least one CCFL. The circuit board is located at the liquid crystal display panel. The circuit board has at least one capacitor, and first ends of the capacitors are commonly connected with one output terminal of the driving transformer. The CCFLs are located on a back side of the liquid crystal display panel. First ends of the CCFLs are commonly connected with another output terminal of the driving transformer, and second ends of the CCFLs are respectively connected with the second ends of the capacitors.

Abstract: The present invention discloses a current-balancing apparatus for lamps. The current-balancing apparatus includes a first transformer, a second transformer and a third transformer, and every transformer has a primary winding and a secondary winding. The current-balancing apparatus balances the current flowing through every lamp in response to the connection of those transformers and the electromagnetic induction of Runge-Lenz Theorem. The two side windings of the first transformer connect to a power stage via a first lamp and a second lamp respectively. The two side windings of the second transformer connect to the power stage via a third lamp and a fourth lamp respectively. The primary winding of the third transformer connects to the two side windings of the first transformer and the secondary winding of the third transformer connects to the two side windings of the second transformer.

Abstract: A full bridge driver includes a control chip outputting a first control signal and a second control signal, a full bridge switch assembly with four N-MOSs coupled to a DC power, a first side of a transformer, and two drivers. Moreover, one of the two drivers includes a first cut-off switch that turns off the first N-MOS in response to the first control signal, a first charging path coupled between the DC power and the second N-MOS, a first discharging path coupled between the gate end and the source end of the first N-MOS. Furthermore, another one of the two drivers includes a second cut-off switch that turns off the third N-MOS in response to the second control signal, a second charging path coupled between the DC power and the fourth N-MOS, and a second discharging path coupled between the gate end and the source end of the third N-MOS.

Abstract: A half bridge inverter includes a push/pull control chip outputting a first control signal and a second control signal. Each duty cycle of the two control signals is smaller than 50%. Moreover, both a first buffer circuit and a second buffer circuit are coupled to the push/pull control chip. A driver couples to the first buffer circuit through the push/pull control chip and couples to a DC power for receiving the first control signal. A half bridge switch assembly with two N-MOSes couples to the DC power, the driver, the second buffer circuit and a transformer, and converts the DC power into an AC power by the driver. The AC power is transmitted to a first side of the transformer.

Abstract: A half bridge inverter with dual N-MOS includes a push/pull control chip outputting a first control signal with a duty cycle greater than 50% and a second control signal with a duty cycle greater than 50%. Moreover, both a first buffer circuit and a second buffer circuit are coupled to the push/pull control chip. A driver couples to the push/pull control chip through the first buffer circuit for receiving the first control signal, and couples to a DC power. A half bridge switch assembly with two N-MOSes couples to the DC power, the driver, the second buffer circuit and a transformer, and converts the DC power into an AC power by the driver. The AC power is transmitted to a first side of the transformer.

Abstract: A structure for high voltage bearable transformers is used to electrically connect with backlight driving circuits of liquid crystal display devices. The structure for high voltage bearable transformers is comprised of at least one main bobbin, at least two sets of primary windings, and at least one set of secondary windings. The main bobbin is divided into a primary bobbin and a secondary bobbin. The primary windings are wound on the primary bobbin. The secondary windings are wound on the secondary bobbin. The structure of the high voltage bearable transformer has a tolerance for high voltage, and may connect to several driving units to export several high voltage outputs for driving cold-cathode fluorescent lamps simultaneously.

Abstract: A full bridge inverter includes a push/pull control chip outputting a first control signal and a second control signal. Each duty cycle of the two control signals is smaller than 50%. Moreover, both a first driver and a second driver are coupled to the push/pull control chip and a DC power. A full bridge switch assembly with four N-MOSes couples to the DC power, the first driver, the second driver and a transformer, and converts the DC power into an AC power by the first driver and the second driver. The AC power is transmitted to a first side of the transformer.

Abstract: A half bridge inverter with dual N-MOS includes a push/pull control chip outputting a first control signal with a duty cycle greater than 50% and a second control signal with a duty cycle greater than 50%. Moreover, both a first buffer circuit and a second buffer circuit are coupled to the push/pull control chip. A driver couples to the push/pull control chip through the first buffer circuit for receiving the first control signal, and couples to a DC power. A half bridge switch assembly with two N-MOSes couples to the DC power, the driver, the second buffer circuit and a transformer, and converts the DC power into an AC power by the driver. The AC power is transmitted to a first side of the transformer.