Abstract: An apparatus, such as a radar system that conducts beamforming operations, includes a plurality of analog-to-digital-converters (ADCs) and an error correction system coupled to the ADCs. Based upon an assessment of a plurality of errors associated with the ADCs by the error correction system, the error correction system programs sampling operations for the ADCs. The error correction system includes an error correction unit that identifies the plurality of errors associated with a plurality of sub-ADCs of the ADCs, a selection unit coupled to the error correction unit that sorts the errors associated with the plurality of sub-ADCs, and a programming unit coupled to the selection unit that reconfigures the sorted errors to generate a sequence of sampling operations for the plurality of sub-ADCs.

Abstract: In accordance with a first aspect of the present disclosure, an antenna unit is provided, comprising: an integrated circuit package containing an integrated circuit die and an antenna structure coupled to the integrated circuit die; a dielectric layer separated from the integrated circuit package, wherein the dielectric layer is placed at a predefined distance above an upper surface of the integrated circuit package. In accordance with a second aspect of the present disclosure, a corresponding method of producing an antenna unit is conceived.

Abstract: An antenna system for a mobile communications base station and a method of operating a communications network including a base station is described. The antenna system includes an antenna array for beamforming and is configured either as a radar sensor, a communications antenna or a combined radar sensor. A radar image may be used to determine a map of objects in the vicinity of the antenna system and to adapt the beam-steering or beamforming of the antenna system.

Abstract: An antenna system for a mobile communications base station and a method of operating a communications network including a base station is described. The antenna system includes an antenna array for beamforming and is configured either as a radar sensor, a communications antenna or a combined radar sensor. A radar image may be used to determine a map of objects in the vicinity of the antenna system and to adapt the beam-steering or beamforming of the antenna system.

Abstract: An antenna system for a mobile communications base station and a method of operating a communications network including a base station is described. The antenna system includes an antenna array for beamforming and is configured either as a radar sensor, a communications antenna or a combined radar sensor. A radar image may be used to determine a map of objects in the vicinity of the antenna system and to adapt the beamsteering or beamforming of the antenna system.

Abstract: An apparatus, such as a radar system that conducts beamforming operations, includes a plurality of analog-to-digital-converters (ADCs) and an error correction system coupled to the ADCs. Based upon an assessment of a plurality of errors associated with the ADCs by the error correction system, the error correction system programs sampling operations for the ADCs. The error correction system includes an error correction unit that identifies the plurality of errors associated with a plurality of sub-ADCs of the ADCs, a selection unit coupled to the error correction unit that sorts the errors associated with the plurality of sub-ADCs, and a programming unit coupled to the selection unit that reconfigures the sorted errors to generate a sequence of sampling operations for the plurality of sub-ADCs.

Abstract: A wireless transceiver system includes a transmitter and a receiver. The transmitter includes a digital processor and a self-correction modulator coupled to the digital processor, wherein based upon a calibration correction assessment of an in-phase (I) signal and a quadrature (Q) signal received from the digital processor, the self-correction modulator generates a calibrated modulated signal. The self-correction modulator includes a core modulator and a calibration correction unit. The calibration correction unit is configured to correct an output of the core modulator based upon the calibration correction assessment. The calibration correction unit includes a calibration processing unit and a calibration modulator, wherein the calibration processing unit provides correction quantities that are used to program the calibration modulator to provide the self-corrected modulated signal.

Abstract: An antenna system for a mobile communications base station and a method of operating a communications network including a base station is described. The antenna system includes an antenna array for beamforming and is configured either as a radar sensor, a communications antenna or a combined radar sensor. A radar image may be used to determine a map of objects in the vicinity of the antenna system and to adapt the beam-steering or beamforming of the antenna system.

Abstract: An antenna system for a mobile communications base station and a method of operating a communications network including a base station is described. The antenna system includes an antenna array for beamforming and is configured either as a radar sensor, a communications antenna or a combined radar sensor. A radar image may be used to determine a map of objects in the vicinity of the antenna system and to adapt the beam-steering or beamforming of the antenna system.

Abstract: A frequency estimation signal generator component arranged to receive an input frequency signal and to generate therefrom a frequency estimation signal. The frequency estimation signal generator component comprises a counter component arranged to sequentially output a sequence of control signal patterns over a plurality of digital control signals under the control of an oscillating signal derived from the received input frequency signal terns. The frequency estimation signal generator further comprises a continuous waveform generator component arranged to receive the plurality of digital control signals and a weighted analogue signal for each of the received digital control signals, and to output a continuous waveform signal comprising a sum of the weighted analogue signals for which the corresponding digital control signals comprise an asserted logical state.

Abstract: An analog-to-digital converter including a converter arrangement configured to provide a digital output signal as an output of the analog-to-digital converter based on an analog input signal comprising an input to the analog-to-digital converter, the analog-to-digital converter including a calibration module configured to provide calibration signalling to set one or more of a gain of one or more components of the converter arrangement and an offset of one or more components of the converter arrangement, the calibration module further configured to provide, as an output, diagnostic information based on the calibration signalling for use in determining the occurrence of a fault in the analog-to-digital converter.

Abstract: An analog-to-digital converter including a converter arrangement configured to provide a digital output signal as an output of the analog-to-digital converter based on an analog input signal comprising an input to the analog-to-digital converter, the analog-to-digital converter including a calibration module configured to provide calibration signalling to set one or more of a gain of one or more components of the converter arrangement and an offset of one or more components of the converter arrangement, the calibration module further configured to provide, as an output, diagnostic information based on the calibration signalling for use in determining the occurrence of a fault in the analog-to-digital converter.

Abstract: A frequency estimation signal generator component arranged to receive an input frequency signal and to generate therefrom a frequency estimation signal. The frequency estimation signal generator component comprises a counter component arranged to sequentially output a sequence of control signal patterns over a plurality of digital control signals under the control of an oscillating signal derived from the received input frequency signal terns. The frequency estimation signal generator further comprises a continuous waveform generator component arranged to receive the plurality of digital control signals and a weighted analogue signal for each of the received digital control signals, and to output a continuous waveform signal comprising a sum of the weighted analogue signals for which the corresponding digital control signals comprise an asserted logical state.

Abstract: Methods and systems for performing analog-to-digital conversion are described. In one embodiment, a method for performing analog-to-digital conversion involves processing an analog impulse signal to obtain an impulse pattern of the analog impulse signal in a first signal processing path and converting the analog impulse signal into a digital signal based on the impulse pattern in a second signal processing path that is in parallel with the first signal processing path. The impulse pattern of the analog impulse signal includes duty cycle information of the analog impulse signal. Other embodiments are also described.

Abstract: A method of performing a service scan for available channels across a bandwidth of an input signal, the method comprising the steps of: acquiring a power spectrum of the input signal bandwidth; analyzing the power spectrum to identify a list of candidate channels, each candidate channel being identified by at least a center frequency; processing each of the candidate channels in a receiver unit to extract service information, if present, relating to the candidate channel; and storing the service information for the channel in a memory.

Abstract: Various exemplary embodiments relate to a tracking system and method. The system includes a transistor switch having a gate node and a source node, a power source circuit connected to the gate node, and a bootstrapping circuit connected to the source node and to the gate node. The power source circuit charges the switch during a first tracking phase, and the bootstrapping circuit charges the switch during a second tracking phase.

Abstract: A non-binary successive approximation analogue to digital converter, for converting using successive conversion steps, is operable in first and second modes. The first and second modes have different noise properties and the converter is switched between the modes during the conversion process.

Abstract: This invention relates to Analog to Digital Converters (ADC) and, inter alia, to Time Interleaved ADCs and Successive Approximation Register (SAR) ADC's. In a conventional Time Interleaved ADC employing SAR ADC units, the input signal is processed through a track-and-hold circuit (T/H), and then through a buffer circuit, before the SAR ADC unit. There, by means of a comparator, the signal is compared with a Digital-to-Analog Converter (DAC) signal from the SAR logic. The buffer reduces the influence of capacitive loading and physical layout design on the SAR ADC input, but typically has a non-linear response and thus introduces distortion to the input signal. This can limit the ADC linearity, particularly for high-speed ADCs operating with low-supply voltages. An objective of the invention is to reduce or eliminate the effect of the buffer non-linearity. This is done in some embodiments by routing both the signals to the comparator through the same buffer circuit.

Abstract: A non-binary successive approximation analogue to digital converter, for converting using successive conversion steps, is operable in first and second modes. The first and second modes have different noise properties and the converter is switched between the modes during the conversion process.

Abstract: Various exemplary embodiments relate to a tracking system and method. The system includes a transistor switch having a gate node and a source node, a power source circuit connected to the gate node, and a bootstrapping circuit connected to the source node and to the gate node. The power source circuit charges the switch during a first tracking phase, and the bootstrapping circuit charges the switch during a second tracking phase.