Abstract: An image sensor including a substrate having first and second surfaces that are opposite to each other. The substrate includes unit pixel regions having photoelectric conversion regions. A semiconductor pattern is disposed in a first trench defined in the substrate and defines the unit pixel regions. The semiconductor pattern includes a first semiconductor pattern and a second semiconductor pattern disposed on the first semiconductor pattern. A back-side insulating layer covers the second surface of the substrate. The first semiconductor pattern includes a side portion extended along an inner side surface of the first trench and a bottom portion connected to the side portion and disposed closer to the second surface of the substrate than the side portion. The second semiconductor pattern extends toward the second surface of the substrate and is spaced apart from the back-side insulating layer with the bottom portion of the first semiconductor pattern interposed therebetween.

Abstract: An image sensor includes a photoelectric converter in a pixel area of a substrate to generate photoelectrons in response to an incident light that is incident onto the pixel area, a signal generator on a first surface of the substrate in the pixel area to generate electric signals corresponding to image information of an object in accordance with the photoelectrons, and a pixel separation pattern penetrating through the substrate from the first surface of the substrate to a second surface of the substrate opposite to the first surface of the substrate, the pixel separation pattern including an insulation pattern having a refractive index smaller than that of the substrate and a metallic conductive pattern enclosed by the insulation pattern, and the pixel area being enclosed by the pixel separation pattern and isolated from a neighboring pixel area.

Abstract: Image sensors are provided. An image sensor includes a substrate including a plurality of pixel areas. The substrate has a first surface and a second surface that is opposite the first surface. The image sensor includes a deep pixel isolation region extending from the second surface of the substrate toward the first surface of the substrate and separating the plurality of pixel areas from each other. The image sensor includes an amorphous region adjacent a sidewall of the deep pixel isolation region. Moreover, the image sensor includes an electron suppression region between the amorphous region and the sidewall of the deep pixel isolation region.

Abstract: An image includes a semiconductor substrate having a first surface and a second surface that face each other; a first photoelectric conversion region and a second photoelectric conversion region provided in the semiconductor substrate; a gapfill pattern that is interposed between the first and second photoelectric conversion regions and extends from the second surface toward the first surface, wherein a first side surface of the gapfill pattern faces the first photoelectric conversion region and a second side surface of the gapfill pattern faces the second photoelectric conversion region; and a conductive pattern disposed on the gapfill pattern. The conductive pattern includes a first portion disposed on the first side surface, a second portion disposed on the second side surface, and a connecting portion that is disposed on a top surface of the gapfill pattern and electrically connects the first portion to the second portion.

Abstract: Disclosed are a substrate processing apparatus and a method of cleaning the apparatus. The apparatus includes a process chamber, a support unit in the process chamber and configured to support a substrate, and a gas injection unit in the process chamber. The gas injection unit includes a first injection portion configured to inject a source gas, a second injection portion facing the first injection portion and configured to inject a reaction gas that reacts with the source gas, and a third injection portion configured to inject a cleaning gas that removes a reactant produced from the source gas and the reaction gas.

Abstract: Image sensors are provided. An image sensor includes a substrate including a plurality of pixel areas. The substrate has a first surface and a second surface that is opposite the first surface. The image sensor includes a deep pixel isolation region extending from the second surface of the substrate toward the first surface of the substrate and separating the plurality of pixel areas from each other. The image sensor includes an amorphous region adjacent a sidewall of the deep pixel isolation region. Moreover, the image sensor includes an electron suppression region between the amorphous region and the sidewall of the deep pixel isolation region.

Abstract: An image includes a semiconductor substrate having a first surface and a second surface that face each other; a first photoelectric conversion region and a second photoelectric conversion region provided in the semiconductor substrate; a gapfill pattern that is interposed between the first and second photoelectric conversion regions and extends from the second surface toward the first surface, wherein a first side surface of the gapfill pattern faces the first photoelectric conversion region and a second side surface of the gapfill pattern faces the second photoelectric conversion region; and a conductive pattern disposed on the gapfill pattern. The conductive pattern includes a first portion disposed on the first side surface, a second portion disposed on the second side surface, and a connecting portion that is disposed on a top surface of the gapfill pattern and electrically connects the first portion to the second portion.

Abstract: An image sensor may include a substrate including first and second surfaces opposite each other, a plurality of photoelectric conversion devices isolated from direct contact with each other within the substrate, a first trench configured to extend into an interior of the substrate from the first surface of the substrate and between adjacent photoelectric conversion devices of the plurality of photoelectric conversion devices, a first supporter within the first trench, and a first isolation layer at least partially covering both sidewalls of the first supporter within the first trench, wherein a lower surface of the first supporter is coplanar with the first surface of the substrate.

Abstract: An image sensor including a semiconductor substrate having a first surface and a second surface; and a pixel isolation film extending from the first surface of the semiconductor substrate into the semiconductor substrate and defining active pixels in the semiconductor substrate, wherein the pixel isolation film includes a buried conductive layer including polysilicon containing a fining element at a first concentration; and an insulating liner between the buried conductive layer and the semiconductor substrate, and wherein the fining element includes oxygen, carbon, or fluorine.

Abstract: An image sensor includes a photoelectric converter in a pixel area of a substrate to generate photoelectrons in response to an incident light that is incident onto the pixel area, a signal generator on a first surface of the substrate in the pixel area to generate electric signals corresponding to image information of an object in accordance with the photoelectrons, and a pixel separation pattern penetrating through the substrate from the first surface of the substrate to a second surface of the substrate opposite to the first surface of the substrate, the pixel separation pattern including an insulation pattern having a refractive index smaller than that of the substrate and a metallic conductive pattern enclosed by the insulation pattern, and the pixel area being enclosed by the pixel separation pattern and isolated from a neighboring pixel area.

Abstract: Image sensors are provided. An image sensor includes a substrate including a plurality of pixel areas. The substrate has a first surface and a second surface that is opposite the first surface. The image sensor includes a deep pixel isolation region extending from the second surface of the substrate toward the first surface of the substrate and separating the plurality of pixel areas from each other. The image sensor includes an amorphous region adjacent a sidewall of the deep pixel isolation region. Moreover, the image sensor includes an electron suppression region between the amorphous region and the sidewall of the deep pixel isolation region.

Abstract: A dummy gate electrode layer and a dummy gate mask layer may be formed on a substrate. The dummy gate mask layer may be patterned to form a dummy gate mask so that a portion of the dummy gate electrode layer is exposed. Ions may be implanted into the exposed portion of the dummy gate electrode layer and a portion of the dummy gate electrode layer adjacent thereto by an angled ion implantation to form a growth blocking layer in the dummy gate electrode layer. The dummy gate electrode layer may be etched using the dummy gate mask as an etching mask to form a dummy gate electrode. A spacer may be formed on side surfaces of a dummy gate structure including the dummy gate electrode and the dummy gate mask. An SEG process may be performed to form an epitaxial layer.

Abstract: Disclosed are a substrate processing apparatus and a method of cleaning the apparatus. The apparatus includes a process chamber, a support unit in the process chamber and configured to support a substrate, and a gas injection unit in the process chamber. The gas injection unit includes a first injection portion configured to inject a source gas, a second injection portion facing the first injection portion and configured to inject a reaction gas that reacts with the source gas, and a third injection portion configured to inject a cleaning gas that removes a reactant produced from the source gas and the reaction gas.

Abstract: A dummy gate electrode layer and a dummy gate mask layer may be formed on a substrate. The dummy gate mask layer may be patterned to form a dummy gate mask so that a portion of the dummy gate electrode layer is exposed. Ions may be implanted into the exposed portion of the dummy gate electrode layer and a portion of the dummy gate electrode layer adjacent thereto by an angled ion implantation to form a growth blocking layer in the dummy gate electrode layer. The dummy gate electrode layer may be etched using the dummy gate mask as an etching mask to form a dummy gate electrode. A spacer may be formed on side surfaces of a dummy gate structure including the dummy gate electrode and the dummy gate mask. An SEG process may be performed to form an epitaxial layer.

Abstract: A dummy gate electrode layer and a dummy gate mask layer may be formed on a substrate. The dummy gate mask layer may be patterned to form a dummy gate mask so that a portion of the dummy gate electrode layer is exposed. Ions may be implanted into the exposed portion of the dummy gate electrode layer and a portion of the dummy gate electrode layer adjacent thereto by an angled ion implantation to form a growth blocking layer in the dummy gate electrode layer. The dummy gate electrode layer may be etched using the dummy gate mask as an etching mask to form a dummy gate electrode. A spacer may be formed on side surfaces of a dummy gate structure including the dummy gate electrode and the dummy gate mask. An SEG process may be performed to form an epitaxial layer.

Abstract: Semiconductor device, method for fabricating the same and electronic devices including the semiconductor device are provided. The semiconductor device comprises an interlayer insulating layer formed on a substrate and including a trench, a gate electrode formed in the trench, a first gate spacer formed on a side wall of the gate electrode to have an L shape, a second gate spacer formed on the first gate spacer to have an L shape and having a dielectric constant lower than that of silicon nitride, and a third spacer formed on the second gate spacer.

Abstract: A dummy gate electrode layer and a dummy gate mask layer may be formed on a substrate. The dummy gate mask layer may be patterned to form a dummy gate mask so that a portion of the dummy gate electrode layer is exposed. Ions may be implanted into the exposed portion of the dummy gate electrode layer and a portion of the dummy gate electrode layer adjacent thereto by an angled ion implantation to form a growth blocking layer in the dummy gate electrode layer. The dummy gate electrode layer may be etched using the dummy gate mask as an etching mask to form a dummy gate electrode. A spacer may be formed on side surfaces of a dummy gate structure including the dummy gate electrode and the dummy gate mask. An SEG process may be performed to form an epitaxial layer.

Abstract: Semiconductor device, method for fabricating the same and electronic devices including the semiconductor device are provided. The semiconductor device comprises an interlayer insulating layer formed on a substrate and including a trench, a gate electrode formed in the trench, a first gate spacer formed on a side wall of the gate electrode to have an L shape, a second gate spacer formed on the first gate spacer to have an L shape and having a dielectric constant lower than that of silicon nitride, and a third spacer formed on the second gate spacer.

Abstract: Semiconductor devices and methods for fabricating the same are provided. The semiconductor devices include a fin active pattern formed to project from a substrate, a gate electrode formed to cross the fin active pattern on the substrate, a gate spacer formed on a side wall of the gate electrode and having a low dielectric constant and an elevated source/drain formed on both sides of the gate electrode on the fin active pattern. The gate spacer includes first, second and third spacers that sequentially come in contact with each other in a direction in which the gate spacer goes out from the gate electrode, and a carbon concentration of the second spacer is lower than carbon concentrations of the first and third spacers.

Abstract: Semiconductor device, method for fabricating the same and electronic devices including the semiconductor device are provided. The semiconductor device comprises an interlayer insulating layer formed on a substrate and including a trench, a gate electrode formed in the trench, a first gate spacer formed on a side wall of the gate electrode to have an L shape, a second gate spacer formed on the first gate spacer to have an L shape and having a dielectric constant lower than that of silicon nitride, and a third spacer formed on the second gate spacer.