Patents by Inventor Koon Hoo Teo

Koon Hoo Teo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200321443
    Abstract: A transistor includes a gate electrode with multiple metals distributed along the width of the gate electrode. Each of the metals in the gate electrode has different work functions. Such a compound gate provides higher linearity when, e.g., operated as a radio frequency transistor.
    Type: Application
    Filed: June 18, 2020
    Publication date: October 8, 2020
    Applicant: Mitsubishi Electric Research Laboratories, Inc.
    Inventors: Koon Hoo Teo, Nadim Chowdhury
  • Patent number: 10797633
    Abstract: A thermal emitter including a substrate and a grating arranged atop the substrate, the grating includes a plurality of equidistant structures having a cross-section with a trapezoid shape. Material of the substrate and the grating converts incoming heat into radiation.
    Type: Grant
    Filed: November 10, 2016
    Date of Patent: October 6, 2020
    Assignee: Mitsubishi Electric Research Laboratories, Inc.
    Inventors: Bingnan Wang, Chungwei Lin, Jianjian Wang, Koon Hoo Teo
  • Publication number: 20200303417
    Abstract: Devices and methods of a transistor device that include a flexible memory cell. The flexible memory cell having a gate stack with sidewalls provided over a substrate. The gate stack including a metal gate layer provided over the substrate. A buffer layer provided over the metal gate layer. A ferroelectric layer provided over the buffer layer. A dielectric layer provided over the ferroelectric layer. Further, a two-dimensional (2D) material layer provided over a portion of a top surface of the dielectric layer. Source and drain regions provided on separate portions of the top surface of the dielectric layer so as to create a cavity that the 2D material layer are located.
    Type: Application
    Filed: March 18, 2019
    Publication date: September 24, 2020
    Applicant: Mitsubishi Electric Research Laboratories, Inc.
    Inventors: Koon Hoo Teo, Pin-Chun Shen, Chungwei Lin
  • Publication number: 20200204139
    Abstract: Devices, system and methods a circuit, including a resistor, a normal capacitor and a ferroelectric capacitor connected in series. An input terminal to provide an input voltage across the circuit. An output terminal to deliver an output voltage taken across the normal capacitor. The circuit comprises a ferroelectric layer sandwiched between a first buffer layer and a second buffer layer. The first buffer layer contacts a portion of a first metal layer and first metal layer extends beyond the first buffer layer. A dielectric layer sandwiched between a second metal layer and a third metal layer. Such that the second metal layer extends beyond the dielectric layer and in contact with the second buffer layer. Wherein the ferroelectric capacitor is formed by the first metal layer. The ferroelectric layer sandwiched between the first buffer layer and the second buffer layer, and the second metal layer.
    Type: Application
    Filed: December 20, 2018
    Publication date: June 25, 2020
    Applicant: Mitsubishi Electric Research Laboratories, Inc.
    Inventors: Koon Hoo Teo, Pin Chun Shen, Chungwei Lin
  • Patent number: 10658501
    Abstract: A high electron mobility transistor (HEMT) includes a channel semiconductor structure including a stack of layers arranged on top of each other in an order of magnitudes of the polarization of materials of the layers to form multiple carrier channels at heterojunctions formed by each pair of layers in the stack. The stack of layers includes a first layer and a second layer. The magnitude of polarization of the first layer is greater than the magnitude of polarization of the second layer arranged in the stack below the first layer, and the width of the first layer is less than the width of the second layer to form a staircase profile of the semiconductor structure. The HEMT includes a source semiconductor structure including a heavily doped semiconductor material, a drain semiconductor structure including the heavily doped semiconductor material. The HEMT includes a source, a drain, and a gate electrodes to modulate the conductivity of the carrier channels.
    Type: Grant
    Filed: February 21, 2018
    Date of Patent: May 19, 2020
    Assignee: Mitsubishi Electric Research Laboratories, Inc.
    Inventors: Koon Hoo Teo, Nadim Chowdhury
  • Patent number: 10658968
    Abstract: A thermoradiative device for generating power includes a thermoradiative element having a top surface and a bottom surface, wherein the thermoradiative element is a semiconductor material having a bandgap energy Eg. The device includes a thermal conductive element having a first surface and a second surface, wherein the first surface is arranged to face the bottom surface of the thermoradiative element, and the first surface is a structured surface having a periodic structure, wherein the structured surface is separated from the bottom surface with a distance d to establish near-field resonance between the bottom surface and the structured surface. The device further includes supporters configured to bond the thermoradiative element and the thermal conductive element.
    Type: Grant
    Filed: January 9, 2018
    Date of Patent: May 19, 2020
    Assignee: Mitsubishi Electric Research Laboratories, Inc.
    Inventors: Bingnan Wang, Chungwei Lin, Koon Hoo Teo
  • Patent number: 10622960
    Abstract: A filter includes a circuit including a resistor, a positive capacitor, and a negative capacitor connected in series to accept the same current. The filter also includes an input terminal to accept an input voltage across the circuit and an output terminal to deliver an output voltage taken across the resistor or the positive capacitor.
    Type: Grant
    Filed: October 17, 2017
    Date of Patent: April 14, 2020
    Assignee: Mitsubishi Electric Research Laboratories, Inc.
    Inventors: Koon Hoo Teo, Nadim Chowdhury
  • Patent number: 10497821
    Abstract: A thermophotovoltaic (TPV) energy converter includes a thermal emitter to generate photons of energy in response to receiving heat and a thermal receiver arranged at a distance from the thermal emitter. The thermal receiver includes a photovoltaic cell converting the received photons into electric energy. The thermal emitter includes a first layer of material arranged on a surface of the thermal emitter closest to the thermal receiver. The thermal receiver includes a second layer of material arranged on a surface of the thermal receiver closest to the thermal emitter. The first layer of material and the second layer of material have surface resonant frequencies above a bandgap of the photovoltaic cell.
    Type: Grant
    Filed: March 24, 2017
    Date of Patent: December 3, 2019
    Assignee: Mitsubishi Electric Research Laboratories, Inc.
    Inventors: Chungwei Lin, Bingnan Wang, Koon Hoo Teo
  • Patent number: 10418474
    Abstract: A high electron mobility transistor (HEMT) includes a semiconductor structure including a cap layer and a channel layer forming a heterojunction, such that a two dimensional electron gas is formed at the interface of cap layer and the channel layer. The HEMT also includes a set of electrodes including a source electrode, a drain electrode, and a gate electrode deposited on the cap layer. The gate electrode is arranged between the source and the drain electrode along the length of the HEMT. The thickness of the cap layer at least under the gate electrode is varying along the width of the HEMT.
    Type: Grant
    Filed: October 17, 2017
    Date of Patent: September 17, 2019
    Assignee: Mitsubishi Electric Research Laboratories, Inc.
    Inventors: Koon Hoo Teo, Nadim Chowdhury
  • Patent number: 10411125
    Abstract: A semiconductor device includes a semiconductor structure including a first doped layer for forming a carrier channel having a carrier charge, a second doped layer having a conductivity type identical to a conductivity type of the first doped layer, a barrier layer arranged in proximity to the semiconductor structure via the second doped layer, wherein the barrier layer includes a partially doped layer having a conductivity type opposite to the conductivity type of the second doped layer, and a set of electrodes for providing and controlling the carrier charge in the carrier channel.
    Type: Grant
    Filed: November 23, 2016
    Date of Patent: September 10, 2019
    Assignee: Mitsubishi Electric Research Laboratories, Inc.
    Inventors: Koon Hoo Teo, Chenjie Tang
  • Publication number: 20190259866
    Abstract: A high electron mobility transistor (HEMT) includes a channel semiconductor structure including a stack of layers arranged on top of each other in an order of magnitudes of the polarization of materials of the layers to form multiple carrier channels at heterojunctions formed by each pair of layers in the stack. The stack of layers includes a first layer and a second layer. The magnitude of polarization of the first layer is greater than the magnitude of polarization of the second layer arranged in the stack below the first layer, and the width of the first layer is less than the width of the second layer to form a staircase profile of the semiconductor structure. The HEMT includes a source semiconductor structure including a heavily doped semiconductor material, a drain semiconductor structure including the heavily doped semiconductor material. The HEMT includes a source, a drain, and a gate electrodes to modulate the conductivity of the carrier channels.
    Type: Application
    Filed: February 21, 2018
    Publication date: August 22, 2019
    Inventors: Koon Hoo Teo, Nadim Chowdhury
  • Publication number: 20190206758
    Abstract: A negative electroluminescent cooling device including a first layer of material; a second layer of material arranged at a non-zero distance from the first layer of material with help of a set of supporters, and an energy source to apply a reverse bias voltage to the first layer of material to cool the second layer of material. The material of the first layer is a semiconductor with a bandgap less or equal to a surface resonant energy of the second layer of material.
    Type: Application
    Filed: January 4, 2018
    Publication date: July 4, 2019
    Inventors: Chungwei Lin, Bingnan Wang, Koon Hoo Teo
  • Patent number: 10288759
    Abstract: A sensor including a set of coils. The set of coils include a first coil and a second coil, wherein the first coil upon receiving energy, generates an electromagnetic near-field, such that the electromagnetic near-field provides at least a portion of the energy to the second coil through inductive coupling, inducing a current to pass through the set of coils. Further, a detector for measuring a voltage across at least one of the first coil or the second coil, wherein the detector includes a voltmeter. Finally, a processor for detecting a presence of a target structure in proximity to the set of coils upon detecting a change in a value of the voltage, wherein the target structure is an electromagnetic structure moving at a distance from the set of coils.
    Type: Grant
    Filed: July 14, 2016
    Date of Patent: May 14, 2019
    Assignee: Mitsubishi Electric Research Laboratories, Inc.
    Inventors: Bingnan Wang, Koon Hoo Teo, Philip Orlik
  • Patent number: 10276704
    Abstract: A high electron mobility transistor includes a semiconductor structure having a channel layer and a cap layer forming a two dimensional electron gas (2-DEG) channel, and a source, a drain, and a gate electrodes. The gate is arranged on the cap layer between the source and the drains, such that the conductivity of the 2-DEG channel is modulated in response to applying voltage to the gate. The cap layer includes III-N material. The gate has a layered structure including a bottom metal layer arranged on cap layer, a ferroelectric oxide (FEO) layer arranged on bottom metal layer, and a top metal layer arranged on the FEO layer. Thickness of FEO layer is less than tcap/(2??cap), wherein ? is a parameter of material of FEO layer, tcap is thickness of cap layer, and ?cap is electric permittivity of cap layer.
    Type: Grant
    Filed: October 17, 2017
    Date of Patent: April 30, 2019
    Assignee: Mitsubishi Electric Research Laboratiories, Inc.
    Inventors: Koon Hoo Teo, Nadim Chowdhury
  • Patent number: 10270510
    Abstract: A transmitter including radio-frequency (RF) chains. Each RF chain includes a power amplifier, a band-pass filter, and an antenna for transmitting an analog signal using a beamforming with an angle of departure (AOD) defined by phase shifts of the analog signals transmitted by the RF chains. A processor to determine digital signals for transmission from the RF chains. Wherein there is one-to-one correspondence between a digital signal and an RF chain. An encoder to encode the digital signals with binary codes to produce a set of encoded digital signals and to combine the encoded digital signals into a combined digital signal. A digital-to-analog converter to convert the combined digital signal into an analog domain to produce a combined analog signal. A decoder to decode, using the binary codes, the combined analog signal into a set of analog signals and to submit the analog signals into the corresponding RF chains.
    Type: Grant
    Filed: March 19, 2018
    Date of Patent: April 23, 2019
    Assignee: Mitsubishi Electric Research Laboratories, Inc.
    Inventors: Bingnan Wang, Zhengyu Peng, Kyeongjin Kim, Pu Wang, Rui Ma, Koon Hoo Teo
  • Publication number: 20190115445
    Abstract: A high electron mobility transistor includes a semiconductor structure having a channel layer and a cap layer forming a two dimensional electron gas (2-DEG) channel, and a source, a drain, and a gate electrodes. The gate is arranged on the cap layer between the source and the drains, such that the conductivity of the 2-DEG channel is modulated in response to applying voltage to the gate. The cap layer includes III-N material. The gate has a layered structure including a bottom metal layer arranged on cap layer, a ferroelectric oxide (FEO) layer arranged on bottom metal layer, and a top metal layer arranged on the FEO layer. Thickness of FEO layer is less than tcap/(2??cap), wherein ? is a parameter of material of FEO layer, tcap is thickness of cap layer, and ?cap is electric permittivity of cap layer.
    Type: Application
    Filed: October 17, 2017
    Publication date: April 18, 2019
    Inventors: Koon Hoo Teo, Nadim Chowdhury
  • Publication number: 20190115898
    Abstract: A filter includes a circuit including a resistor, a positive capacitor, and a negative capacitor connected in series to accept the same current. The filter also includes an input terminal to accept an input voltage across the circuit and an output terminal to deliver an output voltage taken across the resistor or the positive capacitor.
    Type: Application
    Filed: October 17, 2017
    Publication date: April 18, 2019
    Inventors: Koon Hoo Teo, Nadim Chowdhury
  • Publication number: 20190115463
    Abstract: A high electron mobility transistor includes a set of electrodes, such as a source, a drain, a top gate, and a side gate, and includes a semiconductor structure having a fin extending between the source and the drain. The top gate is arranged on top of the fin, and the side gate is arranged on a sidewall of the fin at a distance from the top gate. The semiconductor structure includes a cap layer positioned beneath the top gate and a channel layer arranged beneath the cap layer for providing electrical conduction. The cap layer includes nitride-based semiconductor material to enable a heterojunction forming a carrier channel between the source and the drain.
    Type: Application
    Filed: October 17, 2017
    Publication date: April 18, 2019
    Inventors: Koon Hoo Teo, Nadim Chowdhury
  • Publication number: 20190115462
    Abstract: A high electron mobility transistor (HEMT) includes a semiconductor structure including a cap layer and a channel layer forming a heterojunction, such that a two dimensional electron gas is formed at the interface of cap layer and the channel layer. The HEMT also includes a set of electrodes including a source electrode, a drain electrode, and a gate electrode deposited on the cap layer. The gate electrode is arranged between the source and the drain electrode along the length of the HEMT. The thickness of the cap layer at least under the gate electrode is varying along the width of the HEMT.
    Type: Application
    Filed: October 17, 2017
    Publication date: April 18, 2019
    Inventors: Koon Hoo Teo, Nadim Chowdhury
  • Publication number: 20190115442
    Abstract: A transistor includes a gate electrode with multiple metals distributed along the width of the gate electrode. Each of the metals in the gate electrode has different work functions. Such a compound gate provides higher linearity when, e.g., operated as a radio frequency transistor.
    Type: Application
    Filed: October 17, 2017
    Publication date: April 18, 2019
    Inventors: Koon Hoo Teo, Nadim Chowdhury