Patents by Inventor Koosei Maemura

Koosei Maemura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5760652
    Abstract: An integrated circuit device includes a power amplifier having an FET; a negative voltage generator for supplying a negative voltage to the power amplifier; a power supply terminal receiving a positive power supply voltage through an external switch and applying the positive power supply voltage to the negative voltage generator and, through an internal switch, to the power amplifier; and a negative voltage detector for detecting the negative voltage output from the negative voltage generator and sending a control signal to the internal switch so that the internal switch is closed when the output voltage from the negative voltage generator is lower than a threshold negative voltage and open when the output voltage is higher than the threshold negative voltage. It is not necessary to supply an external negative voltage as a gate bias voltage of the FET.
    Type: Grant
    Filed: September 19, 1996
    Date of Patent: June 2, 1998
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Koosei Maemura, Kazuya Yamamoto