Integrated circuit device
An integrated circuit device includes a power amplifier having an FET; a negative voltage generator for supplying a negative voltage to the power amplifier; a power supply terminal receiving a positive power supply voltage through an external switch and applying the positive power supply voltage to the negative voltage generator and, through an internal switch, to the power amplifier; and a negative voltage detector for detecting the negative voltage output from the negative voltage generator and sending a control signal to the internal switch so that the internal switch is closed when the output voltage from the negative voltage generator is lower than a threshold negative voltage and open when the output voltage is higher than the threshold negative voltage. It is not necessary to supply an external negative voltage as a gate bias voltage of the FET. Since the positive power voltage is applied to both the power amplifier and the negative voltage generator, an external power supply control circuit outputs only one control signal to control the external switch. It is not necessary to set a time interval from application of the power supply voltage to the negative voltage generator until application of the power supply voltage to the power amplifier in advance so that power dissipation is significantly reduced.
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Claims
1. An integrated circuit device comprising:
- a power amplifier comprising a field effect transistor;
- a negative voltage generator for supplying a negative voltage to the power amplifier;
- an internal switch;
- a positive power supply terminal for receiving a positive power supply voltage through an external switch and applying the positive power supply voltage to the negative voltage generator and, through the internal switch, to a power supply terminal of the power amplifier; and
- a negative voltage detector for detecting the voltage output from the negative voltage generator and sending a control signal to the internal switch so that the internal switch is closed when the voltage output from the negative voltage generator is lower than a threshold negative voltage and the internal switch is open when the voltage output from the negative voltage generator is higher than the threshold negative voltage.
2. An integrated circuit device comprising:
- a power amplifier having a power supply terminal;
- a negative voltage generator for supplying a negative voltage to the power amplifier;
- a first power supply terminal for receiving a positive power supply voltage through an external switch and supplying the positive power supply voltage to a power supply terminal of the power amplifier;
- a second power supply terminal for receiving the positive power supply voltage through a second external switch and supplying the positive power supply voltage to the negative voltage generator; and
- a negative voltage detector for detecting the voltage output from the negative voltage generator and sending a control signal to the first external switch so that the first external switch is closed when the voltage output from the negative voltage generator is lower than a threshold negative voltage and the first external switch is open when the voltage output from the negative voltage generator is higher than the threshold negative voltage.
3. The integrated circuit device of claim 1 comprising a capacitor connected between the power supply terminal of the power amplifier and ground.
4. The integrated circuit device of claim 1 wherein the negative voltage detector comprises:
- an input circuit comprising:
- a normally off first field effect transistor having a gate, a drain, and a source receiving the voltage output from the negative voltage generator,
- a first load circuit connected between the drain of the first field effect transistor and the positive power supply terminal, and
- a voltage drop circuit producing a voltage drop so that the voltage at the gate becomes lower than ground, and
- an inverter circuit comprising:
- a normally off second field effect transistor having a gate, a drain, and a source, the gate being connected to the drain of the first field effect transistor, and the drain outputting the control signal, and
- a second load circuit connected between the drain of the second field effect transistor and the positive power supply terminal.
5. The integrated circuit device of claim 4 wherein the voltage drop circuit comprises a plurality of diodes connected in series with anodes connected to the ground.
6. The integrated circuit device of claim 4 wherein the voltage drop circuit comprises a diode and a third field effect transistor having a gate and a drain connected together, the diode and transistor are connected in series with the drain of the transistor connected to a cathode of the diode, and an anode of the diode connected to the ground.
7. The integrated circuit device of claim 1 wherein the field effect transistor of the power amplifier has a channel layer with a depth and a dopant concentration, a gate width, and a gate length, and the negative voltage detector is an inverter circuit comprising:
- a normally on field effect transistor including a drain, a gate, and a channel layer, the channel layer of the normally on field effect transistor having the same depth and dopant concentration as the field effect transistor of the power amplifier, the gate receiving the voltage output from the negative voltage generator, and the drain outputting the control signal; and
- a load circuit connected between the drain of the normally on field effect transistor and the positive power supply terminal.
8. The integrated circuit device of claim 7 wherein the normally on field effect transistor has the same gate length, as the field effect transistor of the power amplifier, and a gate width larger than 10.mu.m.
9. The integrated circuit device of claim 7 wherein the normally on field effect transistor has the same gate length as the field effect transistor of the power amplifier, and a gate width narrower than the gate width of the field effect transistor of the power supply amplifier and longer than 2.mu.m.
10. The integrated circuit device of claim 7 wherein the normally on field effect transistor has a gate length longer than the gate length of the field effect transistor of the power amplifier and longer than 2.mu.m.
Type: Grant
Filed: Sep 19, 1996
Date of Patent: Jun 2, 1998
Assignee: Mitsubishi Denki Kabushiki Kaisha (Tokyo)
Inventors: Koosei Maemura (Tokyo), Kazuya Yamamoto (Tokyo)
Primary Examiner: Steven Mottola
Law Firm: Leydig, Voit & Mayer, Ltd.
Application Number: 8/716,051
International Classification: H03F 316;