Abstract: In an embodiment a component assembly includes a plurality of components, a carrier, wherein the components are secured on the carrier by a connecting layer, wherein, for each component, the connecting layer forms at least one supporting structure at which the connecting layer is adjacent to the component, and a sacrificial layer arranged regionally between the components and the connecting layer, wherein one portion of the components is assigned to a first group, wherein a further portion of the components is assigned to a second group, and wherein the components of the first group are different than the components of the second group in respect of a coverage with the sacrificial layer.

Abstract: An optoelectronic semiconductor chip may have or include an x-doped region, a y-doped region, an active region arranged between the x-doped region and the y-doped region, and an x-contact region. The x-contact region may be arranged to the side of the x-doped region facing away from the active region. The x-contact region may include at least one first region and at least one second region. The x-contact region may be designed such that, during operation of the optoelectronic semiconductor chip, more charge carriers are injected into the x-doped region via the second region than via the first region.

Abstract: In an embodiment an optoelectronic semiconductor chip includes a semiconductor layer sequence with a bottom side, a bottom coating located on the bottom side and an electrode layer located on an underside of the bottom coating facing away from the semiconductor layer sequence, wherein the bottom coating has a thickness gradient and at least one ridge line at which the bottom coating is thickest, wherein the electrode layer extends over the at least one ridge line such that a contact side of the electrode layer facing away from the semiconductor layer sequence follows the bottom coating true to shape, and wherein an electrical and mechanical contact plane of the contact side parallel to the bottom side is defined by the at least one ridge line.

Abstract: In an embodiment an optoelectronic assembly includes a carrier having at least one contact region, at least one optoelectronic device arranged on the at least one contact region, a beam guiding element having a transparent material, arranged on the carrier, completely encasing the optoelectronic device and at least partially covering surface areas of the optoelectronic device, wherein the beam guiding element sheaths at least three optoelectronic devices and covers the surface areas of the optoelectronic devices, and wherein the optoelectronic devices are configured to generate light of different colors and a transparent conductive layer arranged at the beam guiding element at least in some regions on its surface, wherein the beam guiding element has a recess through which the at least one contact region is exposed on a side of the optoelectronic device facing away from the carrier, and wherein the recess is at least partially filled with a conductive material which is connected to the transparent conductive

Abstract: In at least one embodiment an optoelectronic semiconductor chip includes an emission side, an assembly side opposite the emission side, and a semiconductor body. The semiconductor body includes a first semiconductor layer, a second semiconductor layer, and an active zone between the first semiconductor layer and the second semiconductor layer. The semiconductor body further has at least two emission regions arranged next to each other as in view of the emission side. A first emission region includes a first portion of the active zone and a second emission region including a second portion of the active zone. The emission regions are monolithically integrated in the semiconductor body. In a cross-section along a main extension plane of the active zone, the first portion of the active zone has an area at least twice as large as the second portion of the active zone.

Abstract: In one embodiment, the optoelectronic semiconductor device comprises a semiconductor layer sequence and an electrical via. The semiconductor layer sequence includes an active zone for generating radiation and a contact layer for electrical contacting. The active zone lies in a plane perpendicular to a main growth direction of the semiconductor layer sequence and is located between a first semiconductor region and a second semiconductor region. The contact layer is located within the second semiconductor region. The via extends through the contact layer and preferably ends within the second semiconductor region. A contact surface between the via and the contact layer encloses a contact angle of at least 20° and at most 60° with respect to the plane.

Abstract: A radiation-emitting semiconductor chip may include a semiconductor body, a reflector, at least one cavity, and a seal. The semiconductor body may include an active region configured to generate electronic radiation. The reflector may be configured to reflect a portion of the electromagnetic radiation. The cavity may be filled with a material having a refractive index not exceeding 1.1. The seal may be impermeable to the material. The cavity may be arranged between the reflector and the semiconductor body, and the seal may cover the underside of the reflector.

Abstract: An optoelectronic semiconductor component includes a layer stack, a first and second contact means, an electrically conductive edge layer, and a first dielectric layer. The layer stack includes a side surface and a first and a second main surface. The first and second contact means may be arranged at the first and second main surfaces, respectively. Said contact means may electrically contact a first and second semiconductor region of the layer stack, respectively. The second contact means may be radiation-transmissive. The electrically conductive edge layer may be arranged on the layer stack and extend from the second contact means over the side surface as far as the first main surface. The first dielectric layer may be arranged between the edge layer and the layer stack. The second main surface may not be covered by the first dielectric layer.

Abstract: An optoelectronic semiconductor element may include an optoelectronic semiconductor chip. The optoelectronic semiconductor chip may include a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type, a first contact element connected to the first semiconductor layer in an electrically conductive manner, and a second contact element connected to the second semiconductor layer in an electrically conductive manner. The first semiconductor layer and the second semiconductor layer are arranged one above the other to form a layer stack. The first semiconductor layer to where the second semiconductor layer is exposed. The first contact element is arranged over the first semiconductor layer, and the second contact element is arranged over the first semiconductor layer.

Abstract: In an embodiment a component assembly includes a plurality of components, a carrier, wherein the components are secured on the carrier by a connecting layer, wherein, for each component, the connecting layer forms at least one supporting structure at which the connecting layer is adjacent to the component, and a sacrificial layer arranged regionally between the components and the connecting layer, wherein one portion of the components is assigned to a first group, wherein a further portion of the components is assigned to a second group, and wherein the components of the first group are different than the components of the second group in respect of a coverage with the sacrificial layer.

Abstract: A method for sorting optoelectronic semiconductor components is specified. The semiconductor components each include an active region for emission or detection of electromagnetic radiation. The method includes the following steps: introducing the semiconductor components into a sorting region on a specified path; irradiating the optoelectronic semiconductor components with electromagnetic radiation of a first wavelength range to generate dipole moments by charge separation in the active regions of the optoelectronic semiconductor components; and deflecting the optoelectronic semiconductor components from the specified path as a function of their dipole moment by means of a non-homogeneous electromagnetic field. A device for sorting optoelectronic semiconductor components is further specified.

Abstract: An optoelectronic arrangement is specified, including a moulded body having a base surface, a first pixel group with a multiplicity of pixels assigned thereto, each having a first semiconductor region, a second semiconductor region and an active region, a multiplicity of separating structures arranged between the pixels, and at least one first contact structure having a first contact plane and a first contact location, which is freely accessible at the base surface, wherein the pixels of the first pixel group are arranged alongside one another at the top surface, the first semiconductor regions and/or the second semiconductor regions of adjacent pixels of the first pixel group are electrically insulated from one another by means of the separating structures, a first contact structure is assigned one-to-one to the first pixel group, and the first semiconductor regions of the pixels of the first pixel group are electrically conductively connected to one another by means of the first contact plane and are electr

Abstract: In an embodiment a method for producing radiation-emitting semiconductor chips includes providing a semiconductor wafer, applying first contact layers on the semiconductor wafer, applying a second dielectric layer on the semiconductor wafer and the first contact layers, attaching a carrier arrangement to the semiconductor wafer, singulating the semiconductor wafer into semiconductor bodies and applying second contact layers on the semiconductor bodies, wherein the second dielectric layer is formed such that it mechanically stabilizes itself.

Abstract: An optoelectronic arrangement is specified, comprising a moulded body having a base surface, a first pixel group with a multiplicity of pixels assigned thereto, each having a first semiconductor region, a second semiconductor region and an active region, a multiplicity of separating structures arranged between the pixels, and at least one first contact structure having a first contact plane and a first contact location, which is freely accessible at the base surface, wherein the pixels of the first pixel group are arranged alongside one another at the top surface, the first semiconductor regions and/or the second semiconductor regions of adjacent pixels of the first pixel group are electrically insulated from one another by means of the separating structures, a first contact structure is assigned one-to-one to the first pixel group, and the first semiconductor regions of the pixels of the first pixel group are electrically conductively connected to one another by means of the first contact plane and are elect

Abstract: In an embodiment a component composite includes an auxiliary carrier, a plurality of components, a retaining structure and an electrically conductive sacrificial layer, wherein each of the components has a connection layer which faces the sacrificial layer and is electrically conductively connected to the sacrificial layer, wherein the sacrificial layer is arranged in vertical direction between the auxiliary carrier and the components, and wherein the sacrificial layer is to be removable and the components are mechanically connected to the auxiliary carrier only via the retaining structure in addition to the sacrificial layer.

Abstract: The invention relates to various aspects of a ?-LED or a ?-LED array for augmented reality or lighting applications, in particular in the automotive field. The ?-LED is characterized by particularly small dimensions in the range of a few ?m.

Abstract: A method of picking up and depositing optoelectronic semiconductor chips comprises generating electron-hole pairs in optoelectronic semiconductor chips, thereby generating a dipole electric field in the vicinity of the respective optoelectronic semiconductor chip, generating an electric field by a pick-up tool, and picking up the optoelectronic semiconductor chips during or after generation of the electron-hole pairs by the pick-up tool and depositing them at predetermined locations.

Abstract: The invention relates to various aspects of a ?-LED or a ?-LED array for augmented reality or lighting applications, in particular in the automotive field. The ?-LED is characterized by particularly small dimensions in the range of a few ?m.

Abstract: A component includes a carrier and a semiconductor body arranged on the carrier, wherein the semiconductor body includes a semiconductor layer facing away from the carrier, a further semiconductor layer facing the carrier and an optically active layer located therebetween, the carrier has a metallic carrier layer that is contiguous and mechanically stabilizes the component, the carrier includes a mirror layer disposed between the semiconductor body and the metallic carrier layer, the carrier has a compensating layer directly adjacent to the metallic carrier layer and is configured to compensate for internal mechanical strains in the component, and the compensating layer is arranged between the semiconductor body and the metallic carrier layer.

Abstract: The invention relates to various aspects of a ?-LED or a ?-LED array for augmented reality or lighting applications, in particular in the automotive field. The ?-LED is characterized by particularly small dimensions in the range of a few ?m.