Abstract: An optoelectronic semiconductor component comprises an optoelectronic semiconductor chip (C1) having an electrically conductive substrate (T), an active part (AT) containing epitaxially grown layers, and an intermediate layer (ZS) which is arranged between the substrate (T) and the active part (AT) and contains a solder material. The optoelectronic semiconductor component further comprises an electrical connection point, which at least partially covers an underside of the substrate (T), wherein the electrical connection point comprises a first contact layer (KS1) on a side facing the substrate (T), and the first contact layer (KS1) contains aluminium or consists of aluminium.

Abstract: A semiconductor chip is disclosed. In an embodiment a semiconductor chip includes a multiply-connected mask layer comprising openings, the openings completely penetrate the mask layer and a semiconductor layer sequence, which, at least in places, is in direct contact with the mask layer, wherein the semiconductor layer sequence is disposed on the mask layer, wherein the mask layer comprises a light-transmissive material, and wherein the light-transmissive material comprises an optical refractive index for light which is smaller than a refractive index of the semiconductor layer sequence.

Abstract: An optoelectronic semiconductor component includes an optoelectronic semiconductor chip; and an electrical connection point that contacts the optoelectronic semiconductor chip, wherein the electrical connection point covers the optoelectronic semiconductor chip on the bottom thereof at least in some areas, the electrical connection point includes a contact layer facing toward the optoelectronic semiconductor chip, the electrical connection point includes at least one barrier layer arranged on a side of the contact layer facing away from the optoelectronic semiconductor chip, the electrical connection point includes a protective layer arranged on the side of the at least one barrier layer facing away from the contact layer, the layers of the electrical connection point are arranged one on top of another along a stack direction, and the stack direction runs perpendicular to a main extension plane of the optoelectronic semiconductor chip.

Abstract: Disclosed is a radiation-emitting semi-conductor chip (1) comprising an epitaxial semi-conductor layer sequence (3) which emits electromagnetic radiation in operation. The epitaxial semi-conductor layer sequence (3) is applied on a a transparent substrate (4), wherein the substrate (4) has a first main surface (8) facing the semi-conductor layer sequence (3), a second main surface (9) facing away from the semi-conductor layer sequence (3) and a first lateral flank (10) arranged between the first main surface (8) and the second main surface (9), and the lateral flank (10) has a decoupling structure which is formed in a targeted manner from separating tracks. Also disclosed is a method for producing the semi-conductor chip, and a component comprising such a semi-conductor chip.

Abstract: A method for producing an optoelectronic component is disclosed. In an embodiment the method includes a metallization with first mask structures is deposited directionally, and then a first passivation material is deposited non-directionally onto the metallization. Further, cutouts are introduced into the semiconductor body, such that the cutouts extend right into an n-type semiconductor region, and a second passivation material is applied on side faces of the cutouts. Furthermore, an n-type contact material is applied, structured and passivated. Moreover, contact structures are arranged on the semiconductor body and electrically connected to the n-type contact material and the metallization, wherein the contact structures and the semiconductor body are covered with a potting.

Abstract: A component includes a semiconductor body, a carrier, and a stabilization layer arranged between the semiconductor body and the carrier in the vertical direction. The semiconductor body has a first semiconductor layer facing away from the carrier, a second semiconductor layer facing the carrier, and an active layer arranged between the first semiconductor layer and the second semiconductor layer. The carrier has a first via and a second via laterally spaced apart from the first via by means of an intermediate region. The first via is connected to the first semiconductor layer in an electrically conductive manner and the second via is connected to the second semiconductor layer in an electrically conductive manner. The stabilization layer is continuous, overlaps with the vias in a top view, and laterally bridges the intermediate region. The stabilization layer is electrically insulated from the vias and from the semiconductor body.

Abstract: A method of producing a plurality of semiconductor chips includes a) providing a carrier substrate having a first major face and a second major face opposite the first major face; b) forming a diode structure between the first major face and the second major face, the diode structure electrically insulating the first major face from the second major face at least with regard to one polarity of an electrical voltage; c) arranging a semiconductor layer sequence on the first major face of the carrier substrate; and d) singulating the carrier substrate with the semiconductor layer sequence into a plurality of semiconductor chips.

Abstract: An optoelectronic semiconductor chip includes a carrier and a semiconductor body arranged on the carrier with a semiconductor layer sequence, wherein the semiconductor layer sequence includes an active region arranged between a first semiconductor layer and a second semiconductor layer and generates or receives electromagnetic radiation, the first semiconductor layer connects to a first contact in an electrically-conductive manner, the first contact is formed on a rear side of the carrier facing away from the semiconductor body, the second semiconductor layer connects to both a second contact and a third contact in an electrically-conductive manner, and the second contact is formed on the front side of the carrier facing towards the semiconductor body and the third contact on the rear side of the carrier facing away from the semiconductor body.

Abstract: The invention relates to a method for producing an optoelectronic semiconductor chip (1). A semiconductor layer sequence (3) is provided, comprising a first semiconductor layer (3a) and a second semiconductor layer (3b). Furthermore, a first contact layer (5a) is provided which extends laterally along the first semiconductor layer (3a) and electrically contacts same. A third semiconductor layer (7) is applied onto a first contact layer (5a) face facing away from the semiconductor layer sequence (3). A recess (8) is formed which extends through the third semiconductor layer (7), the first contact layer (5a), and the first semiconductor layer (3a) into the second semiconductor layer (3b). A passivation layer (9) is applied onto a third semiconductor layer (7) face facing away from the semiconductor layer sequence (3). At least one first (9a) and at least one second passage opening (9b, 9c) are formed in the passivation layer (9).

Abstract: The invention relates to a semiconductor component comprising at least one semiconductor chip (10) having a semiconductor body (1) with an active region (12), a conversion element (6) and a carrier (3), the carrier (3) comprising a first moulded body (33), a first conductor body (31) and a second conductor body (32), the conductor body (31, 32) being connected to the active region (12) in an electrically conducting manner. A side of the conversion element (6) facing away from the active region (12) forms a front side (101) of the semiconductor chip (10) and a side of the carrier (3) facing away from the active region (12) forms a rear side (102) of the semiconductor chip (10), and lateral surfaces (103) of the semiconductor chip connect the front side (101) and the rear side (102) together.

Abstract: A semiconductor chip includes an electrically insulating layer including a first opening and a second opening, an electrically conductive first connection point, and an electrically conductive second connection point, wherein a carrier mechanically connects to a semiconductor body, the active region electrically connects to a first conductor body and a second conductor body, the electrically insulating layer covers the carrier on a side thereof facing away from the semiconductor body, the first connection point electrically connects to the first conductor body through the first opening, the second connection point electrically connects to the second conductor body through the second opening, the first conductor body is at a first distance from a second conductor body, the first connection point is at a second distance from the second connection point, and the first distance is less than the second distance.

Abstract: A method for producing a plurality of semiconductor chips and a semiconductor chip are disclosed. The method includes applying a mask material on a growth surface of a growth substrate, wherein the growth surface includes sapphire, patterning the mask material into a multiply-connected mask layer by introducing openings into the mask material, wherein the growth surface is exposed at the bottom of at least some of the openings, applying a semiconductor layer sequence on the mask layer and on the growth surface and singulating at least the semiconductor layer sequence into the plurality of semiconductor chips, wherein each semiconductor chip includes lateral dimensions and the lateral dimensions are large compared to an average distance of the openings to the nearest opening.

Abstract: The invention relates to a method for producing an optoelectronic semiconductor chip (1). A semiconductor layer sequence (3) is provided, comprising a first semiconductor layer (3a) and a second semiconductor layer (3b). Furthermore, a first contact layer (5a) is provided which extends laterally along the first semiconductor layer (3a) and electrically contacts same. A third semiconductor layer (7) is applied onto a first contact layer (5a) face facing away from the semiconductor layer sequence (3). A recess (8) is formed which extends through the third semiconductor layer (7), the first contact layer (5a), and the first semiconductor layer (3a) into the second semiconductor layer (3b). A passivation layer (9) is applied onto a third semiconductor layer (7) face facing away from the semiconductor layer sequence (3). At least one first (9a) and at least one second passage opening (9b, 9c) are formed in the passivation layer (9).

Abstract: A device includes a plurality of optoelectronic semiconductor components and a connection carrier on which the optoelectronic semiconductor components are arranged, wherein the optoelectronic semiconductor components each have a semiconductor body including an active region configured to generate and/or receive radiation; the optoelectronic semiconductor components have a molded body through which a first electrical contact and a second electrical contact to electrically contact the semiconductor bodies are fed; the molded body has a side face delimiting the semiconductor components in a lateral direction; and the connection carrier and the side face of the molded body are covered at least in regions by a radiation-impermeable cover layer.

Abstract: The invention relates to an optoelectronic component (100) comprising a semiconductor layer sequence (1) having an active layer (10), wherein the active layer (10) is designed to produce or absorb electromagnetic radiation in intended operation. Furthermore, the component (100) comprises a first contact structure (11) and a second structure (12), by means of which the semiconductor layer sequence (1) can be electrically contacted in intended operation. In operation, a voltage is applied to the contact structures (11, 12), wherein an operation-related voltage difference ?Ubet between the contact structures (11, 12) arises. When the voltage difference is increased, a first arc-over occurs in or on the component (100) between the two contact structures (11, 12). A spark gap (3) between the contact structures (11, 12), which arises in the event of the first arc-over, passes predominantly through a surrounding medium in the form of gas or vacuum and/or through a potting.

Abstract: A method for producing an optoelectronic device is disclosed. The method include preforming an inductive excitation of a current by an inductive component of the optoelectronic device such that the optoelectronic device emits electromagnetic radiation, measuring of at least one electro-optical characteristic of the optoelectronic device and applying a converter material to an emission side of the optoelectronic device, wherein a quantity of the converter material is determined from the measurement of the electro-optical characteristic.

Abstract: According to the present disclosure, optoelectronic semiconductor chip includes at least one n-doped semiconductor layer, at least one p-doped semiconductor layer and one active layer arranged between the at least one n-doped semiconductor layer and the at least one p-doped semiconductor layer. The p-doped semiconductor layer is electrically contacted by means of a first metallic connection layer, and a reflection-enhancing dielectric layer sequence is arranged between the p-doped semiconductor layer and the first connection layer, which dielectric layer sequence includes a plurality of dielectric layers with different refractive indices.

Abstract: The invention relates to a semiconductor component comprising: a semiconductor chip (10) which has a semiconductor body (1) with an active region (12) and a substrate (3) with a first conductor body (31), a second conductor body (32) and a first moulded body (33); and a second moulded body (5); wherein the second moulded body (5) completely surrounds the semiconductor chip (10) in lateral directions (L), the semiconductor chip (10) extends all the way through the second moulded body (5) in a vertical direction (V), at least some parts of an upper side and a lower side of the semiconductor chip (10) are not covered by the second moulded body (5), the substrate (3) is mechanically connected to the semiconductor body (2), the active region (12) is connected to the first conductor body (31) and the second conductor body (32) in an electroconductive manner, and the second moulded body (5) is directly adjacent to the substrate (3) and the semiconductor body (1).

Abstract: An optoelectronic semiconductor component includes an active layer arranged between a p-type semiconductor region and an n-type semiconductor region, a carrier including a plastic and a first via and a second via, a p-contact layer and an n-contact layer arranged between the carrier and a semiconductor body at least in some regions, wherein the p-contact layer electrically joins the first via and the p-type semiconductor region, and the n-contact layer electrically joins the second via and the n-type semiconductor region, a metallic reinforcing layer arranged at least in some regions between the n-contact layer and the carrier, wherein the metallic reinforcing layer is at least 5 ?m thick, and at least one p-contact feed-through arranged between the first via and the p-contact layer, wherein the p-contact feed-through is at least 5 ?m thick and surrounded in a lateral direction by the reinforcing layer at least in some regions.

Abstract: A method for producing an optoelectronic component is disclosed. In an embodiment the method includes a metallization with first mask structures is deposited directionally, and then a first passivation material is deposited non-directionally onto the metallization. Further, cutouts are introduced into the semiconductor body, such that the cutouts extend right into an n-type semiconductor region, and a second passivation material is applied on side faces of the cutouts. Furthermore, an n-type contact material is applied, structured and passivated. Moreover, contact structures are arranged on the semiconductor body and electrically connected to the n-type contact material and the metallization, wherein the contact structures and the semiconductor body are covered with a potting.