Abstract: A method of making a printed circuit board in which conductive thru-holes are formed within two dielectric layers of the board's structure so as to connect designated conductive layers. One hole connects two adjacent layers and the other connects two adjacent layers, including one of the conductive layers connected by the other hole. It is also possible to connect all three conductive layers using one or more holes. The resulting holes may be filled, e.g., with metal plating, or conductive or non-conductive paste. In the case of the latter, it is also possible to provide a top covering conductive layer over the paste, e.g., to serve as a pad or the like on the board's external surface.

Abstract: A method of making a printed circuit board in which conductive thru-holes are formed within two dielectric layers of the board's structure so as to connect designated conductive layers. One hole connects two adjacent layers and the other connects two adjacent layers, including one of the conductive layers connected by the other hole. It is also possible to connect all three conductive layers using one or more holes. The resulting holes may be filled, e.g., with metal plating, or conductive or non-conductive paste. In the case of the latter, it is also possible to provide a top covering conductive layer over the paste, e.g., to serve as a pad or the like on the board's external surface.

Abstract: A circuitized substrate comprising a first layer comprised of a dielectric material including a low moisture absorptive polymer resin in combination with a nodular fluoropolymer web encased within the resin, the resulting dielectric layer formed from this combination not including continuous or semi-continuous fibers as part thereof. The substrate further includes at least one circuitized layer positioned on the dielectric first layer. An electrical assembly and a method of making the substrate are also provided, as is an information handling system (e.g., computer) incorporating the circuitized substrate of the invention as part thereof.

Abstract: A method of making a circuitized substrate such as a printed circuit board having at least one hole therein which comprises the steps of providing a layer of dielectric, forming at least one (and preferably several) holes therein, providing a fill member including a quantity of fill material and reinforcement means located within the fill material, positioning the fill member on the dielectric over the holes and thereafter applying a predetermined force sufficient to cause only the fill material to be forcibly driven into the accommodating hole(s), not the reinforcement means. Subsequent steps can include forming a layer of circuitry on the substrate's external surface and over the filled holes such that an electrical component such as a ball grid array (BGA), semiconductor chip, etc. may be directly positioned on and/or over the hole(s). A fill member usable with the method is also provided.

Abstract: A technique of forming a metallurgical bond between pads on two surfaces is provided. A metal coating placed on each surface includes a first metal base layer and a second metal surface layer. The first and second metals include a low melting point constituent. A first ratio of the two metals forms a liquid phase with a second ratio of the two metals forming a solid phase. The volume of the base layer metal exceeds the volume necessary to form the solid phase between the base metal and the surface metal. Conductive metal particles are provided having a core metal and a coating metal dispersed in an uncured polymer material, at a volume fraction above the percolation threshold. The core metal and the coating metal together include a low melting point constituent. At a first ratio the components form a liquid phase and at a second ratio the two components form a solid phase.

Abstract: A method of making a circuitized substrate such as a printed circuit board having at least one hole therein which comprises the steps of providing a layer of dielectric, forming at least one (and preferably several) holes therein, providing a fill member including a quantity of fill material and reinforcement means located within the fill material, positioning the fill member on the dielectric over the holes and thereafter applying a predetermined force sufficient to cause only the fill material to be forcibly driven into the accommodating hole(s), not the reinforcement means. Subsequent steps can include forming a layer of circuitry on the substrate's external surface and over the filled holes such that an electrical component such as a ball grid array (BGA), semiconductor chip, etc. may be directly positioned on and/or over the hole(s). A fill member usable with the method is also provided.

Abstract: An aperture in an electronic substrate is filled with a filling material without need for a specially built fill mask. A layer of tape or tentable photosensitive dielectric film is applied to one surface of the substrate covering the aperture. An opening is made in the tape or film by directing radiation through the aperture. Fill material is then forced through the opening to substantially fill the aperture. Protruding nubs may be removed to planarize the substrate surfaces.

Abstract: A technique of forming a metallurgical bond between pads on two surfaces is provided. A metal coating placed on each surface includes a first metal base layer and a second metal surface layer. The first and second metals include a low melting point constituent. A first ratio of the two metals forms a liquid phase with a second ratio of the two metals forming a solid phase. The volume of the base layer metal exceeds the volume necessary to form the solid phase between the base metal and the surface metal. Conductive metal particles are provided having a core metal and a coating metal dispersed in an uncured polymer material, at a volume fraction above the percolation threshold. The core metal and the coating metal together include a low melting point constituent. At a first ratio the components form a liquid phase and at a second ratio the two components form a solid phase.

Abstract: A method of making a circuitized substrate such as a printed circuit board having at least one hole therein which comprises the steps of providing a layer of dielectric, forming at least one (and preferably several) holes therein, positioning a thin layer of support material atop the dielectric layer and over the hole(s), positioning a quantity of fill material on the thin layer of support material (preferably before positioning the thin layer on the dielectric) and thereafter applying a predetermined force sufficient to cause the thin support layer to rupture or otherwise deform (including melting from heat application thereto) such that the fill material is forcibly driven into the accommodating hole(s). Subsequent steps can include forming a layer of circuitry on the substrate's external surface and over the filled holes such that an electrical component such as a ball grid array (BGA), semiconductor chip, etc. may be directly positioned on and/or over the hole(s).

Abstract: Solder interconnection encapsulant, encapsulated structure and method for its fabrication and use, whereby the gap created by solder connections between a carrier substrate and a semiconductor device is filled with a composition obtained from curing a preparation containing a cycloaliphatic polyepoxide and/or curable cyanate ester or prepolymer thereof; filler, e.g., an aluminum nitride or aluminum oxide filler, having a maximum particle size of 31 microns.

Abstract: Solder interconnection encapsulant, encapsulated structure and method for its fabrication and use, whereby the gap created by solder connections between a carrier substrate and a semiconductor device is filled with a composition obtained from curing a preparation containing a cycloaliphatic polyepoxide and/or curable cyanate ester or prepolymer thereof; filler, e.g., an aluminum nitride or aluminum oxide filler, having a maximum particle size of 31 microns.

Abstract: A method is disclosed for using the simple, environmentally friendly organic compounds gamma-butyrolactone and benzyl alcohol to develop and to strip free radical-initiated, addition polymerizable resists, cationically cured resists and solder masks and Vacrel photoresists. In all cases the developers and strippers include gamma butyrolactone or benzyl alcohol. The developers and strippers optionally also include a minor amount of methanol, ethanol, isopropyl alcohol, propylene glycol monomethylacetate, ethylene glycol monomethyl ether, formamide, nitromethane, propylene oxide, or methyl ethyl ketone, acetone and water. During development of the photopatterned resist or solder mask, the unpolymerized regions are dissolved in the disclosed developers. During stripping of the resist or solder mask, the polymerized regions are debonded from a circuit board in the disclosed strippers.

Abstract: A method is disclosed for using the simple, environmentally-friendly organic compounds gamma-butyrolactone and benzyl alcohol to develop and to strip free radical-initiated, addition polymerizable resists, cationically cured resists and solder masks and Vacrel photoresists. In all cases the developers and strippers include gamma butyrolactone or benzyl alcohol. The developers and strippers optionally also include a minor amount of methanol, ethanol, isopropyl alcohol, propylene glycol monomethylacetate, ethylene glycol monomethyl ether, formamide, nitromethane, propylene oxide, or methyl ethyl ketone, acetone and water. During development of the photopatterned resist or solder mask, the unpolymerized regions are dissolved in the disclosed developers. During stripping of the resist or solder mask, the polymerized regions are debonded from a circuit board in the disclosed strippers.

Abstract: Compositions containing bisphenol M dicyanate, prepolymer thereof, or mixtures thereof, and 4,4'-ethylidene bisphenol dicyanate, prepolymer thereof or mixtures thereof; and filler having maximum particle size of 20 microns and being substantially free of alpha particle emissions. The compositions are useful in forming interconnection structures for forming an integrated semiconductor device to a carrier substrate.

Abstract: Disclosed is a method of thermally stabilizing an effluent stream from an industrial process, such as a photolithographic process, to allow thermally manageable recovery of the solvent. In the separation and recovery process the solvent is exposed to temperatures that can cause polymerization of the relatively small amounts of monomer still contained therein. This polymerization is an exothermic polymerization, which can accelerate the polymerization of the remaining monomer, potentially causing a thermally initiated, exothermic, run away polymerization. Run away, thermally initiated, exothermic polymerization can materially degrade the solvent. The thermally initiated, run away exothermic reaction is inhibited by the inclusion of a thermal stabilizer or polymerization inhibitor.

Abstract: Solder interconnection whereby the gap created by solder connections between a carrier substrate and semiconductor device is filled with a composition obtained from curing a preparation containing a cycloaliphatic polyepoxide and/or curable cyanate ester or prepolymer thereof; filler having a maximum particle size of 31 microns and being at least substantially free of alpha particle emissions.

Abstract: Solder interconnection whereby the gap created by solder connections between a carrier substrate and semiconductor device is filled with a composition obtained from curing a preparation containing a cycloaliphatic polyepoxide and/or curable cyanate ester or prepolymer thereof; filler having a maximum particle size of 31 microns and being at least substantially free of alpha particle emissions.

Abstract: Dicyanato diphenyl fluorinated alkane resin precursor compositions are modified by the addition of minor predetermined amounts of aromatic diepoxides having high epoxide equivalent weights in order to reduce the curing temperature of prepregs and laminates, such as circuit boards, while retaining low dielectric constants, heat stability and high flame retardance.

Abstract: Solder interconnection whereby the gap created by solder connections between a carrier substrate and semiconductor device is filled with a composition obtained from curing a preparation containing a cycloaliphatic polyepoxide and/or curable cyanate ester or prepolymer thereof; filler having a maximum particle size of 31 microns and being at least substantially free of alpha particle emissions.