Patents by Inventor Kosuke Tatsumura
Kosuke Tatsumura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11941077Abstract: According to one embodiment, a calculating device includes a processor repeating a processing procedure. The processing procedure includes a first variable update and a second variable update. The first variable update includes updating an ith entry of a first variable xi by adding a first function to the ith entry of the first variable xi before the first variable update. The second variable update includes updating the ith entry of the second variable yi by adding a second function and a third function to the ith entry of the second variable yi before the second variable update. The processor performs at least an output of at least one of the ith entry of the first variable xi obtained after the repeating of the processing procedure or a function of the ith entry of the first variable xi obtained after the repeating of the processing procedure.Type: GrantFiled: October 3, 2022Date of Patent: March 26, 2024Assignee: Kabushiki Kaisha ToshibaInventors: Hayato Goto, Kosuke Tatsumura
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Publication number: 20240040599Abstract: According to one embodiment, a communication system includes a base station based on a communication standard and an allocation information generation device from the base station. The allocation information generation device comprises first and second generators. The first and the second generators output first and second allocation information until a first time elapses after an allocation request is received. The allocation information generation device transmits, to the base station, one of the first and the second allocation information which satisfies a constraint defined by the communication standard.Type: ApplicationFiled: March 10, 2023Publication date: February 1, 2024Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Haruka OBATA, Toshihisa NABETANI, Kabuto ARAI, Kosuke TATSUMURA, Hayato GOTO, Yoshisato SAKAI
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Publication number: 20240037430Abstract: According to an embodiment, an information processing system solves a combinatorial optimization problem. The information processing system includes an Ising machine and a host unit. The Ising machine is hardware configured to perform a search process for searching for the ground state of an Ising model that represents the combinatorial optimization problem. The host unit is hardware connected to the Ising machine via an interface and configured to control the Ising machine. In the search process, for each of a plurality of Ising spins, the Ising machine alternately repeats an auxiliary variable update process for updating an auxiliary variable by a main variable and a main variable update process for updating the main variable by the auxiliary variable multiple times. Prior to the search process, the host unit transmits, to the Ising machine, an initial value of the auxiliary variable corresponding to each of the plurality of Ising spins.Type: ApplicationFiled: October 9, 2023Publication date: February 1, 2024Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Ryo HIDAKA, Kosuke TATSUMURA, Masaya YAMASAKI, Yohei HAMAKAWA, Hayato GOTO
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Publication number: 20240013076Abstract: A search device updates positions and momentums of a plurality of virtual particles, for each unit time from an initial time to an end time. The search device, for each unit time, calculates, for each of the particles, a position at a target time of a corresponding particle, calculates, for each of a plurality of nodes, a first accumulative value by cumulatively adding positions at the target time of two or more particles corresponding to outgoing two or more directed edges, calculates, for each of the nodes, a second accumulative value by cumulatively adding positions at the target time of two or more particles corresponding to incoming two or more directed edges, and calculates, for each of the particles, a momentum at the target time of a corresponding particle based on the first accumulative value and the second accumulative value.Type: ApplicationFiled: September 22, 2023Publication date: January 11, 2024Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Kosuke TATSUMURA, Hayato GOTO, Masaya YAMASAKI, Ryo HIDAKA, Yoshisato SAKAI
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Publication number: 20240004951Abstract: An information processing system according to one embodiment includes an Ising machine and a host apparatus. The Ising machine includes a coefficient memory, a variable memory, an arithmetic circuit, an output circuit, and a setting circuit. The coefficient memory stores a coefficient matrix and a coefficient vector defining an Ising model. The variable memory stores a main variable and an auxiliary variable corresponding to each of Ising spins contained in the Ising model. The arithmetic circuit alternately repeats, in a search process, execution of an auxiliary variable update process updating the auxiliary variable with the main variable and a main variable update process updating the main variable with the auxiliary variable, for each of the Ising spins. The coefficient memory continues storing a preceding coefficient matrix and a preceding coefficient vector until the setting circuit writes a new coefficient matrix and a new coefficient vector.Type: ApplicationFiled: February 27, 2023Publication date: January 4, 2024Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Yohei HAMAKAWA, Ryo HIDAKA, Kosuke TATSUMURA
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Patent number: 11816595Abstract: According to an embodiment, an information processing system solves a combinatorial optimization problem. The information processing system includes an Ising machine and a host unit. The Ising machine is hardware configured to perform a search process for searching for the ground state of an Ising model that represents the combinatorial optimization problem. The host unit is hardware connected to the Ising machine via an interface and configured to control the Ising machine. In the search process, for each of a plurality of Ising spins, the Ising machine alternately repeats an auxiliary variable update process for updating an auxiliary variable by a main variable and a main variable update process for updating the main variable by the auxiliary variable multiple times. Prior to the search process, the host unit transmits, to the Ising machine, an initial value of the auxiliary variable corresponding to each of the plurality of Ising spins.Type: GrantFiled: February 25, 2021Date of Patent: November 14, 2023Assignee: Kabushiki Kaisha ToshibaInventors: Ryo Hidaka, Kosuke Tatsumura, Masaya Yamasaki, Yohei Hamakawa, Hayato Goto
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Patent number: 11803770Abstract: A search device updates positions and momentums of a plurality of virtual particles, for each unit time from an initial time to an end time. The search device, for each unit time, calculates, for each of the particles, a position at a target time of a corresponding particle, calculates, for each of a plurality of nodes, a first accumulative value by cumulatively adding positions at the target time of two or more particles corresponding to outgoing two or more directed edges, calculates, for each of the nodes, a second accumulative value by cumulatively adding positions at the target time of two or more particles corresponding to incoming two or more directed edges, and calculates, for each of the particles, a momentum at the target time of a corresponding particle based on the first accumulative value and the second accumulative value.Type: GrantFiled: January 31, 2023Date of Patent: October 31, 2023Assignee: Kabushiki Kaisha ToshibaInventors: Kosuke Tatsumura, Hayato Goto, Masaya Yamasaki, Ryo Hidaka, Yoshisato Sakai
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Publication number: 20230325467Abstract: A calculation apparatus according to an embodiment includes matrix multiplication circuitry, time evolution circuitry, management circuitry, and output circuitry. The matrix multiplication circuitry calculates N second intermediate variables at a first time point by matrix multiplication between N (N>=2) first intermediate variables at the first time point and a preset coefficient matrix in N rows and N columns. The time evolution circuitry calculates N first variables at a second time point and N first intermediate variables at the second time point, the second time point being a time point following one sampling period after the first time point. The management circuitry increments time point from a start time point for each sampling period and controls the above circuitry to perform a process for each time point. The output circuitry outputs N first variables at a preset end time point.Type: ApplicationFiled: June 15, 2023Publication date: October 12, 2023Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Kosuke TATSUMURA, Hayato GOTO
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Publication number: 20230315801Abstract: A calculation device includes an updating circuit. The updating circuit updates, for each of N particles, a first variable representing the position of a target particle and a second variable representing momentum of the target particle. M constrained solutions each include N constrained values. The first variable is updated to change to a first value when the first variable is smaller than the first value and change to a second value when the first variable is greater than the second value. The second variable is updated based on the first variable of each particle and a penalty component of the target particle. The penalty component represents momentum for shifting the position of the target particle toward an opposite polarity. The penalty component indicates a value being greater as the first variable corresponding to the target particle is closer to the M constrained solutions.Type: ApplicationFiled: August 31, 2022Publication date: October 5, 2023Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Ryo HIDAKA, Kosuke TATSUMURA, Jun NAKAYAMA, Masaya YAMASAKI, Tomoya KASHIMATA
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Publication number: 20230276467Abstract: A wireless communication system can change a subcarrier spacing. The system includes a control device and an allocation determination device. The control device controls wireless communication between the terminal devices and the communication device. The allocation determination device generates allocation information indicating a communication block included in communication blocks, where the allocation information is for at least one of the terminal devices. The control device determines an allocation time for allocating by the allocation determination device. The control device outputs, to the allocation determination device, an allocation request including reference information regarding communication and information regarding the allocation time. The allocation determination device outputs the allocation information regarding the terminal devices to the control device by a reply time before the allocation time using the reference information.Type: ApplicationFiled: August 27, 2022Publication date: August 31, 2023Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Haruka OBATA, Toshihisa NABETANI, Kabuto ARAI, Kosuke TATSUMURA, Yasuyuki TANAKA
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Patent number: 11741187Abstract: A calculation device includes a memory and one or more processors coupled to the memory and configured to alternately update, for elements each associated with first and second variables, the first and second variables, sequentially for unit times from an initial time to an end time. In an updating process for each unit time, the one or more processors are configured to: update, for each of the elements, the first variable based on the second variable; when the first variable is smaller than a first value, change the first variable to the first value and change the second variable to a third value; when the first variable is greater than a second value, change the first variable to the second value and change the second variable to the third value; and add an acceleration value calculated by a predetermined computation to the second variable.Type: GrantFiled: August 30, 2021Date of Patent: August 29, 2023Assignee: Kabushiki Kaisha ToshibaInventors: Taro Kanao, Hayato Goto, Ryo Hidaka, Kosuke Tatsumura
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Patent number: 11720645Abstract: A calculation apparatus according to an embodiment includes matrix multiplication circuitry, time evolution circuitry, management circuitry, and output circuitry. The matrix multiplication circuitry calculates N second intermediate variables at a first time point by matrix multiplication between N (N>=2) first intermediate variables at the first time point and a preset coefficient matrix in N rows and N columns. The time evolution circuitry calculates N first variables at a second time point and N first intermediate variables at the second time point, the second time point being a time point following one sampling period after the first time point. The management circuitry increments time point from a start time point for each sampling period and controls the above circuitry to perform a process for each time point. The output circuitry outputs N first variables at a preset end time point.Type: GrantFiled: June 30, 2021Date of Patent: August 8, 2023Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Kosuke Tatsumura, Hayato Goto
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Publication number: 20230221962Abstract: According to one embodiment, a calculating device includes a first memory, a second memory, a third memory, a first arithmetic module, a second arithmetic module, a first conductive line electrically connecting a first output terminal of the first memory and a first input terminal of the first arithmetic module, a second conductive line electrically connecting a second output terminal of the first memory and a first input terminal of the second arithmetic module, a third conductive line electrically connecting a first output terminal of the second memory and a second input terminal of the second arithmetic module, a fourth conductive line electrically connecting a first output terminal of the third memory and a third input terminal of the second arithmetic module, and a fifth conductive line electrically connecting a first output terminal of the second arithmetic module and a second input terminal of the first arithmetic module.Type: ApplicationFiled: March 21, 2023Publication date: July 13, 2023Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Kosuke Tatsumura, Hayato Goto
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Publication number: 20230169374Abstract: A search device updates positions and momentums of a plurality of virtual particles, for each unit time from an initial time to an end time. The search device, for each unit time, calculates, for each of the particles, a position at a target time of a corresponding particle, calculates, for each of a plurality of nodes, a first accumulative value by cumulatively adding positions at the target time of two or more particles corresponding to outgoing two or more directed edges, calculates, for each of the nodes, a second accumulative value by cumulatively adding positions at the target time of two or more particles corresponding to incoming two or more directed edges, and calculates, for each of the particles, a momentum at the target time of a corresponding particle based on the first accumulative value and the second accumulative value.Type: ApplicationFiled: January 31, 2023Publication date: June 1, 2023Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Kosuke TATSUMURA, Hayato GOTO, Masaya YAMASAKI, Ryo HIDAKA, Yoshisato SAKAI
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Patent number: 11640303Abstract: According to one embodiment, a calculating device includes a first memory, a second memory, a third memory, a first arithmetic module, a second arithmetic module, a first conductive line electrically connecting a first output terminal of the first memory and a first input terminal of the first arithmetic module, a second conductive line electrically connecting a second output terminal of the first memory and a first input terminal of the second arithmetic module, a third conductive line electrically connecting a first output terminal of the second memory and a second input terminal of the second arithmetic module, a fourth conductive line electrically connecting a first output terminal of the third memory and a third input terminal of the second arithmetic module, and a fifth conductive line electrically connecting a first output terminal of the second arithmetic module and a second input terminal of the first arithmetic module.Type: GrantFiled: September 22, 2020Date of Patent: May 2, 2023Assignee: Kabushiki Kaisha ToshibaInventors: Kosuke Tatsumura, Hayato Goto
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Patent number: 11610146Abstract: A search device updates positions and momentums of a plurality of virtual particles, for each unit time from an initial time to an end time. The search device, for each unit time, calculates, for each of the particles, a position at a target time of a corresponding particle, calculates, for each of a plurality of nodes, a first accumulative value by cumulatively adding positions at the target time of two or more particles corresponding to outgoing two or more directed edges, calculates, for each of the nodes, a second accumulative value by cumulatively adding positions at the target time of two or more particles corresponding to incoming two or more directed edges, and calculates, for each of the particles, a momentum at the target time of a corresponding particle based on the first accumulative value and the second accumulative value.Type: GrantFiled: December 29, 2021Date of Patent: March 21, 2023Assignee: Kabushiki Kaisha ToshibaInventors: Kosuke Tatsumura, Hayato Goto, Masaya Yamasaki, Ryo Hidaka, Yoshisato Sakai
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Publication number: 20230076906Abstract: According to an embodiment, a calculation device includes P calculation cores each connected to a network. The P calculation cores calculate N first variables representing position and N second variables representing momentum in N oscillators, sequentially for each time step from an initial time to an end time. The P calculation cores output values based on N first variables at the end time as values based on a solution of an optimization problem. The kth calculation core includes an interaction circuit configured to calculate, at each time step, M intermediate variables corresponding to M oscillators, based on N first variables at the previous time step. The interaction circuit includes an intermediate variable memory configured to store M intermediate variables under calculation. At each time step, the interaction circuit starts calculation of M intermediate variables before a receiving circuit completes reception of all of (N?M) first variables at the previous time step.Type: ApplicationFiled: February 24, 2022Publication date: March 9, 2023Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Tomoya KASHIMATA, Ryo Hidaka, Masaya Yamasaki, Yohei Hamakawa, Kosuke Tatsumura
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Patent number: 11593689Abstract: According to one embodiment, a calculating device includes a processor repeating a processing procedure. The processing procedure includes first, second, and third variable updates. The first variable update includes updating an ith entry of a first variable xi by adding an ith entry of a first function to the first variable xi. The second variable update includes updating the second variable yi by adding, to the second variable yi, an arithmetic result of an ith entry of a second function, an ith entry of a third function, and an ith entry of a first element function. The third variable update includes updating the third variable z by adding an ith entry of a second element function to the third variable z. The processor performs at least an output of at least one of the first variable xi or a function of the first variable xi.Type: GrantFiled: March 1, 2019Date of Patent: February 28, 2023Assignee: Kabushiki Kaisha ToshibaInventors: Taro Kanao, Hayato Goto, Kosuke Tatsumura
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Publication number: 20230025361Abstract: According to one embodiment, a calculating device includes a processor repeating a processing procedure. The processing procedure includes a first variable update and a second variable update. The first variable update includes updating an ith entry of a first variable xi by adding a first function to the ith entry of the first variable xi before the first variable update. The second variable update includes updating the ith entry of the second variable yi by adding a second function and a third function to the ith entry of the second variable yi before the second variable update. The processor performs at least an output of at least one of the ith entry of the first variable xi obtained after the repeating of the processing procedure or a function of the ith entry of the first variable xi obtained after the repeating of the processing procedure.Type: ApplicationFiled: October 3, 2022Publication date: January 26, 2023Applicant: Kabushiki Kaisha ToshibaInventors: Hayato GOTO, Kosuke TATSUMURA
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Patent number: 11537839Abstract: An arithmetic processing device to realize a multi-layer convolutional neural network circuit to perform a process with fixed-point number format, according to an embodiment comprising: a processing circuitry and a memory, the processing circuitry conducting: a learning process to perform weight learning or bias learning using learning data stored the memory to calculate initial weight values and initial bias values of the multi-layer convolutional neural network circuit; a trial recognition process to perform a recognition process to part of the learning data or of input data using the initial weight values and the initial bias values; a processing treatment process to multiply the initial weight values and the initial bias values by a positive constant to calculate processed weight values or processed bias values; and a recognition process to perform a recognition process using the processed weight values and the processed bias values.Type: GrantFiled: September 4, 2018Date of Patent: December 27, 2022Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Mizuki Ono, Kosuke Tatsumura