Abstract: A wiring member includes: a connector that is to be connected to a movable part and moves along with movement of the movable part; an electrical wire that extends out of the connector; a protective member that covers the electrical wire; and a connector cover that covers the connector, the protective member, and a portion of the electrical wire between the connector and the protective member. The connector cover moves integrally with the connector and is movable relative to the protective member. The dimension of overlap between the connector cover and the protective member in the extending direction of the electrical wire is greater than or equal to the amount of movement of the movable part.

Abstract: A silicon carbide semiconductor device includes a silicon carbide substrate having a first principal surface; an interlayer insulating film; and a gate pad and a source pad provided on the film. The silicon carbide substrate includes a first region including unit cells; a second region overlapping the gate pad; and a third region. Each unit cell includes a drift region; a body region; a source region; a contact region; a gate electrode; and a gate insulating film. The second region includes a first semiconductor region. The third region includes a second semiconductor region. The first semiconductor region and the second semiconductor region are contiguous. In the interlayer insulation film, first and second contact holes are formed. The source pad is electrically connected to the source region and the contact region, electrically connected to the second semiconductor region.

Abstract: Provided is a semiconductor apparatus including: a first peak of a hydrogen chemical concentration disposed on the lower surface side of the semiconductor substrate; and a flat portion disposed on the upper surface side of the semiconductor substrate with respect to the first peak, containing a hydrogen donor, and having a substantially (almost) flat donor concentration distribution in a depth direction. An oxygen contribution ratio indicating a ratio of an oxygen chemical concentration contributing to generation of the hydrogen donor in the oxygen chemical concentration of the oxygen ranges from 1×10?5 to 7×10?4. A concentration of the oxygen contributing to generation of the hydrogen donor in the flat portion is lower than the hydrogen chemical concentration. A hydrogen donor concentration in the flat portion ranges from 2×1012/cm3 to 5×1014/cm3.

Abstract: A silicon carbide semiconductor device includes a silicon carbide substrate, and a gate pad and a source pad provided above a first main surface. The silicon carbide substrate includes a first region including unit cells, a second region overlapping the gate pad, and a third region continuous with the second region. Each of the unit cells includes a contact region electrically connected to a body region, and a gate insulating film provided between a gate electrode and a drift region, the body region, and a source region. The second region has a first semiconductor region of the second conductivity type. The third region has a second semiconductor region of the second conductivity type. The first semiconductor region and the second semiconductor region are continuous with each other along the first main surface. The source region, the contact region, and the second semiconductor region are electrically connected to the source pad.

Abstract: A silicon carbide semiconductor device includes a first passivation film formed on gate and source pads on a principal surface of a silicon carbide substrate, and a second passivation film formed on the first passivation film. The first passivation film includes a first interlayer insulation between the gate and source pads, a first opening exposing the gate pad and having a first edge, and a second opening exposing the source pad and having a second edge. First and second plating film are formed on the gate and source pads inside the first and second openings, respectively. The second passivation film is also formed on the first and second plating films, and includes a second interlayer insulation covering the first interlayer insulation, a third opening exposing the first plating film and having a third edge, and a fourth opening exposing the second plating film and having a fourth edge.

Abstract: A silicon carbide semiconductor device includes a silicon carbide substrate having a first main surface and a second main surface opposite to the first main surface. The silicon carbide substrate includes a drift region being a first-conductivity type, a body region being a second-conductivity type and provided on the drift region, a source region being the first-conductivity type and provided on the body region such that the source region is separated from the drift region, a contact region being the second-conductivity type and provided on the body region. Gate trenches are provided in the first main surface, and extend in a first direction parallel to the first main surface. The contact region is in contact with a first gate trench from both sides in a second direction orthogonal to the first direction and spaced apart from a second gate trench adjacent to the first gate trench in the second direction.

Abstract: A silicon carbide semiconductor device includes a silicon carbide substrate having a first main surface and a second main surface. The silicon carbide substrate includes an element region including transistors; and a termination region surrounding the element region, the termination region including a first Schottky barrier diode. The silicon carbide substrate includes a first semiconductor region having a first conductivity type; a first surface located between the first main surface and the second main surface; and a second semiconductor region provided on the first surface, the second semiconductor region having a second conductivity type different from the first conductivity type. The second semiconductor region includes a first embedding region provided in the termination region, a first opening being formed in the first embedding region. The first Schottky barrier diode includes a first Schottky electrode provided on the first main surface, the first Schottky electrode overlapping the first opening.

Abstract: A first main surface of a silicon carbide substrate is provided with a first trench and a second trench. The first trench is defined by a first side surface and a first bottom surface. The second trench is defined by a second side surface and a second bottom surface. The silicon carbide substrate includes a first impurity region, a second impurity region, a third impurity region, and a fourth impurity region. A first insulating film is in contact with each of the first side surface and the first bottom surface. A gate electrode is provided on the first insulating film. A second insulating film is in contact with each of the second side surface and the second bottom surface. The second impurity region has a connection region electrically connected to the fourth impurity region and extending toward the fourth impurity region along the second side surface.

Abstract: A silicon carbide substrate has a first main surface and a second main surface opposite to the first main surface. A gate pad faces the first main surface. A drain electrode is in contact with the second main surface. The silicon carbide substrate includes a first impurity region constituting the second main surface and having a first conductivity type, a second impurity region provided on the first impurity region and having a second conductivity type different from the first conductivity type, a third impurity region provided on the second impurity region and having the first conductivity type, and a fourth impurity region provided on the third impurity region, constituting the first main surface, and having the second conductivity type. Each of the first impurity region, the second impurity region, the third impurity region, and the fourth impurity region is located between the gate pad and the drain electrode.

Abstract: A first main surface of a silicon carbide substrate is provided with a first trench and a second trench. The first trench is defined by a first side surface and a first bottom surface. The second trench is defined by a second side surface and a second bottom surface. The silicon carbide substrate includes a first impurity region, a second impurity region, a third impurity region, and a fourth impurity region. A first insulating film is in contact with each of the first side surface and the first bottom surface. A gate electrode is provided on the first insulating film. A second insulating film is in contact with each of the second side surface and the second bottom surface. The second impurity region has a connection region electrically connected to the fourth impurity region and extending toward the fourth impurity region along the second side surface.

Abstract: Provided is an illumination device capable of displaying a predetermined design (for example, a logo mark) without using a design film. An illumination device 1 is intended for displaying a predetermined design, and includes: an LED 3; a condenser lens 4 that forms a secondary light source using light emitted from the LED 3; an emission surface 5b from which the secondary light source is emitted; and an optical lens 7 on which the emitted secondary light source is made incident and which has a focal point on the secondary light source. At least one three-dimensional shape of a convex part corresponding to the design and a concave part corresponding to the design is formed on the emission surface 5b.

Abstract: A silicon carbide substrate has at least one of a first structure and a second structure. The first structure is such that a first impurity region is in contact with a second impurity region, a third impurity region is separated from a fourth impurity region by a second drift region, and the second impurity region has a width greater than a width of the fourth impurity region in a direction parallel to a first main surface. The second structure is such that the first impurity region is separated from the second impurity region by a first drift region, the third impurity region is in contact with the fourth impurity region, and the fourth impurity region has a width greater than a width of the second impurity region in the direction parallel to the first main surface.

Abstract: A silicon carbide substrate has a first main surface and a second main surface opposite to the first main surface. A gate pad faces the first main surface. A drain electrode is in contact with the second main surface. The silicon carbide substrate includes a first impurity region constituting the second main surface and having a first conductivity type, a second impurity region provided on the first impurity region and having a second conductivity type different from the first conductivity type, a third impurity region provided on the second impurity region and having the first conductivity type, and a fourth impurity region provided on the third impurity region, constituting the first main surface, and having the second conductivity type. Each of the first impurity region, the second impurity region, the third impurity region, and the fourth impurity region is located between the gate pad and the drain electrode.

Abstract: The side surface has a first outer end surface. The bottom surface has a first bottom portion continuous to the first outer end surface, and a second bottom portion continuous to the first bottom portion and located on a side opposite to the inner end surface with respect to the first bottom portion. A silicon carbide substrate has a first region and a second region located between the at least one gate trench and a second main surface, and spaced from each other with a drift region being sandwiched therebetween. In a direction parallel to the first outer end surface, a spacing between the first region and the second region located between the first bottom portion and the second main surface is smaller than a spacing between the first region and the second region located between the second bottom portion and the second main surface.

Abstract: A silicon carbide substrate has at least one of a first structure and a second structure. The first structure is such that a first impurity region is in contact with a second impurity region, a third impurity region is separated from a fourth impurity region by a second drift region, and the second impurity region has a width greater than a width of the fourth impurity region in a direction parallel to a first main surface. The second structure is such that the first impurity region is separated from the second impurity region by a first drift region, the third impurity region is in contact with the fourth impurity region, and the fourth impurity region has a width greater than a width of the second impurity region in the direction parallel to the first main surface.

Abstract: A silicon carbide semiconductor device includes a silicon carbide substrate and a gate insulating film. The silicon carbide substrate has a first main surface and a second main surface opposite to the first main surface. The gate insulating film is provided on the first main surface. The silicon carbide substrate includes a first body region having p type, a second body region having p type, and a JFET region provided between the first body region and the second body region and having n type. The JFET region has both a first impurity capable of providing the p type and a second impurity capable of providing the n type. A concentration of the second impurity is higher than a concentration of the first impurity. The silicon carbide semiconductor device capable of suppressing dielectric breakdown of the gate insulating film is provided.

Abstract: The side surface has a first outer end surface. The bottom surface has a first bottom portion continuous to the first outer end surface, and a second bottom portion continuous to the first bottom portion and located on a side opposite to the inner end surface with respect to the first bottom portion. A silicon carbide substrate has a first region and a second region located between the at least one gate trench and a second main surface, and spaced from each other with a drift region being sandwiched therebetween. In a direction parallel to the first outer end surface, a spacing between the first region and the second region located between the first bottom portion and the second main surface is smaller than a spacing between the first region and the second region located between the second bottom portion and the second main surface.

Abstract: A first main surface is provided with: a gate trench defined by a first side surface and a first bottom surface; and a source trench defined by a second side surface and a second bottom surface. A silicon carbide substrate includes a drift region, a body region, a source region, a first region, and a second region. The first region is in contact with the second region. A gate insulating film is in contact with the drift region, the body region, and the source region at the first side surface, and is in contact with the drift region at the first bottom surface. A source electrode is in contact with the second region at the second side surface and the second bottom surface.

Abstract: A silicon carbide semiconductor device includes a silicon carbide substrate and a gate insulating film. The silicon carbide substrate has a first main surface and a second main surface opposite to the first main surface. The gate insulating film is provided on the first main surface. The silicon carbide substrate includes a first body region having p type, a second body region having p type, and a JFET region provided between the first body region and the second body region and having n type. The JFET region has both a first impurity capable of providing the p type and a second impurity capable of providing the n type. A concentration of the second impurity is higher than a concentration of the first impurity. The silicon carbide semiconductor device capable of suppressing dielectric breakdown of the gate insulating film is provided.

Abstract: A silicon carbide semiconductor device includes a silicon carbide substrate and a gate insulating film. The silicon carbide substrate has a first main surface and a second main surface opposite to the first main surface. The gate insulating film is provided on the first main surface. The silicon carbide substrate includes a first body region having p type, a second body region having p type, and a JFET region provided between the first body region and the second body region and having n type. The JFET region has both a first impurity capable of providing the p type and a second impurity capable of providing the n type. A concentration of the second impurity is higher than a concentration of the first impurity. The silicon carbide semiconductor device capable of suppressing dielectric breakdown of the gate insulating film is provided.