Patents by Inventor Kouichi Harada

Kouichi Harada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7289150
    Abstract: In a CCD image apparatus in which an image section is horizontally divided into two areas, two horizontal CCDs are related to the two image areas with one-to-one correspondence and transfer the signal electric charges of the two image areas, and the two horizontal CCDs are driven in an identical direction by the same horizontal-driving pulses.
    Type: Grant
    Filed: July 20, 2001
    Date of Patent: October 30, 2007
    Assignee: Sony Corporation
    Inventor: Kouichi Harada
  • Publication number: 20060163617
    Abstract: Crosstalk between the adjacent pixels can be prevented by a structure in which an overflow barrier is provided at the deep potion of a substrate. A partial P type region 150 is provided at the predetermined position of a lower layer region of the vertical transfer register 124 and a channel stop region 126. This P type region 150 is used to adjust potential in the lower layer region of the vertical transfer register 124 and the channel stop region 126 so that the potential may become smaller than that of the lower layer region of the photosensor 122 in a range from the minimum potential position of the vertical transfer register 124 to the overflow barrier 128. Accordingly, since the potential in the lower layer region of the vertical transfer register 124 and the channel stop region 126 at both sides of the lower layer region is low, electric charges photoelectrically-converted by the sensor region are blocked by this potential barrier and cannot be diffused easily.
    Type: Application
    Filed: August 11, 2003
    Publication date: July 27, 2006
    Inventors: Kazushi Wada, Kouichi Harada, Shuji Otsuza, Mitsuru Sato
  • Patent number: 7034876
    Abstract: In a solid-state image pickup device, third transfer electrodes are disposed in parallel to vertical transfer registers, and second transfer electrodes are disposed vertically to the vertical transfer registers. These transfer electrodes are also formed on the read-out gate portions to supply a driving voltage for reading out signal charges from photoelectric conversion elements. On the basis of the driving voltage applied to both the third and second transfer electrodes, the read-out of the signal charges to the vertical transfer registers is carried out. At the portion where the read-out of the signal charges is carried out, the transfer electrode at the read-out gate portion side and the sensor area of the photoelectric conversion element are formed so as to be adjacent to each other. At the portion where no read-out of signal charges is carried out, an offset area is provided between the transfer electrode at the read-out gate portion side and the sensor area of the photoelectric conversion element.
    Type: Grant
    Filed: December 11, 2001
    Date of Patent: April 25, 2006
    Assignee: Sony Corporation
    Inventor: Kouichi Harada
  • Publication number: 20060072026
    Abstract: In a solid-state image pickup device, third transfer electrodes are disposed in parallel to vertical transfer registers, and second transfer electrodes are disposed vertically to the vertical transfer registers. These transfer electrodes are also formed on the read-out gate portions to supply a driving voltage for reading out signal charges from photoelectric conversion elements. On the basis of the driving voltage applied to both the third and second transfer electrodes, the read-out of the signal charges to the vertical transfer registers is carried out. At the portion where the read-out of the signal charges is carried out, the transfer electrode at the read-out gate portion side and the sensor area of the photoelectric conversion element are formed so as to be adjacent to each other. At the portion where no read-out of signal charges is carried out, an offset area is provided between the transfer electrode at the read-out gate portion side and the sensor area of the photoelectric conversion element.
    Type: Application
    Filed: December 2, 2005
    Publication date: April 6, 2006
    Inventor: Kouichi Harada
  • Patent number: 6927091
    Abstract: Disclosed is a method for fabricating a solid-state imaging device including a semiconductor substrate of a first conductivity type, a plurality of light-receiving sections provided at a distance in the surface region of the semiconductor substrate, and channel stop regions of a second conductivity type provided between the adjacent light-receiving sections in the surface region and in the internal region of the semiconductor substrate. The method includes the steps of forming a first photoresist layer having openings corresponding to positions at which the channel stop regions are formed; ion-implanting an impurity of a second conductivity type into the semiconductor substrate at a first energy through the first photoresist layer as a mask; forming a second photoresist layer having openings; and ion-implanting an impurity of a second conductivity type into the semiconductor substrate at a second energy through the second photoresist layer as a mask.
    Type: Grant
    Filed: August 19, 2002
    Date of Patent: August 9, 2005
    Assignee: Sony Corporation
    Inventor: Kouichi Harada
  • Patent number: 6879710
    Abstract: An object of the present invention is to provide an information processing apparatus which is provided with a fingerprint verification function with a high security and a high operability. When a fingerprint is inputted from a fingerprint reading surface of a display/fingerprint reading unit, a fingerprint data sensing control unit reads fingerprint data and coordinate data, and stores the data into a storage unit. The fingerprint data is verified against fingerprint data previously registered and stored in a storage unit, to determine whether or not there is a matching fingerprint. In an information processing apparatus, a fingerprint verification function is thus implemented. Further, based on the coordinate data related to fingerprint input, the operation of the information processing apparatus is controlled.
    Type: Grant
    Filed: April 5, 2000
    Date of Patent: April 12, 2005
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Sadahiko Hinoue, Kouichi Harada
  • Publication number: 20050046721
    Abstract: A solid-state image pickup device including a charge transferrer to transfer a signal charge obtained through photoelectric conversion; a floating diffusion region; a reset means for resetting the potential of the floating diffusion region; and a current source for supplying, to the floating diffusion region, a signal charge corresponding to the quantity of the signal charge transferred by the charge transferrer. The current source such as a current mirror circuit is interposed between the output stage of a horizontal CCD and the floating diffusion region so as to supply thereto a signal charge corresponding to the quantity of the signal charge transferred by the horizontal CCD, hence separating the horizontal CCD and the floating diffusion region potentially from each other, whereby the supply voltage, i.e., the reset voltage for the floating diffusion region, can be set independently of the potential of the horizontal CCD.
    Type: Application
    Filed: August 26, 2004
    Publication date: March 3, 2005
    Applicant: Sony Corporation
    Inventor: Kouichi Harada
  • Patent number: 6784872
    Abstract: A bidirectional remote control system composed of an electronic appliance and a remote control. The electronic appliance is provided with a display information storage section for storing therein display information for displaying buttons, icons or the like necessary to control the electronic appliance itself, and a transmitting section for transmitting display information stored in the display information storage section to the remote control.
    Type: Grant
    Filed: February 18, 2000
    Date of Patent: August 31, 2004
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yasuhiro Matsui, Kouichi Harada
  • Publication number: 20040021155
    Abstract: An interline transmission-format solid-state image-sensing device, which reads out all pixels, includes a two-dimensional array of a plurality of photosensitive units and a plurality of vertical CCD segments. Each vertical CCD segment is provided for one vertical line of the photosensitive units. A plurality of vertical transmission electrodes extends above each of these vertical transmission electrodes. At least one of these vertical transmission electrodes is arranged above the photosensitive units and is composed of a transparent film at least in regions above the photosensitive units.
    Type: Application
    Filed: February 26, 2003
    Publication date: February 5, 2004
    Inventor: Kouichi Harada
  • Patent number: 6655581
    Abstract: An ATM having a guide capability in which even a visually handicapped person who can not read braille type can positively operate a customer operating touch panel. An automatic teller machine includes a customer operating touch panel 2 having a plurality of operating keys which are touched for actuation. Guide icons 3 which are embossed to represent the icons of the operating keys are provided in the periphery of the customer operating touch panel at positions corresponding to said plurality of operating keys.
    Type: Grant
    Filed: June 9, 2000
    Date of Patent: December 2, 2003
    Assignee: NEC Corporation
    Inventors: Kazuhiko Takishima, Kazuya Akiyama, Kazuo Miyashita, Kazuya Osada, Kenjirou Mizumoto, Takashi Matsuda, Kouichi Harada
  • Patent number: 6553134
    Abstract: An object of the invention is to provide a small-size image reading apparatus which has a high accuracy in image reading, by a different means from the prior arts. A panel includes a plurality of two-dimensionally arranged photoreceptor devices which are interposed between a pair of light-transmitting substrates. At an edge of one of the light-transmitting substrate, a slope is formed, and a light source is opposed to the slope. Light transmitted by reflection on the surfaces of the light-transmitting substrates is emitted on an object which comes in contact with the surface of the panel, and light returned from the object is received by the photoreceptor devices, whereby an image of the object is read. Thus, a direction in which light passes through the panel can be restricted, and the accuracy in image reading can be increased.
    Type: Grant
    Filed: January 20, 2000
    Date of Patent: April 22, 2003
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Masashi Amano, Sadahiko Hinoue, Masaharu Satoh, Kouichi Harada
  • Publication number: 20030059974
    Abstract: Disclosed is a method for fabricating a solid-state imaging device including a semiconductor substrate of a first conductivity type, a plurality of light-receiving sections provided at a distance in the surface region of the semiconductor substrate, and channel stop regions of a second conductivity type provided between the adjacent light-receiving sections in the surface region and in the internal region of the semiconductor substrate. The method includes the steps of forming a first photoresist layer having openings corresponding to positions at which the channel stop regions are formed; ion-implanting an impurity of a second conductivity type into the semiconductor substrate at a first energy through the first photoresist layer as a mask; forming a second photoresist layer having openings; and ion-implanting an impurity of a second conductivity type into the semiconductor substrate at a second energy through the second photoresist layer as a mask.
    Type: Application
    Filed: August 19, 2002
    Publication date: March 27, 2003
    Inventor: Kouichi Harada
  • Publication number: 20030052976
    Abstract: Disclosed herein is a photographing device that comprises a plurality of light-receiving elements (8a to 8h), a plurality of vertical transfer registers (7a, 7b), a first drive-voltage applying electrode (3a, 3b), and a second drive-voltage applying electrode (1 to 2c). The light-receiving elements (8a to 8h) are arranged in a horizontal direction and a vertical direction. The vertical transfer registers (7a, 7b) transfers the electric charges accumulated in the light-receiving elements in the vertical direction. The first drive-voltage applying electrode (3a, 3b) are arranged parallel to the vertical transfer registers, for applying a drive voltage to a specific one of the vertical transfer registers. The second drive-voltage applying electrode (1 to 2c) is arranged perpendicular to the vertical transfer registers, for applying a second drive voltage to the vertical transfer registers at the same time.
    Type: Application
    Filed: September 25, 2002
    Publication date: March 20, 2003
    Inventors: Kouichi Harada, Tomoo Mitsunaga, Seiji Kobayashi
  • Patent number: 6526436
    Abstract: In an electronic mail communication apparatus and in an electronic mail transmission method, to a signature entered through a data entry means 2 and stored in a RAM 7, information on the current location found by a current location finder and stored in the RAM 7, characters such as “in”, and a CR code are added. A text of electronic mail is transmitted with this signature appended thereto.
    Type: Grant
    Filed: May 27, 1999
    Date of Patent: February 25, 2003
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Naoki Shiraishi, Kouichi Harada
  • Patent number: 6473784
    Abstract: A terminal apparatus is constituted by an added data input section, a writing start/completion detecting section, an input position detecting section, a connected terminal selecting section, a specific terminal information input section, an added data storing section, a specific terminal information storing section, a specific terminal judging section, a display section, a transmitting terminal identification information adding section, a transmitting terminal information storing section, a transmitting terminal judging section, a data transmitting section, a data receiving section, a memory section(not shown), and a section(not shown) for inputting and measuring date information. This arrangement allows an information processing apparatus, which sends and receives data to and from a plurality of information processing apparatuses via a communicating means and includes a common board for a plurality of information processings, to improve ability to recognize data.
    Type: Grant
    Filed: December 29, 1998
    Date of Patent: October 29, 2002
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Isamu Haneda, Kouichi Harada
  • Publication number: 20020129105
    Abstract: A terminal apparatus is constituted by an added data input section, a writing start/completion detecting section, an input position detecting section, a connected terminal selecting section, a specific terminal information input section, an added data storing section, a specific terminal information storing section, a specific terminal judging section, a display section, a transmitting terminal identification information adding section, a transmitting terminal information storing section, a transmitting terminal judging section, a data transmitting section, a data receiving section, a memory section (not shown), and a section (not shown) for inputting and measuring date information. This arrangement allows an information processing apparatus, which sends and receives data to and from a plurality of information processing apparatuses via a communicating means and includes a common board for a plurality of information processings, to improve ability to recognize data.
    Type: Application
    Filed: December 29, 1998
    Publication date: September 12, 2002
    Inventors: ISAMU HANEDA, KOUICHI HARADA
  • Publication number: 20020105586
    Abstract: In a solid-state image pickup device, third transfer electrodes are disposed in parallel to vertical transfer registers, and second transfer electrodes are disposed vertically to the vertical transfer registers. These transfer electrodes are also formed on the read-out gate portions to supply a driving voltage for reading out signal charges from photoelectric conversion elements. On the basis of the driving voltage applied to both the third and second transfer electrodes, the read-out of the signal charges to the vertical transfer registers is carried out. At the portion where the read-out of the signal charges is carried out, the transfer electrode at the read-out gate portion side and the sensor area of the photoelectric conversion element are formed so as to be adjacent to each other. At the portion where no read-out of signal charges is carried out, an offset area is provided between the transfer electrode at the read-out gate portion side and the sensor area of the photoelectric conversion element.
    Type: Application
    Filed: December 11, 2001
    Publication date: August 8, 2002
    Inventor: Kouichi Harada
  • Publication number: 20020071046
    Abstract: In a CCD image apparatus in which an image section is horizontally divided into two areas, two horizontal CCDs are related to the two image areas with one-to-one correspondence and transfer the signal electric charges of the two image areas, and the two horizontal CCDs are driven in an identical direction by the same horizontal-driving pulses.
    Type: Application
    Filed: July 20, 2001
    Publication date: June 13, 2002
    Inventor: Kouichi Harada
  • Patent number: 6358814
    Abstract: To control the positional relation between semiconductor regions formed on an epitaxial layer after the epitaxial layer is formed with high accuracy in a method for manufacturing semiconductor devices in which a plurality of semiconductor regions are formed selectively on the epitaxial layer on the semiconductor surface having a semiconductor region formed selectively on the semiconductor surface, a first wafer alignment mark is formed on the semiconductor substrate surface to be served as the under layer of an epitaxial layer which will be formed subsequently, and the wafer alignment mark is used as an index for wafer alignment for forming selectively a semiconductor region, and a second wafer alignment mark is formed on the surface of the epitaxial layer after the epitaxial layer is formed, and the second wafer alignment mark is used as an index for wafer alignment for forming respective semiconductor regions on the epitaxial layer.
    Type: Grant
    Filed: May 7, 1999
    Date of Patent: March 19, 2002
    Assignee: Sony Corporation
    Inventor: Kouichi Harada
  • Patent number: 6339213
    Abstract: A CCD solid state imaging device (21), which is comprised of an imaging section (24) formed of a plurality of light receiving portions (22), each serving as a pixel, and of a vertical transfer register (23) corresponding to each column of light receiving portions, first and second storage sections (26A) and (26B) capable of storing a charge from the imaging section (24), a horizontal transfer register (27) and a smear drain region (28), is employed, wherein after a first smear component charge (I) in the vertical transfer register (23) is swept away to the smear drain region , the vertical transfer register is operated at a high speed under such a state that a signal charge of the light receiving portion (22) is not read to the vertical transfer register (23) to store a second smear component charge (II) generated during the high speed transfer in the first storage section (26A), then the signal charge of the light receiving portion (22) is read to the vertical transfer register (23), the same is transferred
    Type: Grant
    Filed: July 29, 1998
    Date of Patent: January 15, 2002
    Assignee: Sony Corporation
    Inventor: Kouichi Harada