Patents by Inventor Kouichi Yamaguchi
Kouichi Yamaguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240246989Abstract: A compound that inhibits interaction between murine double minute 2 (Mdm2) protein and p53 protein and exhibits anti-tumor activity is provided. The present invention provides a dispiropyrrolidine derivative represented by the following formula (1), which has various substituents, inhibits interaction between Mdm2 protein and p53 protein and exhibits anti-tumor activity, wherein R1, R2, R3, ring A, and ring B in formula (1) respectively have the same meanings as defined in the specification.Type: ApplicationFiled: August 15, 2023Publication date: July 25, 2024Inventors: Yuuichi Sugimoto, Kouichi Uoto, Takanori Wakabayashi, Masaki Miyazaki, Masaki Setoguchi, Toru Taniguchi, Keisuke Yoshida, Akitake Yamaguchi, Shoko Yoshida
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Patent number: 12044801Abstract: A distance measurement device for measuring a distance to an object that exists in a distance measurement region includes: a light source configured to emit laser light; a lens configured to converge the laser light emitted from the light source, into substantially parallel light; a tubular light blocking member disposed on an optical path of the laser light emitted from the light source and surrounding the optical path; a photodetector configured to detect reflected light, of the laser light, reflected at the distance measurement region; and a condensing lens configured to condense the reflected light passing through the outside of the light blocking member, onto the photodetector.Type: GrantFiled: January 20, 2021Date of Patent: July 23, 2024Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Kiyoshi Hibino, Takashi Haruguchi, Masaomi Inoue, Kazuhisa Ide, Masahiro Shiihara, Kouichi Bairin, Kouichi Kumamaru, Hirotaka Ueno, Hideo Yamaguchi
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Patent number: 10187117Abstract: Provided is a receiving circuit that operates in a power supply system different from a transmitting circuit outputting a transmission signal and receives the transmission signal through an AC coupling device where a primary coil through which the transmission signal flows and a secondary coil having a center tap to which a specified voltage is supplied from an external terminal are magnetically coupled, which includes a pulse width amplifier circuit that holds pulse signals appearing at both ends of the secondary coil for a specified period of time and outputs them as hold signals, respectively, and a differential amplifier that compares a voltage of the hold signal and a voltage of the hold signal and outputs a comparison result.Type: GrantFiled: July 11, 2017Date of Patent: January 22, 2019Assignee: Renesas Electronics CorporationInventors: Shunichi Kaeriyama, Kouichi Yamaguchi, Koichi Nose
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Publication number: 20170310236Abstract: Provided is a receiving circuit that operates in a power supply system different from a transmitting circuit outputting a transmission signal and receives the transmission signal through an AC coupling device where a primary coil through which the transmission signal flows and a secondary coil having a center tap to which a specified voltage is supplied from an external terminal are magnetically coupled, which includes a pulse width amplifier circuit that holds pulse signals appearing at both ends of the secondary coil for a specified period of time and outputs them as hold signals, respectively, and a differential amplifier that compares a voltage of the hold signal and a voltage of the hold signal and outputs a comparison result.Type: ApplicationFiled: July 11, 2017Publication date: October 26, 2017Inventors: Shunichi KAERIYAMA, Kouichi YAMAGUCHI, Koichi NOSE
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Patent number: 9716440Abstract: Provided is a receiving circuit that operates in a power supply system different from a transmitting circuit outputting a transmission signal and receives the transmission signal through an AC coupling device where a primary coil through which the transmission signal flows and a secondary coil having a center tap to which a specified voltage is supplied from an external terminal are magnetically coupled, which includes a pulse width amplifier circuit that holds pulse signals appearing at both ends of the secondary coil for a specified period of time and outputs them as hold signals, respectively, and a differential amplifier that compares a voltage of the hold signal and a voltage of the hold signal and outputs a comparison result.Type: GrantFiled: April 5, 2012Date of Patent: July 25, 2017Assignee: RENASAS ELECTRONICS CORPORATIONInventors: Shunichi Kaeriyama, Kouichi Yamaguchi, Koichi Nose
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Patent number: 9455770Abstract: In a related transmitting circuit employing electromagnetic induction that is used in a communication system, there is a problem in that, because only one inductor is used in the transmitting circuit, it is impossible to perform communication at a data rate higher than the self-resonant frequency of the inductor. A transmitting circuit according to an embodiment of the present invention is a transmitting circuit that drives an inductor to transmit data to a semiconductor chip insulated from a semiconductor chip on which the transmitting circuit is mounted, and includes a driving circuit that receives outgoing data transmitted at a data rate higher than the self-resonant frequency of the inductor and outputs an outgoing signal that drives the inductor at the data rate of the outgoing data.Type: GrantFiled: May 22, 2015Date of Patent: September 27, 2016Assignee: Renesas Electronics CorporationInventor: Kouichi Yamaguchi
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Patent number: 9071288Abstract: A transmitting circuit that includes a driving circuit that drives an inductor to transmit data to a semiconductor chip insulated from a semiconductor chip on which the transmitting circuit is mounted. The driving circuit receives an outgoing data, compensates wave distortion of the outgoing data generated from the self-resonance of the inductor, generates a compensated outgoing data, and outputs the compensated outgoing data to drive the inductor, such that the outgoing data is transmitted at a data rate higher than the self-resonant frequency of the inductor.Type: GrantFiled: January 17, 2012Date of Patent: June 30, 2015Assignee: Renesas Electronics CorporationInventor: Kouichi Yamaguchi
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Patent number: 8829045Abstract: An agrochemical composition comprising a propylene glycol fatty acid monoester and fenbutatin oxide in a proportion of 1:150 to 150:1 in terms of a mass ratio (propylene glycol fatty acid monoester:fenbutatin oxide) shows an excellent control effect on pests, hyposensitive mites having reduced sensitivity to chemicals, eggs of mites, and pests other than mites in all stages of growth, even when the composition is applied in a small amount. A pest control method comprising applying the propylene glycol fatty acid monoester and fenbutatin oxide in a proportion of 1:150 to 150:1 in terms of a mass ratio (propylene glycol fatty acid monoester:fenbutatin oxide) to pests or a habitat of the pests also shows an excellent control effect.Type: GrantFiled: March 26, 2010Date of Patent: September 9, 2014Assignee: Ishihara Sangyo Kaisha, Ltd.Inventors: Kohji Hirano, Kouichi Yamaguchi, Makiko Ohasa
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Patent number: 8811556Abstract: High data-rate magnetic coupling communication is realized with a small circuit size without sacrificing the communication distance. A received data acquisition circuit performs a decision-feedback equalization process on a received signal to obtain a shaped signal, and also performs sampling of the shaped signal with a sampling rate equal to or higher than a self-resonant frequency, according to a sampling clock, to obtain a data sample. A midpoint sample acquisition circuit performs sampling of the received signal at an intermediate timing of a sampling timing of the received data acquisition circuit to obtain a midpoint sample. A phase adjustment circuit adjusts a phase of the sampling clock, based on the data sample and the midpoint sample.Type: GrantFiled: May 10, 2013Date of Patent: August 19, 2014Assignee: Renesas Electronics CorporationInventor: Kouichi Yamaguchi
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Patent number: 8774321Abstract: A clock data recovery circuit includes: a demodulation filter that receives a transmission signal transmitted by two orthogonal carrier waves having I and Q phases and executes demodulation to obtain a demodulated wave having an phase and a demodulated wave having a Q phase from the transmission signal; a first determination circuit that determines whether an absolute value of one of the two demodulated waves is greater than an eye opening maximum value at an ideal clock phase of the transmission signal; a second determination circuit that determines whether the one demodulated wave is greater than zero; a third determination circuit that determines whether the other one of the two demodulated waves is greater than zero; and a phase comparison unit that detects whether a phase of a clock signal included in the transmission signal is leading a phase of a data signal included in the transmission signal, based on determination results obtained by the first to third determination circuits.Type: GrantFiled: September 7, 2010Date of Patent: July 8, 2014Assignee: NEC CorporationInventors: Kazuhisa Sunaga, Kouichi Yamaguchi
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Publication number: 20140085951Abstract: Provided is a receiving circuit that operates in a power supply system different from a transmitting circuit outputting a transmission signal and receives the transmission signal through an AC coupling device where a primary coil through which the transmission signal flows and a secondary coil having a center tap to which a specified voltage is supplied from an external terminal are magnetically coupled, which includes a pulse width amplifier circuit that holds pulse signals appearing at both ends of the secondary coil for a specified period of time and outputs them as hold signals, respectively, and a differential amplifier that compares a voltage of the hold signal and a voltage of the hold signal and outputs a comparison result.Type: ApplicationFiled: April 5, 2012Publication date: March 27, 2014Applicant: RENESAS ELECTRONICS CORPORATIONInventors: Shunichi Kaeriyama, Kouichi Yamaguchi, Koichi Nose
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Publication number: 20130329776Abstract: High data-rate magnetic coupling communication is realized with a small circuit size without sacrificing the communication distance. A received data acquisition circuit performs a decision-feedback equalization process on a received signal to obtain a shaped signal, and also performs sampling of the shaped signal with a sampling rate equal to or higher than a self-resonant frequency, according to a sampling clock, to obtain a data sample. A midpoint sample acquisition circuit performs sampling of the received signal at an intermediate timing of a sampling timing of the received data acquisition circuit to obtain a midpoint sample. A phase adjustment circuit adjusts a phase of the sampling clock, based on the data sample and the midpoint sample.Type: ApplicationFiled: May 10, 2013Publication date: December 12, 2013Inventor: Kouichi Yamaguchi
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Patent number: 8446942Abstract: A waveform equalization circuit includes: a decision feedback equalization unit that feeds back and equalizes an input signal; a clock phase adjustment unit that adjusts a clock phase of a signal equalized by the decision feedback equalization unit based on a signal determined with a prescribed potential as a threshold; and a duo-binary decoder that encodes, into a duo-binary signal, the signal determined with the prescribed potential as a threshold based on a clock adjusted by the clock phase adjustment unit from the signal equalized by the decision feedback equalization unit; wherein the equalized signal is generated by adding the duo-binary signal encoded by the duo-binary decoder to the input signal. A first post-tap of the input signal is equalized by the clock phase adjustment unit without feedback equalization by the decision feedback equalization unit. Second and subsequent post-taps of the input signal are fed back and equalized by the decision feedback equalization unit.Type: GrantFiled: March 6, 2009Date of Patent: May 21, 2013Assignee: NEC CorporationInventors: Hideyuki Hasegawa, Kazuhisa Sunaga, Kouichi Yamaguchi
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Patent number: 8284148Abstract: A clockless transmission system includes display controller 101 and display driver 106. Display controller 101 includes data transmission circuit 102 configured to output general data obtained by multiplexing a clock by coding serialized pixel data for each pixel data during a data communication interval and also to output a predetermined control signal during a blanking interval. Display driver 106 includes clock and data recovery circuit 107 configured to output the pixel data from the general data transferred from the display controller and to increase a loop gain of a feedback loop in clock recovery such that the loop gain is larger than that when the general data is received, according to control data of the control signal, to recover and output a clock, and display driving circuit 109 configured to output a signal for driving a display based on the pixel data and the recovered clock.Type: GrantFiled: February 27, 2008Date of Patent: October 9, 2012Assignee: NEC CorporationInventor: Kouichi Yamaguchi
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Publication number: 20120183038Abstract: In a related transmitting circuit employing electromagnetic induction that is used in a communication system, there is a problem in that, because only one inductor is used in the transmitting circuit, it is impossible to perform communication at a data rate higher than the self-resonant frequency of the inductor. A transmitting circuit according to an embodiment of the present invention is a transmitting circuit that drives an inductor to transmit data to a semiconductor chip insulated from a semiconductor chip on which the transmitting circuit is mounted, and includes a driving circuit that receives outgoing data transmitted at a data rate higher than the self-resonant frequency of the inductor and outputs an outgoing signal that drives the inductor at the data rate of the outgoing data.Type: ApplicationFiled: January 17, 2012Publication date: July 19, 2012Applicant: RENESAS ELECTRONICS CORPORATIONInventor: Kouichi YAMAGUCHI
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Publication number: 20120170692Abstract: A clock data recovery circuit includes: a demodulation filter that receives a transmission signal transmitted by two orthogonal carrier waves having I and Q phases and executes demodulation to obtain a demodulated wave having an phase and a demodulated wave having a Q phase from the transmission signal; a first determination circuit that determines whether an absolute value of one of the two demodulated waves is greater than an eye opening maximum value at an ideal clock phase of the transmission signal; a second determination circuit that determines whether the one demodulated wave is greater than zero; a third determination circuit that determines whether the other one of the two demodulated waves is greater than zero; and a phase comparison unit that detects whether a phase of a clock signal included in the transmission signal is leading a phase of a data signal included in the transmission signal, based on determination results obtained by the first to third determination circuits.Type: ApplicationFiled: September 7, 2010Publication date: July 5, 2012Inventors: Kazuhisa Sunaga, Kouichi Yamaguchi
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Publication number: 20120126865Abstract: A clock regeneration circuit according to an exemplary embodiment of the present invention is characterized in that a phase comparison result of serial data being inputted and a clock signal is shaped with use of the clock signal or another clock signal having a predetermined phase difference from the clock signal, and a phase of the clock signal is controlled with use of the shaped phase comparison result.Type: ApplicationFiled: August 4, 2009Publication date: May 24, 2012Applicant: NEC CorporationInventor: Kouichi Yamaguchi
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Publication number: 20120126854Abstract: A frequency regeneration circuit according to the present invention compares a width of a single pulse of input data with a time width of a 1/n clock cycle defined by a phase difference of multi-phase clock signals (where n is a natural number) in order to regenerate a frequency that is 1/n of a rate of the input data.Type: ApplicationFiled: August 4, 2009Publication date: May 24, 2012Applicant: NEC CORPORATIONInventor: Kouichi Yamaguchi
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Patent number: 8184738Abstract: A common mode of a waveform of a duobinary transmission signal (IN) is set to 0 and the size of a data eye is set to Veye; and reference potentials Vref_H and Vref_L are set to the following values: Veye/?{square root over (3)}?Vref—H?Veye/?{square root over (2)}??(1) ?Veye/?{square root over (2)}?Vref—L??Veye/?{square root over (3)}??(2) More particularly, effect becomes remarkable by setting the reference potentials Vref_H and Vref_L to central values in ranges shown in Equations (1) and (2), respectively. In the central values, fluctuation (jitter) of transition data becomes the smallest, and a jitter characteristic of a reproducing clock becomes the best. Consequently, a clock reproducing apparatus in which a received clock from duobinary transmission data is reproduced with high accuracy is provide.Type: GrantFiled: September 28, 2006Date of Patent: May 22, 2012Assignee: NEC CorporationInventors: Kazuhisa Sunaga, Kouichi Yamaguchi, Muneo Fukaishi
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Patent number: 8150472Abstract: Function distinguishing marks are efficiently displayed which correspond to a plurality of functions assigned to a single operation key, respectively. A mobile phone (1) changes in accordance with the number of functions assigned to a single operation key the number of the function distinguishing marks to be displayed which indicate functions.Type: GrantFiled: June 26, 2007Date of Patent: April 3, 2012Assignee: Sharp Kabushiki KaishaInventors: Kouichi Yamaguchi, Takayuki Hayashi