Patents by Inventor Kouji Kumada
Kouji Kumada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20120127109Abstract: Provided is a portable display device sufficiently small to be held with one hand that enters a state for accepting a gesture when a fixed coordinate position near a central portion between a left display unit (14a) and a right display unit (14b) is pressed with a thumb Ftl of one hand holding the device, and accepts a command for performing such as page flipping processing based on a gesture inputted with an index finger Ffr of the other hand. Thus, it is possible to achieve an interface for input operations suitable for a two-screen display screen, where holding a two-screen portable display device naturally causes the device to enter a command accepting state to allow gesture recognition, and to enter a command non-accepting state when the portable display device is not held, in order to prevent a command from being falsely executed due to an unintended contact and such to the display screen.Type: ApplicationFiled: March 19, 2010Publication date: May 24, 2012Applicant: Sharp Kabushiki KaishaInventors: Masaaki Nishio, Yoshirou Kataoka, Kouji Kumada
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Publication number: 20120105404Abstract: A recognition processing unit (22) performs recognition processing on a scan image based on a signal read from a light sensor (2) and outputs coordinate data (Co) indicating the position of an object to be detected. A mode control unit (24) determines a normal mode in which the recognition processing unit (22) is operated or a standby mode in which the operation of the recognition processing unit (22) is stopped. A thinned image memory (25) stores a thinned image when the normal mode is switched to the standby mode. The mode control unit (24) switches the standby mode to the normal mode when a newly supplied thinned image changes from the stored thinned image by a prescribed amount or more. Thus, it is possible to rapidly leave the standby mode and quickly detect the contact position.Type: ApplicationFiled: February 26, 2010Publication date: May 3, 2012Applicant: SHARP KABUSHIKI KAISHAInventors: Toshimitsu Gotoh, Atsushi Okada, Kouji Kumada, Masaaki Nishio
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Publication number: 20120069594Abstract: An interior lighting display device and a display panel thereof capable of effectively preventing a dark area from being formed in the display panel. A film or sheet that reflects light is disposed on a back surface and a side surface of a display panel of an interior lighting display device. For example, the film or sheet is disposed on a back surface and a side surface of a region that is a colored area having low transmittance of the display panel, and an area in which a light source is not present behind the display panel. In addition, a light reflective body is placed in an area in which the light source is not present within the interior lighting display device.Type: ApplicationFiled: December 9, 2009Publication date: March 22, 2012Applicant: FURUKAWA ELECTRIC CO., LTD.Inventors: Shingo Nomura, Kensuke Mizobuchi, Hideyuki Ikeda, Kouji Kumada, Kouji Katsura, Yoichi Shibata, Hideo Yoshida, Yoichiro Shiozaki
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Patent number: 8139013Abstract: An image display according to the present invention includes a driving device which performs pulse width modulation drive, restrains power consumption, and produces a good multi-tone display. The image display makes the difference between the scan line voltage and the signal line voltage equal in positive polarity writing and negative polarity writing by which pixels are AC driven, so as to make the on-resistances of transistors equal. This allows a maximum pulse width, the size of switching elements, etc. to be determined first so that they match positive polarity writing in which the resistances value of the switching elements rise. No high frequency clock is required to produce subtle differences of charge ratio in negative polarity writing in which the resistances of the switching elements fall. Power consumption which depends on the clock frequency drops too.Type: GrantFiled: February 15, 2008Date of Patent: March 20, 2012Assignee: Sharp Kabushiki KaishaInventors: Kouji Kumada, Takashige Ohta, Haruhito Kagawa
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Patent number: 8068190Abstract: In a photosensor in the pixel region of an active matrix substrate, the potential of a storage node is read out to output wiring as sensor circuit output, the potential of the storage node having changed in accordance with the amount of light received by a photodetection element in a sensing period, the sensing period being from when a reset signal (RS) is supplied until when a readout signal (RW) is supplied. A sensor startup period whose length is greater than or equal to the length of the sensing period is provided after a sensor data unnecessary period in which the sensor circuit output is not necessary, and furthermore before a valid sensor data period in which the sensor circuit output is necessary, and the sensor circuit output is read out in the valid sensor data period from the photosensor to which the reset signal was applied in the sensor startup period.Type: GrantFiled: June 2, 2009Date of Patent: November 29, 2011Assignee: Sharp Kabushiki KaishaInventors: Kazuhiro Maeda, Ichiro Shiraki, Hiromi Katoh, Kouji Kumada
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Publication number: 20110164012Abstract: In a photosensor in the pixel region of an active matrix substrate, the potential of a storage node is read out to output wiring as sensor circuit output, the potential of the storage node having changed in accordance with the amount of light received by a photodetection element in a sensing period, the sensing period being from when a reset signal (RS) is supplied until when a readout signal (RW) is supplied. A sensor startup period whose length is greater than or equal to the length of the sensing period is provided after a sensor data unnecessary period in which the sensor circuit output is not necessary, and furthermore before a valid sensor data period in which the sensor circuit output is necessary, and the sensor circuit output is read out in the valid sensor data period from the photosensor to which the reset signal was applied in the sensor startup period.Type: ApplicationFiled: June 2, 2009Publication date: July 7, 2011Inventors: Kazuhiro Maeda, Ichiro Shiraki, Hiromi Katoh, Kouji Kumada
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Patent number: 7924276Abstract: A liquid crystal panel (2) includes scanning signal lines (31) for supplying scanning signals to gate electrodes (20) of TFTs (14), and data signal lines (32) for supplying data signals to data electrodes (24) of TFTs. The liquid crystal panel further includes auxiliary capacitive electrode pads (27a) for use in forming auxiliary capacitance and an auxiliary capacitive lines (33) so as not to generate a capacitive bond with the scanning signal lines. The liquid crystal panel is driven at a rewriting frequency of a screen of not more than 30 Hz. As a result, the liquid crystal panel can be driven at a low consumption power while maintaining a desirable display quality of the liquid crystal panel.Type: GrantFiled: September 11, 2007Date of Patent: April 12, 2011Assignee: Sharp Kabushiki KaishaInventors: Kazuhiko Tsuda, Masahiro Shimizu, Hisakazu Nakamura, Kouji Kumada, Takashige Ohta, Yutaka Kamezaki, Hitoshi Kamezaki, legal representative, Masano Kamezaki, legal representative
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Publication number: 20100295833Abstract: The present invention provides an active matrix display device, including: a data signal line drive circuit mounted by COG (Chip On Glass) bonding; a photosensor, which is included in a display region, for (i) detecting light intensity and (ii) sending out an analog output serving as a signal indicative of the detected light intensity; and a common electrode (COM) to which a voltage being AC-driven is applied. The data signal line drive circuit includes an analog-to-digital conversion circuit which converts the analog output supplied from the photosensor into a digital output. The conversion is carried out during a first period, which overlaps none of (a) a time point at which each of the scanning signal lines starts being in a selected state, (b) a period during which data signals are sent out to respective data signal lines, and (c) a time point at which the voltage of the common electrode changes.Type: ApplicationFiled: January 14, 2009Publication date: November 25, 2010Inventors: Masaaki Nishio, Kouji Kumada
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Publication number: 20100295832Abstract: A display device drive circuit (4) includes an AD conversion circuit (45) which carries out AD conversion of an analog signal (Vs), which is inputted via a first terminal (P) connected with data signal lines (SLR, SLG, and SLB). The first terminal (P) is time-divisionally used for (i) a period during which a data signal (Vd) is sent out and for (ii) a period during which the analog signal (Vs) is inputted. The first terminal (P) is (a) connected with the AD conversion circuit (45) via only a switching circuit (47b) and a sample hold circuit, and (b) directly connected with an output circuit (47a), During the period during which the data signal (Vd) is sent out, the switching circuit (47b) disconnects the first terminal (P) from the AD conversion circuit, whereas, during the period during which the analog signal (Vs) is inputted, the switching circuit (47b) electrically connects the first terminal (P) to the AD conversion circuit and an output of the output circuit (47a) becomes high impedance.Type: ApplicationFiled: January 19, 2009Publication date: November 25, 2010Inventors: Masaaki Nishio, Kouji Kumada
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Publication number: 20100066922Abstract: In one embodiment of the present invention, a first gate driver circuit is disclosed including a shift register and a plurality of amplifier circuits is connected to one end of each gate line, and a second gate driver circuit including a shift register and a plurality of amplifier circuits is connected to the other end of each gate line. The amplifier circuit has an NMOS switch provided in its last stage, and the amplifier circuit has a PMOS switch provided in its last stage. The gate line, is driven by either of two switches connected to its opposite ends being brought into ON state. One of the amplifier circuits may have a CMOS switch provided in its last stage, and the other amplifier circuit has a PMOS switch or an NMOS switch provided in its last stage. As a result, a display device is provided, which has driver circuits arranged in a well-balanced manner to achieve a left-right symmetrical display area.Type: ApplicationFiled: November 12, 2007Publication date: March 18, 2010Inventor: Kouji Kumada
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Patent number: 7479932Abstract: The sub panel 100, having a plurality of gate bus lines 14, source bus lines 16, TFTs 25 and pixel electrodes, is provided with a source driver 15. The main panel 200 has a plurality of gate bus lines 24, source bus lines 16, TFTs 25 and pixel electrodes, each of the source bus lines 16 being connected to the corresponding source bus lines 16 of the first liquid crystal panel 10 through a switching TFT 17. The main panel 200, sharing the source driver 15 with the first liquid crystal panel 10, is less frequently used for display than the first liquid crystal panel 10, and is disconnected by the switching TFT 17 when only the sub panel 100 is used. This makes it possible to device a twin-panel display device low in electric power consumption.Type: GrantFiled: February 16, 2005Date of Patent: January 20, 2009Assignee: Sharp Kabushiki KaishaInventors: Noriyuki Tanaka, Kouji Kumada
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Publication number: 20080284769Abstract: An image display according to the present invention includes a driving device which performs pulse width modulation drive, restrains power consumption, and produces a good multi-tone display. The image display makes the difference between the scan line voltage and the signal line voltage equal in positive polarity writing and negative polarity writing by which pixels are AC driven, so as to make the on-resistances of transistors equal. This allows a maximum pulse width, the size of switching elements, etc. to be determined first so that they match positive polarity writing in which the resistances value of the switching elements rise. No high frequency clock is required to produce subtle differences of charge ratio in negative polarity writing in which the resistances of the switching elements fall. Power consumption which depends on the clock frequency drops too.Type: ApplicationFiled: February 15, 2008Publication date: November 20, 2008Inventors: Kouji Kumada, Takashige Ohta, Haruhito Kagawa
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Publication number: 20080246721Abstract: An image display according to the present invention includes a driving device which performs pulse width modulation drive, restrains power consumption, and produces a good multi-tone display. The image display makes the difference between the scan line voltage and the signal line voltage equal in positive polarity writing and negative polarity writing by which pixels are AC driven, so as to make the on-resistances of transistors equal. This allows a maximum pulse width, the size of switching elements, etc. to be determined first so that they match positive polarity writing in which the resistances value of the switching elements rise. No high frequency clock is required to produce subtle differences of charge ratio in negative polarity writing in which the resistances of the switching elements fall. Power consumption which depends on the clock frequency drops too.Type: ApplicationFiled: February 15, 2008Publication date: October 9, 2008Inventors: Kouji Kumada, Takashige Ohta, Haruhito Kagawa
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Patent number: 7362321Abstract: An image display according to the present invention includes a driving device which performs pulse width modulation drive, restrains power consumption, and produces a good multi-tone display. The image display makes the difference between the scan line voltage and the signal line voltage equal in positive polarity writing and negative polarity writing by which pixels are AC driven, so as to make the on-resistances of transistors equal. This allows a maximum pulse width, the size of switching elements, etc. to be determined first so that they match positive polarity writing in which the resistances value of the switching elements rise. No high frequency clock is required to produce subtle differences of charge ratio in negative polarity writing in which the resistances of the switching elements fall. Power consumption which depends on the clock frequency drops too.Type: GrantFiled: February 4, 2003Date of Patent: April 22, 2008Assignee: Sharp Kabushiki KaishaInventors: Kouji Kumada, Takashige Ohta, Haruhito Kagawa
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Publication number: 20080055218Abstract: A liquid crystal panel (2) includes scanning signal lines (31) for supplying scanning signals to gate electrodes (20) of TFTs (14), and data signal lines (32) for supplying data signals to data electrodes (24) of TFTs. The liquid crystal panel further includes auxiliary capacitive electrode pads (27a) for use in forming auxiliary capacitance and an auxiliary capacitive lines (33) so as not to generate a capacitive bond with the scanning signal lines. The liquid crystal panel is driven at a rewriting frequency of a screen of not more than 30 Hz. As a result, the liquid crystal panel can be driven at a low consumption power while maintaining a desirable display quality of the liquid crystal panel.Type: ApplicationFiled: September 11, 2007Publication date: March 6, 2008Applicant: Sharp Kabushiki KaishaInventors: Kazuhiko Tsuda, Masahiro Shimizu, Hisakazu Nakamura, Kouji Kumada, Takashige Ohta, Yutaka Kamezaki, Hitoshi Kamezaki, Masano Kamezaki
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Patent number: 7330173Abstract: In a display, a first liquid crystal panel has gate bus lines, source bus lines, TFTs, and pixel electrodes, as well as a source driver. A second liquid crystal panel has gate bus lines, source bus lines, TFTs, and pixel electrodes. The source bus lines of the second liquid crystal panel are connected to the associated source bus lines of the first liquid crystal panel through switching TFTs. The source bus lines of the second liquid crystal panel are briefly and repeatedly fed with a predetermined potential when the switching TFTs are off. The invention reduces power consumption of dual panel structure displays and prevents occurrence of an unintended display on the second display panel which is not expected to produce any display.Type: GrantFiled: April 13, 2005Date of Patent: February 12, 2008Assignee: Sharp Kabushiki KaishaInventors: Kouji Kumada, Noriyuki Tanaka
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Patent number: 7321353Abstract: A liquid crystal panel (2) includes scanning signal lines (31) for supplying scanning signals to gate electrodes (20) of TFTs (14), and data signal lines (32) for supplying data signals to data electrodes (24) of TFTs. The liquid crystal panel further includes auxiliary capacitive electrode pads (27a) for use in forming auxiliary capacitance and an auxiliary capacitive lines (33) so as not to generate a capacitive bond with the scanning signal lines. The liquid crystal panel is driven at a rewriting frequency of a screen of not more than 30 Hz. As a result, the liquid crystal panel can be driven at a low consumption power while maintaining a desirable display quality of the liquid crystal panel.Type: GrantFiled: April 24, 2001Date of Patent: January 22, 2008Assignee: Sharp Kabushiki KaishaInventors: Kazuhiko Tsuda, Masahiro Shimizu, Hisakazu Nakamura, Kouji Kumada, Takashige Ohta
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Patent number: 7286108Abstract: A liquid crystal panel (2) includes scanning signal lines (31) for supplying scanning signals to gate electrodes (20) of TFTs (14), and data signal lines (32) for supplying data signals to data electrodes (24) of TFTs. The liquid crystal panel further includes auxiliary capacitive electrode pads (27a) for use in forming auxiliary capacitance and an auxiliary capacitive lines (33) so as not to generate a capacitive bond with the scanning signal lines. The liquid crystal panel is driven at a rewriting frequency of a screen of not more than 30 Hz. As a result, the liquid crystal panel can be driven at a low consumption power while maintaining a desirable display quality of the liquid crystal panel.Type: GrantFiled: May 14, 2004Date of Patent: October 23, 2007Assignee: Sharp Kabushiki KaishaInventors: Kazuhiko Tsuda, Masahiro Shimizu, Hisakazu Nakamura, Kouji Kumada, Takashige Ohta
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Patent number: 7190357Abstract: The signal line drive circuit is provided with: a reference voltage chooser circuit for choosing one of incoming voltages in accordance with tones represented by an image signal to output the chosen voltage as a signal line drive signal; and a reference voltage line for directly transmitting first reference voltages VB1 (inclusive of a maximum voltage value VB1max and a minimum voltage value VB1min) supplied by an external reference power supply circuit to the reference voltage chooser circuit. The arrangement eliminates the need to provide a buffer circuit to a reference voltage line over which the first reference voltage is directly transmitted, thereby reducing that electric current which would otherwise flow through the buffer circuit.Type: GrantFiled: August 9, 2001Date of Patent: March 13, 2007Assignee: Sharp Kabushiki KaishaInventors: Takashige Ohta, Toshihiro Yanagi, Kouji Kumada
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Patent number: 7176869Abstract: A drive circuit for use in a liquid crystal display supplies source signals from a source driver to pixel electrodes through switching by means of TFTs according to scan signals from a gate driver, includes a reference voltage generator circuit for adjusting potential differences between the pixel electrodes and a common electrode so as to compensate for the effects of variations in drain voltages caused by parasitic capacity in the TFTs and compensate for irregularities in DC voltage caused by asymmetry in properties between an active matrix substrate and an opposite substrate sandwiching a liquid crystal layer. The reference voltage generator circuit is composed of a reference voltage generator circuit for shifting the voltage levels of the source signals supplied by the source driver equally for all the pixel electrodes.Type: GrantFiled: July 3, 2001Date of Patent: February 13, 2007Assignee: Sharp Kabushiki KaishaInventors: Kouji Kumada, Toshihiro Yanagi, Takashige Ohta