Patents by Inventor Kouji Kumada

Kouji Kumada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20010033278
    Abstract: An image display device includes a display device driving circuit having a scanning signal driving section for outputting display scanning signals according to display data with respect to respective scanning signal lines for displaying an image which is in accordance with the display data with respect to pixels which are disposed in a matrix, and the display device driving circuit includes a control section for controlling the output of the display scanning signals from the scanning signal line driving section to the respective scanning signal lines based on a transition instruction signal for making a transition of output of the display scanning signals to the respective scanning signal lines from successive output to simultaneous output so that the display scanning signals are simultaneously outputted to the plurality of scanning signal lines.
    Type: Application
    Filed: March 22, 2001
    Publication date: October 25, 2001
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Takashige Ohta, Yoshihiko Katsuda, Kouji Kumada
  • Publication number: 20010022573
    Abstract: A liquid crystal display apparatus and a data driver of the present invention is provided with a sampling pulse generating circuit. The sampling pulse generating circuit is provided with a shift register for shift operation having a plurality of set-reset type flip-flops, and analog switches whose opening and closing of each analog switch is controlled in response to each output of the respective flip-flops so that a clock signal is outputted during the opening as a sampling pulse. Sampling of the image signal is carried out in accordance with the sampling pulses. The pulse width of the sampling pulse varies depending on the duty ratio of the clock signal, thereby ensuring to avoid that active periods of the adjoining sampling pulses overlap with each other.
    Type: Application
    Filed: February 13, 2001
    Publication date: September 20, 2001
    Inventors: Osamu Sasaki, Kouji Kumada, Yutaka Takafuji
  • Patent number: 6020938
    Abstract: A matrix-type display device is a liquid crystal device having 240 vertical lines on a display screen, and is provided with a driving circuit which writes a signal simultaneously into two vertical lines in one in every three scanning lines of an EDTV2 signal, in which a number of scanning lines is 180 per field, when an image based on the EDTV2 signal is displayed on the display screen. As a result, a circuit having a complicated configuration is not required, and an image based on the EDTV2 signal can be displayed on the whole display screen of a liquid crystal module having 240 vertical lines without a non-image portion.
    Type: Grant
    Filed: March 6, 1997
    Date of Patent: February 1, 2000
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Moritaka Nakamura, Kouji Kumada, Yukihiro Nakahara
  • Patent number: 5929925
    Abstract: A matrix type display device capable of receiving more than one video signal, which displays an image based on a first video signal with a smaller aspect ratio than an aspect ratio of a screen in width by inputting a second video signal in sync with a first video signal to at least a part of column drivers corresponding to a remaining portion on the screen where the image based on the first video signal is not displayed, so that the processing of the first and second video signals is started at the same time and carried out at the same timing. Consequently, the present matrix type display device can readily display a natural image based on an input video signal with a smaller aspect ratio than the that of the screen.
    Type: Grant
    Filed: January 6, 1997
    Date of Patent: July 27, 1999
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Moritaka Nakamura, Kouji Kumada, Yukihiro Nakahara
  • Patent number: 5469220
    Abstract: A vertical sync signal circuit for producing a stable sync signal is disclosed. A first frequency divider and a first window circuit generate a sync output pulse PC having the same period as the vertical sync signal contained in the TV signal and a first window signal W1. A reference signal generator generates a reference signal VR in synchronism with the vertical sync signal VS being input. A second frequency divider and a second window circuit generate a second window signal W2 wider than the first window signal W1. A third frequency divider discriminates the period of the reference signal VR on the basis of the first window signal W1 and the second window signal W2, and selects the sync output pulse PC1 or the reference signal VR. The sync signal CVD having the same period as the sync output pulse PC or the reference signal VR, as the case may be, is produced through an output switching circuit.
    Type: Grant
    Filed: September 15, 1994
    Date of Patent: November 21, 1995
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Kouji Kumada