Patents by Inventor Kouros Ghandehari

Kouros Ghandehari has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6313542
    Abstract: The present invention is directed to a method and apparatus for detecting edges through one or more opaque, planarized layers of material. Exemplary embodiments can take full advantage of decreased size geometries associated, such as 0.25 micron technologies, without suffering inaccuracies due to wafer misalignment during processing (e.g., during a photolithographic process). The invention is applicable to any process where an edge is to be detected through a planarized layer which is opaque to visible light. In an exemplary embodiment, an edge of an alignment mark can be detected using an energy source having a wavelength and angle of incidence specifically selected with respect to the optical characteristics and thickness of particular material layers being processed.
    Type: Grant
    Filed: September 25, 1998
    Date of Patent: November 6, 2001
    Assignee: VLSI Technology, Inc.
    Inventors: Dipankar Pramanik, Kouros Ghandehari, Satyendra S. Sethi, Daniel C. Baker
  • Publication number: 20010026360
    Abstract: In one example embodiment, a method of forming a pattern in a photoresist material includes illuminating a portion of the photoresist material according to the pattern and positioning a filter in a path of the light. The filter includes a number of regions upon which a filtering material has been. The filtering material has a variable characteristic that is independently adjustable for each region to enhance the uniformity of the intensity of the light. Such characteristics include the thickness of the filtering material, the size of the portion of the region that is covered by the filtering material, or a voltage, current, electric field, or magnetic field applied to the filtering material of each region.
    Type: Application
    Filed: June 5, 2001
    Publication date: October 4, 2001
    Applicant: Philips Semiconductors, Inc.
    Inventors: Daniel C. Baker, Kouros Ghandehari, Satyendra S. Sethi
  • Patent number: 6262795
    Abstract: An apparatus for forming a pattern in a photoresist material includes a light source to provide light for illuminating a portion of the photoresist material according to the pattern and a filter positioned in a path of the light. The filter includes a number of regions upon which a filtering material has been. The filtering material has a variable characteristic that is independently adjustable for each region to enhance the uniformity of the intensity of the light. Such characteristics include the thickness of the filtering material, the size of the portion of the region that is covered by the filtering material, or a voltage, current, electric field, or magnetic field applied to the filtering material of each region.
    Type: Grant
    Filed: August 28, 1998
    Date of Patent: July 17, 2001
    Assignee: Philip Semiconductors, Inc.
    Inventors: Daniel C. Baker, Kouros Ghandehari, Satyendra S. Sethi
  • Patent number: 6057587
    Abstract: A semiconductor devices includes an anti-reflective structure for use in patterning metal layers in semiconductor devices. The anti-reflective structure is made, at least in part, using indium tin oxide. The anti-reflective structure is especially useful for patterning the metal layers with light having a wavelength of 190-300 nm. The anti-reflective structure may be a single indium tin oxide layer or may include a titanium nitride layer formed over the metal layer and an indium tin oxide layer formed over the titanium nitride layer. For many applications, the anti-reflective structure, in the presence of a photoresist layer, has a reflectivity of about 3% or less for light having a wavelength of 190-300 nm.
    Type: Grant
    Filed: August 28, 1997
    Date of Patent: May 2, 2000
    Assignee: VLSI Technology, Inc.
    Inventors: Kouros Ghandehari, Samit Sengupta
  • Patent number: 5952135
    Abstract: A method and apparatus for the alignment of a semiconductor device in preparation for patterning a layer of the device includes using an alignment apparatus which has one or more light sources for producing light at two or more alignment wavelengths. Typically, the semiconductor device will include alignment structures that are to be aligned with corresponding alignment markers on a photomask which contains the desired pattern. The alignment structures on the semiconductor device are often depressions or trenches in a layer of the device. The alignment apparatus determines the position of the alignment structures by observing the contrast in the intensity of light reflected off the region of the device containing the alignment structure and the region of the device adjacent to the alignment structure. This contrast in the intensity of light is wavelength dependent.
    Type: Grant
    Filed: November 19, 1997
    Date of Patent: September 14, 1999
    Assignee: VLSI Technology
    Inventors: Kouros Ghandehari, Satyendra S. Sethi, Daniel C. Baker
  • Patent number: 5852497
    Abstract: The present invention is directed to a method and apparatus for detecting edges through one or more opaque, planarized layers of material. Exemplary embodiments can take full advantage of decreased size geometries associated, such as 0.25 micron technologies, without suffering inaccuracies due to wafer misalignment during processing (e.g., during a photolithographic process). The invention is applicable to any process where an edge is to be detected through a planarized layer which is opaque to visible light. In an exemplary embodiment, an edge of an alignment mark can be detected using an energy source having a wavelength and angle of incidence specifically selected with respect to the optical characteristics and thickness of particular material layers being processed.
    Type: Grant
    Filed: August 28, 1997
    Date of Patent: December 22, 1998
    Assignee: VLSI Technology, Inc.
    Inventors: Dipankar Pramanik, Kouros Ghandehari, Satyendra S. Sethi, Daniel C. Baker