Patents by Inventor Kousuke Hara

Kousuke Hara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060105540
    Abstract: A method for manufacturing a semiconductor element comprised of an SOI structure including an SOI layer comprises the steps of preparing the SOI layer having a transistor forming area and an element isolation area on a surface thereof, forming an oxidation-resistant mask layer on the surface of the SOI layer, forming a resist mask in an area corresponding to the trnasistor forming area on the oxidation-resistant mask layer, a first etching step for etching the oxidation-resistant mask layer using the resist mask in such a manner that the oxidation-resistant mask layer remains by a predetermined thickness, a second etching step for etching the oxidation-resistant mask layer allowed to remain by the predetermined thickness in accordance with the first etching step, using the resist mask and exposing the SOI layer of a portion corresponding to the element isolation area, and oxidizing the exposed SOI layer by a LOCOS method using the oxidation-resistant mask layer allowed to remain in accordance with the second
    Type: Application
    Filed: September 30, 2005
    Publication date: May 18, 2006
    Inventors: Toyokazu Sakata, Kousuke Hara
  • Publication number: 20060073614
    Abstract: The present invention provides a ferroelectric capacitor structure comprising a ferroelectric capacitor which is constituted in such a manner that a lower electrode is formed, a ferroelectric film is formed on the lower electrode and an upper electrode is formed on the ferroelectric film, and which is formed in a predetermined pattern; a hydrogen diffusion barrier film formed on the ferroelectric capacitor; an interlayer insulating film formed on the hydrogen diffusion barrier film; and a contact hole for connecting the upper electrode and an upper metal wiring layer. In the ferroelectric capacitor structure, etching of the interlayer insulating film is performed using a gas containing a fluorine element, and etching of the hydrogen diffusion barrier film is carried out using a mixed gas of at least a gas containing a reductive group and a halogen gas, or a halogen gas having a reductive group as a constituent substance.
    Type: Application
    Filed: April 11, 2005
    Publication date: April 6, 2006
    Inventor: Kousuke Hara
  • Patent number: 6989742
    Abstract: An abnormality detection device includes small motion sensors that detect small motions of a person in a house; a data collecting unit that collects and stores sensor signals from the small motion sensors as sensor patterns, and a Markov chain operating unit 33 that transforms the sensor patterns into a cluster sequence by vector-quantizing input patterns which are obtained by averaging and normalizing the sensor patterns, and calculates a transition number matrix and a duration time distribution of a Markov and so on using a Markov chain model. The abnormality detection device also includes a comparing unit that calculates a characteristic amount (Euclid distance and average log likelihood in an appearance frequency of a Markov chain and an average log likelihood to the duration time distribution of a Markov chain) of a sample activity as against a daily activity based on the obtained transition number matrix and the duration time distribution and so on.
    Type: Grant
    Filed: December 23, 2002
    Date of Patent: January 24, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Reiko Ueno, Noriko Kaneda, Takashi Omori, Kousuke Hara, Hiroshi Yamamoto, Shigeyuki Inoue, Shinji Tanaka
  • Publication number: 20050186161
    Abstract: An antifungal and/or antimycotic external preparation for nail, which comprises neticonazole or a salt thereof and a basic substance.
    Type: Application
    Filed: February 20, 2004
    Publication date: August 25, 2005
    Inventors: Ichiro Kawase, Yasuo Ikeda, Kousuke Hara, Takashi Narui, Tetsuo Kaneko
  • Patent number: 6869752
    Abstract: The present invention aims to provide a method of manufacturing a semiconductor device having an SOI structure, which is capable of setting an etching process so as to cause contact etching to widely have a process margin even in a semiconductor elemental device using an extra-thin SOI layer. The present method is a method of manufacturing a fully depleted-SOI device. A cobalt layer is formed on an SOI layer. Cobalt is transformed into a cobalt silicide layer by heat treatment. An interlayer insulating film is formed on the cobalt silicide layer, and a contact hole is defined in the interlayer insulating film by dry etching. As an etching gas used in such a dry etching step, a CHF3/CO gas is used. An etching condition is set through the use of a dry etching rate held substantially constant by use of the etching gas. Described specifically, etching time is suitable set.
    Type: Grant
    Filed: November 6, 2002
    Date of Patent: March 22, 2005
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Akira Takahashi, Kousuke Hara, Motoki Kobayashi, Jun Kanamori
  • Publication number: 20030186173
    Abstract: The present invention aims to provide a method of manufacturing a semiconductor device having an SOI structure, which is capable of setting an etching process so as to cause contact etching to widely have a process margin even in a semiconductor elemental device using an extra-thin SOI layer. The present method is a method of manufacturing a fully depleted-SOI device. A cobalt layer is formed on an SOI layer. Cobalt is transformed into a cobalt silicide layer by heat treatment. An interlayer insulating film is formed on the cobalt silicide layer, and a contact hole is defined in the interlayer insulating film by dry etching. As an etching gas used in such a dry etching step, a CHF3/CO gas is used. An etching condition is set through the use of a dry etching rate held substantially constant by use of the etching gas. Described specifically, etching time is suitable set.
    Type: Application
    Filed: November 6, 2002
    Publication date: October 2, 2003
    Inventors: Akira Takahashi, Kousuke Hara, Motoki Kobayashi, Jun Kanamori
  • Publication number: 20030117279
    Abstract: An abnormality detection device 30 includes small motion sensors 25a˜25c that detect small motions of a person in a house, a data collecting unit 32 that collects and stores sensor signals from the small motion sensors 25a˜25c as sensor patterns, a Markov chain operating unit 33 that transforms the sensor patterns into a cluster sequence by vector-quantizing input patterns which are obtained by averaging and normalizing the sensor patterns and calculates a transition number matrix and a duration time distribution of a Markov chain and so on using a Markov chain model, a comparing unit 34 that calculates characteristic amount (Euclid distance and average log likelihood in appearance frequency of a Markov chain and average log likelihood to the duration time distribution of a Markov chain) of a sample activity as against a daily activity based on the obtained transition number matrix and the duration time distribution and so on, and others.
    Type: Application
    Filed: December 23, 2002
    Publication date: June 26, 2003
    Inventors: Reiko Ueno, Noriko Kaneda, Takashi Omori, Kousuke Hara, Hiroshi Yamamoto, Shigeyuki Inoue, Shinji Tanaka