Patents by Inventor Kouta Noda

Kouta Noda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040025333
    Abstract: An opening is formed in resin 20 by a laser beam so that a via hole is formed. At this time, copper foil 22, the thickness of which is reduced (to 3 &mgr;m) by performing etching to lower the thermal conductivity is used as a conformal mask. Therefore, an opening 20a can be formed in the resin 20 if the number of irradiation of pulse-shape laser beam is reduced. Therefore, occurrence of undercut of the resin 20 which forms an interlayer insulating resin layer can be prevented. Thus, the reliability of the connection of the via holes can be improved.
    Type: Application
    Filed: February 3, 2003
    Publication date: February 12, 2004
    Applicant: IBIDEN Co., Ltd.
    Inventors: Naohiro Hirose, Kouta Noda, Hiroshi Segawa, Honjin En, Kiyotaka Tsukada, Naoto Ishida, Kouji Asano, Atsushi Shouda
  • Patent number: 6591495
    Abstract: An opening is formed in resin by a laser beam so that a via hole is formed. Copper foil, the thickness of which is reduced to 3 &mgr;m by etching to lower the thermal conductivity, is used as a conformal mask. Therefore, an opening is formed in the resin and the number of irradiation of pulse-shape laser beam is reduced. Thus, occurence of undercut of the resin, which forms an interlayer insulating resin layer, can be prevented and the reliability of the connection of the via holes can be improved.
    Type: Grant
    Filed: March 5, 2001
    Date of Patent: July 15, 2003
    Assignee: IBIDEN Co., Ltd.
    Inventors: Naohiro Hirose, Kouta Noda, Hiroshi Segawa, Honjin En, Kiyotaka Tsukada, Naoto Ishida, Kouji Asano, Atsushi Shouda
  • Patent number: 6512186
    Abstract: A multilayer printed wiring board has such a structure that conductor circuit patterns are formed on a core substrate through interlaminar resin insulating layers and through-holes are formed in the core substrate and a filler is filled in the through-hole. The interlaminar resin insulating layer formed on the substrate is flat and the same kind of roughened layer is formed on the conductor circuit pattern on the substrate over a full surface including a side surface thereof. A cover plated layer is formed just above the through-hole, and the roughened layers are formed on the conductor layer and the conductor circuit pattern located at the same level as the conductor layer over a full surface including side surfaces thereof, and the interlaminar resin insulating layer is formed so as to cover the surfaces of these roughened layers and filled in recess portions between the conductors and flattened on its surface.
    Type: Grant
    Filed: December 22, 2000
    Date of Patent: January 28, 2003
    Assignee: Ibiden Co., Ltd.
    Inventors: Yoko Nishiwaki, Kouta Noda
  • Patent number: 6376049
    Abstract: A multilayer printed wiring board is composed of a substrate provided with through-holes, and a wiring board formed on the substrate through the interposition of an interlaminar insulating resin layer, the through-holes having a roughened internal surface and being filled with a filler, an exposed part of the filler in the through-holes being covered with a through-hole-covering conductor layer, and a viahole formed just thereabove being connected to the through-hole-covering conductor layer. Without peeling between the through-holes and the filler, this wiring board has a satisfactory connection reliability between the through-holes and the internal layer circuit and provides a high density wiring.
    Type: Grant
    Filed: July 23, 1999
    Date of Patent: April 23, 2002
    Assignee: Ibiden Co., Ltd.
    Inventors: Motoo Asai, Kenichi Shimada, Kouta Noda, Takashi Kariya, Hiroshi Segawa
  • Patent number: 6376052
    Abstract: A multilayer printed wiring board is composed of a substrate provided with through-holes, and a wiring board formed on the substrate through the interposition of an interlaminar insulating resin layer, the through-holes having a roughened internal surface and being filled with a filler, an exposed part of the filler in the through-holes being covered with a through-hole-covering conductor layer, and a viahole formed just thereabove being connected to the through-hole-covering conductor layer. Without peeling between the through-holes and the filler, this wiring board has a satisfactory connection reliability between the through-holes and the internal layer circuit and provides a high density wiring.
    Type: Grant
    Filed: April 21, 2000
    Date of Patent: April 23, 2002
    Assignee: Ibiden Co., Ltd.
    Inventors: Motoo Asai, Ken-ichi Shimada, Kouta Noda, Takashi Kariya, Hiroshi Segawa
  • Publication number: 20010042637
    Abstract: An opening is formed in resin 20 by a laser beam so that a via hole is formed. At this time, copper foil 22, the thickness of which is reduced (to 3 &mgr;m) by performing etching to lower the thermal conductivity is used as a conformal mask. Therefore, an opening 20a can be formed in the resin 20 if the number of irradiation of pulse-shape laser beam is reduced. Therefore, occurrence of undercut of the resin 20 which forms an interlayer insulating resin layer can be prevented. Thus, the reliability of the connection of the via holes can be improved.
    Type: Application
    Filed: March 5, 2001
    Publication date: November 22, 2001
    Inventors: Naohiro Hirose, Kouta Noda, Hiroshi Segawa, Honjin En, Kiyotaka Tsukada, Naoto Ishida, Kouji Asano, Atsushi Shouda
  • Patent number: 6261671
    Abstract: The adhesive for electroless plating which is advantageous to ensure insulation reliabilities between lines and between layers while maintaining a practical peel strength, and the printed circuit board using the adhesive are disclosed. The adhesive is formed by dispersing cured heat-resistant resin particles soluble in acid or oxidizing agent into uncured heat-resistant resin matrix hardly soluble in acid or oxidizing agent through curing treatment, in which the heat-resistant resin particles have an average particle size of not more than 1.5 &mgr;m.
    Type: Grant
    Filed: October 12, 1999
    Date of Patent: July 17, 2001
    Assignee: Ibiden Co., Ltd.
    Inventors: Motoo Asai, Yoshitaka Ono, Masato Kawade, Kouta Noda, Youko Nishiwaki
  • Patent number: 6248428
    Abstract: Adhesive adhesive for electroless plating ensures insulation reliabilities between lines and between layers while maintaining a practical peel strength, and a printed circuit board using the adhesive are disclosed. The adhesive is formed by dispersing cured heat-resistant resin particles soluble in acid or oxidizing agent into uncured heat-resistant resin matrix hardly soluble in acid or oxidizing agent through curing treatment, in which the heat-resistant resin particles have an average particle size of not more than 2 &mgr;m, and comprised of rough particles and fine particles.
    Type: Grant
    Filed: October 12, 1999
    Date of Patent: June 19, 2001
    Assignee: Ibiden Co., Ltd.
    Inventors: Motoo Asai, Yoshitaka Ono, Masato Kawade, Kouta Noda, Youko Nishiwaki
  • Patent number: 5841190
    Abstract: A semiconductor package (11) includes a high density multi-layered printed wiring board (12), a plurality of LSI chips (14,15) and a substrate supporter (13). A substrate (16) is made of a material having higher heat conductivity than that of resins. A build-up layer (17) having interlayer insulations (I1-I4) and conductive layers (C1-C5) is formed on a first side (S1) of the substrate (16). A die area (19) for mounting the LSI chips (14,15) is provided on the build-up layer (17). A plurality of I/O pads (21) are provided around the die area. The I/O pads (21) are connected to bonding pads (28) on the supporter (13) via bonding wires. The supporter (13) includes a printed wiring board (23) consisting essentially of a resin material. The wiring board (12) is fitted in a window (24) formed in the printed wiring board (23) while a second side (S2) of the substrate, which is opposite to the first side, is exposed from the window.
    Type: Grant
    Filed: February 23, 1996
    Date of Patent: November 24, 1998
    Assignee: Ibiden Co., Ltd.
    Inventors: Kouta Noda, Tooru Inoue, Benzhen Yuan