Abstract: A conjugated polymer layer with a built-in diode is formed by providing a first metal-chalcogenide layer over a bottom electrode. Subsequently, a second metal-chalcogenide layer is provided over and in contact with the first metal-chalcogenide layer. The first metal-chalcogenide layer has a first conductivity type and the second metal-chalcogenide layer has a second conductivity type. The plane of contact between the first and second metal-chalcogenide layers creates the p-n junction of the built-in diode. Then a polymer layer is selectively deposited on the second metal-chalcogenide layer. The second metal-chalcogenide layer provides ions to the polymer layer to change its resistivity. A top electrode is then provided over the polymer layer. An exemplary memory cell may have the following stacked structure: first electrode/n-type semiconductor/p-type semiconductor/conjugated polymer/second electrode.

Abstract: A chalcogenide-based programmable conductor memory device and method of forming the device, wherein a nanoparticle is provided between an electrode and a chalcogenide glass region. The method of forming the nanoparticle utilizes a template over the electrode or random deposition of the nanoparticle.

Abstract: A phase change memory element and method of forming the same. The memory element includes first and second electrodes. A first layer of phase change material is between the first and second electrodes. A second layer including a metal-chalcogenide material is also between the first and second electrodes and is one of a phase change material and a conductive material. An insulating layer is between the first and second layers. There is at least one opening in the insulating layer providing contact between the first and second layers.

Abstract: A variable resistance memory device that includes a first electrode, a second electrode, and a first chalcogenide material layer between the first and second electrodes, the chalcogenide layer including carbon incorporated into germanium selenide chalcogenide glass. The variable resistance memory device may include a second chalcogenide material layer between the first chalcogenide material layer and the second electrode. The variable resistance memory device may include a first metallic layer between the second chalcogenide material layer and the second electrode. The variable resistance memory device may include a third chalcogenide material layer between the first metallic layer and the second electrode. The variable resistance memory device may include a fourth chalcogenide material layer between the first chalcogenide material layer and the first electrode. The first chalcogenide layer may be formed by co-sputtering carbon with Ge40Se60.

Abstract: A chalcogenide-based programmable conductor memory device and method of forming the device, wherein a nanoparticle is provided between an electrode and a chalcogenide glass region. The method of forming the nanoparticle utilizes a template over the electrode or random deposition of the nanoparticle.

Abstract: A phase change memory element and method of forming the same. The memory element includes first and second electrodes. A first layer of phase change material is between the first and second electrodes. A second layer including a metal-chalcogenide material is also between the first and second electrodes and is one of a phase change material and a conductive material. An insulating layer is between the first and second layers. There is at least one opening in the insulating layer providing contact between the first and second layers.

Abstract: A method of forming a memory device, such as a PCRAM, including selecting a chalcogenide glass backbone material for a resistance variable memory function and devices formed using such a method.

Abstract: Microelectronic devices and methods for manufacturing microelectronic devices are disclosed herein. In one embodiment, a method includes constructing a radiation sensitive component in and/or on a microelectronic device, placing a curable component in and/or on the microelectronic device, and forming a barrier in and/or on the microelectronic device to at least partially inhibit irradiation of the radiation sensitive component. The radiation sensitive component can be doped silicon, chalcogenide, polymeric random access memory, or any other component that is altered when irradiated with one or more specific frequencies of radiation. The curable component can be an adhesive, an underfill layer, an encapsulant, a stand-off, or any other feature constructed of a material that requires curing by irradiation.

Abstract: A chalcogenide-based programmable conductor memory device and method of forming the device, wherein a nanoparticle is provided between an electrode and a chalcogenide glass region. The method of forming the nanoparticle utilizes a template over the electrode or random deposition of the nanoparticle.

Abstract: A phase change memory element and method of forming the same. The memory element includes first and second electrodes. A first layer of phase change material is between the first and second electrodes. A second layer including a metal-chalcogenide material is also between the first and second electrodes and is one of a phase change material and a conductive material. An insulating layer is between the first and second layers. There is at least one opening in the insulating layer providing contact between the first and second layers.

Abstract: An access transistor for a resistance variable memory element and methods of forming the same are provided. The access transistor has first and second source/drain regions and a channel region vertically stacked over the substrate. The access transistor is associated with at least one resistance variable memory element.

Abstract: Microelectronic devices and methods for manufacturing microelectronic devices are disclosed herein. In one embodiment, a method includes constructing a radiation sensitive component in and/or on a microelectronic device, placing a curable component in and/or on the microelectronic device, and forming a barrier in and/or on the microelectronic device to at least partially inhibit irradiation of the radiation sensitive component. The radiation sensitive component can be doped silicon, chalcogenide, polymeric random access memory, or any other component that is altered when irradiated with one or more specific frequencies of radiation. The curable component can be an adhesive, an underfill layer, an encapsulant, a stand-off, or any other feature constructed of a material that requires curing by irradiation.

Abstract: A phase change memory element and method of forming the same. The memory element includes first and second electrodes. A first layer of phase change material is between the first and second electrodes. A second layer including a metal-chalcogenide material is also between the first and second electrodes and is one of a phase change material and a conductive material. An insulating layer is between the first and second layers. There is at least one opening in the insulating layer providing contact between the first and second layers.

Abstract: Non-volatile memory devices with two stacked layers of chalcogenide materials comprising the active memory device have been investigated for their potential as phase-change memories. The devices tested included GeTe/SnTe, Ge2Se3/SnTe, and Ge2Se3/SnSe stacks. All devices exhibited resistance switching behavior. The polarity of the applied voltage with respect to the SnTe or SnSe layer was critical to the memory switching properties, due to the electric field induced movement of either Sn or Te into the Ge-chalcogenide layer. One embodiment of the invention is a device comprising a stack of chalcogenide-containing layers which exhibit phase-change switching only after a reverse polarity voltage potential is applied across the stack causing ion movement into an adjacent layer and thus “activating” the device to act as a phase-change random access memory device or a reconfigurable electronics device when the applied voltage potential is returned to the normal polarity.

Abstract: Microelectronic devices and methods for manufacturing microelectronic devices are disclosed herein. In one embodiment, a method includes constructing a radiation sensitive component in and/or on a microelectronic device, placing a curable component in and/or on the microelectronic device, and forming a barrier in and/or on the microelectronic device to at least partially inhibit irradiation of the radiation sensitive component. The radiation sensitive component can be doped silicon, chalcogenide, polymeric random access memory, or any other component that is altered when irradiated with one or more specific frequencies of radiation. The curable component can be an adhesive, an underfill layer, an encapsulant, a stand-off, or any other feature constructed of a material that requires curing by irradiation.

Abstract: A phase change memory element and method of forming the same. The memory element includes first and second electrodes. A first layer of phase change material is between the first and second electrodes. A second layer including a metal-chalcogenide material is also between the first and second electrodes and is one of a phase change material and a conductive material. An insulating layer is between the first and second layers. There is at least one opening in the insulating layer providing contact between the first and second layers.

Abstract: A memory device comprising a first electrode, a second electrode, metal-chalcogenide material between the first and second electrodes and chalcogenide glass between the first and second electrodes. The chalcogenide glass comprises a material with the chemical formula AxB100-x, wherein A is a non-chalcogenide component and B is a chalcogenide component, and A has a bonding affinity for B relative to homopolar bonds of A. The memory device further comprises a conducting channel in the chalcogenide glass comprising bonds formed between A and a component of the metal chalcogenide material.

Abstract: The invention is related to methods and apparatus for providing a resistance variable memory element with improved data retention and switching characteristics. According to an embodiment of the invention a resistance variable memory element is provided having at least one silver-selenide layer in between glass layers, wherein at least one of the glass layers is a chalcogenide glass, preferably having a GexSe100-x composition.

Abstract: A continuously variable resistor is disclosed. The continuously variable resistor may comprise a first chalcogenide layer and a second chalcogenide layer. The second chalcogenide layers may be connected to the first chalcogenide layer and may have a metal interspersed within it. The second chalcogenide layer may be metal-rich, in a state of solid solution with the interspersed metal. The continuously variable resistor may be configured to exhibit NDR behavior. The continuously variable resistor may be configured to have three or more substantially non-volatile resistance states.

Abstract: A phase change memory element and method of forming the same. The memory element includes first and second electrodes. A first layer of phase change material is between the first and second electrodes. A second layer including a metal-chalcogenide material is also between the first and second electrodes and is one of a phase change material and a conductive material. An insulating layer is between the first and second layers. There is at least one opening in the insulating layer providing contact between the first and second layers.