Abstract: Provided herein may be a resistive memory device and a method of operating the resistive memory device. The resistive memory device may include strings coupled between one or more source lines and one or more bit lines, each string including a set of one or more resistive memory cells, one or more word lines respectively coupled to the set of one or more resistive memory cells; and a voltage generator configured to control a level of a turn-on voltage to be applied to one or more unselected word lines among the one or more word lines depending on a program target state of a subset of resistive memory cells including one or more resistive memory cells selected from among the set of one or more resistive memory cells.

Abstract: A semiconductor device includes: a stack structure including conductive patterns and insulating layers, which are alternately stacked; a channel structure penetrating the stack structure; and a memory layer penetrating the stack structure, the memory layer being disposed between the channel structure and the stack structure. The memory layer includes memory parts and dummy parts, which are alternately arranged. Each of the memory parts includes a first part between the insulating layers and a second part between the dummy parts. The first part of the memory parts have ferroelectricity.

Abstract: A three-dimensional (3D) semiconductor memory device includes a peripheral logic structure disposed on a first substrate, a horizontal semiconductor layer disposed on a second substrate, a plurality of stack structures on the horizontal semiconductor layer in a first direction, wherein the plurality of stack structures include a memory cell region and a capacitor region, a plurality of electrode isolation regions extending in the first direction and a second direction and configured to separate the plurality of stack structures to be connected to the horizontal semiconductor layer and a plurality of through-via structures having a first side connected to a through channel contact through at least one metal pad, wherein a capacitor is formed between each of electrode pads and at least one of electrode isolation regions in the plurality of stack structures or at least one of the plurality of through-via structures.

Abstract: Provided is a method and an apparatus for targeting an object in a game. The method of targeting an object in a game includes: setting a center point of a first targeting area based on a first input from a user; displaying the first targeting area surrounded by a closed curve around the center point on a screen of a user terminal; displaying a list including at least one object located in the first targeting area on the screen; and moving the first targeting area based on a second input by the user received after the first input.

Abstract: Proposed is a method of determining a location for swarm flight using UWB, the method including: computing a reference location from GPS information in a case where the location is measured; sending out a pulling signal, preset according to a two-way ranging format, according to slave ranging scheduling corresponding to each formation, and receiving a pushing signal from a neighboring flight vehicle and performing ranging; computing a relative location in the formation on a master-slave basis from a ranged pull-push relationship using TWR time information, and computing the relative location in the formation on a slave-slave basis using a received signal strength indicator and time of arrival; generating a fingerprint map in a manner that varies with each formation, using all the computed relative locations in the formation on the master-slave basis; and computing the location of the swarm flight vehicle using the generated fingerprint map.

Abstract: The present disclosure proposes an adaptive non-speculative DFE with an extended time constraint for a PAM-4 receiver and a method for operating the same. An adaptive non-speculative DFE with an extended time constraint for a PAM-4 receiver according to the present disclosure comprises a Continuous-Time Linear Equalizer (CTLE) to boost high-frequency components of an input signal, a Track and Hold (T&H) circuit to track and hold an output of the CTLE, and a sampler, wherein the sampler includes a Decision Feedback Equalization (DFE) sampler to equalize an output of the T&H circuit and sample an output of the T&H circuit in a DFE sampling clock phase; and a DATA sampler to sample a signal equalized by the DFE sampler in a DATA sampling clock phase, wherein the DFE sampling clock phase differs from the DATA sampling clock phase.

Abstract: A display device includes a first electrode and a second electrode spaced apart from and parallel to each other and disposed on a substrate, each of the first electrode and the second electrode extends in a direction, a first insulating layer disposed on the first electrode and the second electrode, a light-emitting element disposed on the first insulating layer and having opposing ends respectively disposed on the first electrode and the second electrode, a first connection electrode electrically contacting an end of the light-emitting element, a second connection electrode electrically contacting an opposite end of the light-emitting element, and insulating patterns respectively disposed on and contacting the first connection electrode and the second connection electrode, the insulating patterns are spaced apart from the light-emitting element and the first insulating layer.

Abstract: A semiconductor device includes a stacked structure with insulating layers and conductive layers that are alternately stacked on each other, a hard mask pattern located on the stacked structure, a channel structure penetrating the hard mask pattern and the stacked structure, insulating patterns interposed between the insulating layers and the channel structure, and a memory layer interposed between the stacked structure and the channel structure, wherein the memory layer fills a space between the insulating patterns, wherein a sidewall of each of the conductive layers protrudes farther towards the channel structure than a sidewall of the hard mask pattern, and wherein the insulating patterns protrude farther towards the channel structure than the sidewall of each of the conductive layers.

Abstract: A filter assembly includes a filter holder into which a part of the filter is insertable, and a lock mounted to the filter holder and configured to lock and release the filter to and from the filter holder. The lock includes a guide coupled to the filter holder and configured to be linearly movable to transmit a force in a direction into which the filter is inserted, a pusher configured to transmit a force in a direction opposite to the direction, into which the filter is inserted, by an elastic member, a stopper rotatably received in the pusher to be arranged between the pusher and the guide, and configured to linearly move the filter holder by being linearly moved by the guide and the pusher, and a cam configured to lock and release the filter to and from the filter holder by guiding rotation and linear movement of the stopper.

Abstract: A manufacturing method of a display device and a display device are provided. A manufacturing method of a display device includes: preparing a substrate including a light emitting area and a non-light emitting area; arranging a first electrode, a second electrode, a first uncut electrode, and a second uncut electrode on the substrate; forming a bank in the non-light emitting area of the substrate; arranging a light emitting element in the light emitting area of the substrate; removing at least a portion of each of the first uncut electrode and the second uncut electrode; arranging a first contact electrode electrically connecting the light emitting element and the first electrode; and arranging a second contact electrode electrically connecting the light emitting element and the second electrode, and the at least the portion of each of the first uncut electrode and the second uncut electrode is removed within an open area.

Abstract: A display device includes a first electrode, a second electrode, and a third electrode extending in one direction on a substrate and being spaced from one another, a first light-emitting element between the first electrode and the second electrode, and a second light-emitting element between the second electrode and the third electrode, a first connection electrode on the first electrode and in contact with a first end of the first light-emitting element, a second connection electrode on one side of the second electrode and in contact with a first end of the second light-emitting element, a third connection electrode on an opposite side of the second electrode and in contact with a second end of the first light-emitting element, and a fourth connection electrode on the third electrode and in contact with a second end of the second light-emitting element.

Abstract: A method of manufacturing a semiconductor device includes forming a stacked structure with first material layers and second material layers that are alternately stacked with each other, forming a first opening that passes through the stacked structure, forming second openings between the first material layers, forming first sacrificial layers in the second openings, forming first isolation layers that protrude into the first opening by oxidizing the first sacrificial layers, forming mold patterns on the first material layers between the protruding portions of the first isolation layers, forming third openings by etching portions of the first isolation layers that are exposed between the mold patterns, forming second sacrificial layers in the third openings, and forming second isolation layers that protrude farther toward the center of the first opening than the mold patterns by oxidizing the second sacrificial layers.

Abstract: A semiconductor device includes a stacked structure including insulating layers and conductive layers alternately stacked on each other, a hard mask pattern located on the stacked structure, a channel structure passing through the hard mask pattern and the stacked structure, insulating patterns interposed between the insulating layers and the channel structure and each including a first surface and a second surface, wherein the first surface faces each of the insulating layers and is flat and the second surface faces the channel structure and includes a curved surface, and a memory layer interposed between the stacked structure and the channel structure and filling a space between the insulating patterns, wherein a sidewall of each of the conductive layers is located on an extending line of a sidewall of the hard mask pattern and the insulating patterns protrude farther towards the channel structure than the sidewall of the hard mask pattern.

Abstract: A semiconductor device includes a stacked structure with insulating layers and conductive layers that are alternately stacked on each other, a hard mask pattern located on the stacked structure, a channel structure penetrating the hard mask pattern and the stacked structure, insulating patterns interposed between the insulating layers and the channel structure, and a memory layer interposed between the stacked structure and the channel structure, wherein the memory layer fills a space between the insulating patterns, wherein a sidewall of each of the conductive layers protrudes farther towards the channel structure than a sidewall of the hard mask pattern, and wherein the insulating patterns protrude farther towards the channel structure than the sidewall of each of the conductive layers.

Abstract: A semiconductor device includes: a gate structure including conductive layers and insulating layers, which are alternately stacked; a channel layer penetrating the gate structure; memory patterns respectively located between the channel layer and the conductive layers; air gaps located between the memory patterns; and a sealing layer including first parts respectively including the air gaps and a second part extending between the memory patterns.

Abstract: A display device includes a first electrode and a second electrode spaced apart from each other and disposed on a substrate; a first sub-bank disposed on the first electrode and exposing an end of the first electrode facing the second electrode; a second sub-bank disposed on the second electrode and exposing an end of the second electrode facing the first electrode; a step pattern disposed on the second electrode and overlapping at least the end of the second electrode; and a light-emitting element disposed between the first sub-bank and the second sub-bank.

Abstract: A semiconductor device includes: a gate structure including conductive layers and insulating layers, which are alternately stacked; a channel layer penetrating the gate structure; memory patterns respectively located between the channel layer and the conductive layers; a blocking layer including first parts located between the memory patterns and the conductive layers, and second parts extending between the memory patterns and protruding toward the insulating layers to the inside of the gate structure; and air gaps including a first region located in the second parts and a second region located between the memory patterns.

Abstract: A semiconductor device includes: a gate structure including conductive layers and insulating layers, which are alternately stacked; a channel layer penetrating the gate structure; memory patterns respectively located between the channel layer and the conductive layers; a blocking layer including first parts located between the conductive layers and the memory patterns and second parts extending between the memory patterns; and air gaps respectively located between the blocking layer and the insulating layers.

Abstract: Provided is a refrigerator laving a shelf that ay be moved along at least two paths to improve accessibility to the shelf. The refrigerator includes a main body; and a storage chamber provided inside the main body to accommodate a shelf unit, wherein the shelf unit includes a first shelf arranged in a front portion of the storage chamber and moveable along a first direction relative to the storage chamber; a second shelf arranged behind the first shelf and moveable along the first direction relative to the storage chamber; and a guide unit arranged to guide the first shelf to be moved along a second direction relative to the storage chamber different from the first direction while the first shelf and the second shelf have been moved along the first direction.

Abstract: According to various example embodiments, a data management method of an electronic device includes obtaining selection information on or regarding a first product, obtaining selection information on a second product corresponding to the first product based on the selection information on the first product, identifying purchase information about the first product and the second product, transmitting the purchase information about the first product to a first server related to delivery of the first product and transmitting the purchase information about the second product to a second server, and transmitting activation-related information of the second product to the second server in response to delivery status information of the first product, wherein the first product includes a physical product requiring delivery, and the second product includes an insurance product for the first product.