Patents by Inventor Ku-Youl Jung

Ku-Youl Jung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10153423
    Abstract: An electronic device may include a semiconductor memory, and the semiconductor memory may include a free layer having a variable magnetization direction; a pinned layer having a pinned magnetization direction; a tunnel barrier layer interposed between the free layer and the pinned layer; and an under layer which is in contact with the free layer and includes a rare earth metal nitride.
    Type: Grant
    Filed: December 15, 2017
    Date of Patent: December 11, 2018
    Assignees: SK Hynix Inc., Toshiba Memory Corporation
    Inventors: Yang-Kon Kim, Guk-Cheon Kim, Jae-Hyoung Lee, Jong-Koo Lim, Ku-Youl Jung, Toshihiko Nagase, Youngmin Eeh
  • Publication number: 20180323368
    Abstract: An electronic device may include a semiconductor memory, and the semiconductor memory may include an MTJ (Magnetic Tunnel Junction) structure including a free layer having a variable magnetization direction, a pinned layer having a fixed magnetization direction, and a tunnel barrier layer interposed between the free layer and the pinned layer; an under layer disposed under the MTJ structure; and a perpendicular magnetic anisotropy increasing layer disposed below the under layer and including a material having a different crystal structure from the under layer.
    Type: Application
    Filed: March 2, 2018
    Publication date: November 8, 2018
    Inventors: Yang-Kon Kim, Ku-Youl Jung, Jong-Koo Lim, Jae-Hyoung Lee
  • Publication number: 20180284199
    Abstract: An electronic device may include a semiconductor memory, and the semiconductor memory may include a free layer having a variable magnetization direction; a pinned layer having a pinned magnetization direction; and a tunnel barrier layer between the free layer and the pinned layer, wherein the free layer may include a first magnetic layer; a second magnetic layer having a smaller perpendicular magnetic anisotropy energy density than the first magnetic layer; and a spacer interposed between the first magnetic layer and the second magnetic layer.
    Type: Application
    Filed: December 14, 2017
    Publication date: October 4, 2018
    Inventors: Ku-Youl JUNG, Guk-Cheon KIM, Toshihiko NAGASE, Daisuke WATANABE, Won-Joon CHOI, Youngmin EEH, Kazuya SAWADA
  • Publication number: 20180277745
    Abstract: According to one embodiment, a magnetic memory device includes a magnetoresistive element, the magnetoresistive element including a first magnetic layer having a variable magnetization direction, a second magnetic layer having a fixed magnetization direction and a nonmagnetic layer provided between the first magnetic layer and the second magnetic layer. The first magnetic layer includes first and second sub-magnetic layers each containing at least iron (Fe) and boron (B), and a concentration of boron (B) contained in the first sub-magnetic layer is different from a concentration of boron (B) contained in the second sub-magnetic layer.
    Type: Application
    Filed: September 12, 2017
    Publication date: September 27, 2018
    Applicants: TOSHIBA MEMORY CORPORATION, SK HYNIX INC.
    Inventors: Tadaaki OIKAWA, Toshihiko NAGASE, Youngmin EEH, Daisuke WATANABE, Kazuya SAWADA, Kenichi YOSHINO, Hiroyuki OHTORI, Yang Kon KIM, Ku Youl JUNG, Jong Koo LIM, Jae Hyoung LEE, Soo Man SEO, Sung Woong CHUNG, Tae Young LEE
  • Patent number: 10062424
    Abstract: This technology provides an electronic device. An electronic device in accordance with an implementation of this document may include a semiconductor memory, and the semiconductor memory may include: an under layer including a plurality of material layers having a different crystal structures; a first magnetic layer formed over the under layer and having a variable magnetization direction; a tunnel barrier layer formed over the first magnetic layer; and a second magnetic layer formed over the tunnel barrier layer and having a pinned magnetization direction.
    Type: Grant
    Filed: July 17, 2017
    Date of Patent: August 28, 2018
    Assignee: SK hynix Inc.
    Inventors: Yang-Kon Kim, Guk-Cheon Kim, Jeong-Myeong Kim, Jong-Koo Lim, Ku-Youl Jung, Won-Joon Choi
  • Publication number: 20180240973
    Abstract: A method for fabricating an electronic device including a semiconductor memory may include forming a buffer layer over a substrate, the buffer layer operable to aide in crystal growth of an under layer; forming the under layer over the buffer layer, the under layer operable to aide in crystal growth of a free layer; and forming a Magnetic Tunnel Junction (MTJ) structure including the free layer having a variable magnetization direction, a pinned layer having a pinned magnetization direction, and a tunnel barrier layer interposed between the free layer and the pinned layer over the under layer.
    Type: Application
    Filed: February 2, 2018
    Publication date: August 23, 2018
    Inventors: Ku-Youl Jung, Guk-Cheon Kim, Jong-Koo Lim, Yang-Kon Kim, Jae-Hyoung Lee
  • Publication number: 20180233187
    Abstract: An electronic device may include a semiconductor memory, and the semiconductor memory may include a free layer including a CoFeBAl alloy and having a variable magnetization direction; a pinned layer having a pinned magnetization direction; and a tunnel barrier layer interposed between the free layer and the pinned layer, wherein the CoFeBAl alloy may have an Al content less than 10 at %.
    Type: Application
    Filed: January 22, 2018
    Publication date: August 16, 2018
    Inventors: Jong-Koo Lim, Yang-Kon Kim, Ku-Youl Jung, Guk-Cheon Kim, Jeong-Myeong Kim
  • Patent number: 10042559
    Abstract: This technology provides an electronic device. An electronic device in accordance with an implementation of this document may include a semiconductor memory for storing data, and the semiconductor memory may include a free layer having a variable magnetization direction; a pinned layer having a pinned magnetization direction; a tunnel barrier layer interposed between the free layer and the pinned layer; and an interface enhancement layer interposed between the tunnel barrier layer and the pinned layer, wherein the interface enhancement layer may include an Fe-rich first layer; a Co-rich second layer formed over the first layer; and a metal layer formed over the second layer.
    Type: Grant
    Filed: January 30, 2017
    Date of Patent: August 7, 2018
    Assignee: SK hynix Inc.
    Inventors: Yang-Kon Kim, Guk-Cheon Kim, Ku-Youl Jung, Jong-Koo Lim, Won-Joon Choi
  • Publication number: 20180211994
    Abstract: An electronic device including a semiconductor memory is provided. The semiconductor memory may include an MTJ (Magnetic Tunnel Junction) structure including a free layer having a variable magnetization direction, a pinned layer having a fixed magnetization direction, and a tunnel barrier layer interposed between the free layer and the pinned layer; and an under layer formed under the MTJ structure, wherein the under layer may include metals and oxides of the metals.
    Type: Application
    Filed: November 2, 2017
    Publication date: July 26, 2018
    Inventors: Guk-Cheon Kim, Ku-Youl Jung, Yang-Kon Kim, Jae-Hyoung Lee, Jong-Koo Lim
  • Publication number: 20180198060
    Abstract: An electronic device may include a semiconductor memory, and the semiconductor memory may include a free layer having a variable magnetization direction; a pinned layer having a pinned magnetization direction; a tunnel barrier layer interposed between the free layer and the pinned layer; and an under layer which is in contact with the free layer and includes a rare earth metal nitride.
    Type: Application
    Filed: December 15, 2017
    Publication date: July 12, 2018
    Inventors: Yang-Kon KIM, Guk-Cheon KIM, Jae-Hyoung LEE, Jong-Koo LIM, Ku-Youl JUNG, Toshihiko NAGASE, Youngmin EEH
  • Patent number: 10002903
    Abstract: Implementations of the disclosed technology provide an electronic device including a semiconductor memory, wherein the semiconductor memory includes: a magnetic tunnel junction (MTJ) structure including a free layer having a changeable magnetization direction, a pinned layer having a pinned magnetization direction, and a tunnel barrier layer sandwiched between the free layer and the pinned layer; and an under layer located under the MTJ structure, wherein the under layer includes a first under layer including a silicon-based alloy, and a second under layer located on the first under layer and including a metal.
    Type: Grant
    Filed: March 18, 2016
    Date of Patent: June 19, 2018
    Assignee: SK hynix Inc.
    Inventors: Jong-Koo Lim, Guk-Cheon Kim, Yang-Kon Kim, Ku-Youl Jung, Won-Joon Choi
  • Patent number: 9841915
    Abstract: This technology provides an electronic device. An electronic device in accordance with an implementation of this document may include a semiconductor memory for storing data, and the semiconductor memory may include a magnetic tunnel junction (MTJ) structure comprising a free layer having a variable magnetization direction, a pinned layer having a pinned magnetization direction, and a tunnel barrier layer interposed between the free layer and the pinned layer; and an under layer located under the MTJ structure, wherein the under layer may include: a first under layer including a silicon-based alloy; a second under layer including a metal; and a blocking layer interposed between the first under layer and the second under layer and including an amorphous material.
    Type: Grant
    Filed: April 21, 2017
    Date of Patent: December 12, 2017
    Assignee: SK hynix Inc.
    Inventors: Jong-Koo Lim, Guk-Cheon Kim, Yang-Kon Kim, Seung-Mo Noh, Ku-Youl Jung, Won-Joon Choi
  • Publication number: 20170329518
    Abstract: This technology provides an electronic device. An electronic device in accordance with an implementation of this document may include a semiconductor memory for storing data, and the semiconductor memory may include a free layer having a variable magnetization direction; a pinned layer having a pinned magnetization direction; a tunnel barrier layer interposed between the free layer and the pinned layer; and an interface enhancement layer interposed between the tunnel barrier layer and the pinned layer, wherein the interface enhancement layer may include an Fe-rich first layer; a Co-rich second layer formed over the first layer; and a metal layer formed over the second layer.
    Type: Application
    Filed: January 30, 2017
    Publication date: November 16, 2017
    Inventors: Yang-Kon Kim, Guk-Cheon Kim, Ku-Youl Jung, Jong-Koo Lim, Won-Joon Choi
  • Publication number: 20170316814
    Abstract: This technology provides an electronic device. An electronic device in accordance with an implementation of this document may include a semiconductor memory, and the semiconductor memory may include: an under layer including a plurality of material layers having a different crystal structures; a first magnetic layer formed over the under layer and having a variable magnetization direction; a tunnel barrier layer formed over the first magnetic layer; and a second magnetic layer formed over the tunnel barrier layer and having a pinned magnetization direction.
    Type: Application
    Filed: July 17, 2017
    Publication date: November 2, 2017
    Inventors: Yang-Kon Kim, Guk-Cheon Kim, Jeong-Myeong Kim, Jong-Koo Lim, Ku-Youl Jung, Won-Joon Choi
  • Publication number: 20170222133
    Abstract: Provided are electronic device including a variable resistance element and a method for fabricating an electronic device including a variable resistance element. The electronic device including a variable resistance element includes a free layer formed over a substrate and having a changeable magnetization direction, a pinned layer having a pinned magnetization direction, a tunnel barrier layer interposed between the free layer and the pinned layer, and a magnetic correction layer suitable for reducing the influence of a stray field generated by the pinned layer. The method may include cooling the substrate, before forming the magnetic correction layer such that the magnetic correction layer is formed over the cooled substrate.
    Type: Application
    Filed: June 20, 2016
    Publication date: August 3, 2017
    Inventors: Jong-Koo LIM, Won-Joon CHOI, Guk-Cheon KIM, Yang-Kon KIM, Ku-Youl JUNG, Toshihiko NAGASE, Youngmin EEH, Daisuke WATANABE, Kazuya SAWADA, Makoto NAGAMINE
  • Patent number: 9711202
    Abstract: This technology provides an electronic device. An electronic device in accordance with an implementation of this document may include a semiconductor memory, and the semiconductor memory may include: an under layer including a plurality of material layers having a different crystal structures; a first magnetic layer formed over the under layer and having a variable magnetization direction; a tunnel barrier layer formed over the first magnetic layer; and a second magnetic layer formed over the tunnel barrier layer and having a pinned magnetization direction.
    Type: Grant
    Filed: March 17, 2016
    Date of Patent: July 18, 2017
    Assignee: SK hynix Inc.
    Inventors: Yang-Kon Kim, Guk-Cheon Kim, Jeong-Myeong Kim, Jong-Koo Lim, Ku-Youl Jung, Won-Joon Choi
  • Publication number: 20170154662
    Abstract: This technology provides an electronic device. An electronic device in accordance with an implementation of this document may include a semiconductor memory, and the semiconductor memory may include: an under layer including a plurality of material layers having a different crystal structures; a first magnetic layer formed over the under layer and having a variable magnetization direction; a tunnel barrier layer formed over the first magnetic layer; and a second magnetic layer formed over the tunnel barrier layer and having a pinned magnetization direction.
    Type: Application
    Filed: March 17, 2016
    Publication date: June 1, 2017
    Inventors: Yang-Kon Kim, Guk-Cheon Kim, Jeong-Myeong Kim, Jong-Koo Lim, Ku-Youl Jung, Won-Joon Choi
  • Publication number: 20170117457
    Abstract: An electronic device and a method for fabricating the same are provided. An electronic device according to an implementation of the disclosed technology is an electronic device including a semiconductor memory, wherein the semiconductor memory includes a magnetic tunnel junction (MTJ) structure including: a free layer having a changeable magnetization direction; a pinned layer having a pinned magnetization direction; and a tunnel barrier layer sandwiched between the free layer and the pinned layer, wherein the free layer includes a CoFeAlB alloy.
    Type: Application
    Filed: May 25, 2016
    Publication date: April 27, 2017
    Inventors: Seung-Mo Noh, Yang-Kon Kim, Ku-Youl Jung, Bo-Mi Lee
  • Publication number: 20170084667
    Abstract: Implementations of the disclosed technology provide an electronic device including a semiconductor memory, wherein the semiconductor memory includes: a magnetic tunnel junction (MTJ) structure including a free layer having a changeable magnetization direction, a pinned layer having a pinned magnetization direction, and a tunnel barrier layer sandwiched between the free layer and the pinned layer; and an under layer located under the MTJ structure, wherein the under layer includes a first under layer including a silicon-based alloy, and a second under layer located on the first under layer and including a metal.
    Type: Application
    Filed: March 18, 2016
    Publication date: March 23, 2017
    Inventors: Jong-Koo Lim, Guk-Cheon Kim, Yang-Kon Kim, Ku-Youl Jung, Won-Joon Choi
  • Patent number: 9532636
    Abstract: Provided is a cosmetic container having an airtight refill case that hermetically keeps a cosmetic such as a moisture-containing compact powder, a moisture-containing cream, and an eye shadow. More particularly, it relates to a cosmetic container having an airtight refill case 20 that is more hermetically sealed in a double airtight structure by coupling a lower main body 21 and an upper lid 25 of the refill case 20 with a butterfly hinge and by fitting an assembly groove part 22 having ring-shaped assembly protrusions 23 to an assembly protrusion part having ring-shaped assembly grooves 27 without a specific packing, in which the upper lid of the refill case is pressed by pressing protrusions 30 on the upper lid, when an outer container lid is closed.
    Type: Grant
    Filed: March 25, 2014
    Date of Patent: January 3, 2017
    Inventor: Ku Youl Jung