Abstract: A method for producing a resistive random access memory includes preparing a first metal layer and sputtering a resistive switching layer on the first metal layer. Surface treatment is conducted on the resistive switching layer by using a plasma containing mobile ions to dope the mobile ions into the resistive switching layer. The polarity of the mobile ions is opposite to the polarity of oxygen ions. Then, a second metal layer is sputtered on the resistive switching layer.

Abstract: A resistive memory cell is disclosed. The resistive memory cell comprises a pair of electrodes and a resistance-switching network disposed between the pair of electrodes. The resistance-switching network comprises a group-IV element doping layer and a porous low-k layer. The group-IV doping layer comprises silicon oxide doped with a group-IV element. The porous low-k layer comprises porous silicon oxide or porous hafnium oxide. The group-IV element may comprise zirconium, titanium, or hafnium. The porous low-k layer may be prepared by inductively coupled plasma (ICP) treatment. A method of fabricating a resistive memory is disclosed. The method comprises forming a resistance-switching network on a first electrode using sputtering and forming a second electrode on the resistance-switching network using sputtering. The resistance-switching network comprises a group-IV element doping layer and a porous low-k layer.

Abstract: A resistive random access memory includes two electrode layers and a resistive switching layer mounted between the two electrode layers. The resistive switching layer consists essentially of insulating material with oxygen, metal material, and mobile ions. The polarity of the mobile ions is opposite to the polarity of oxygen ions. A method for producing a resistive random access memory includes preparing a first metal layer and sputtering a resistive switching layer on the first metal layer. Surface treatment is conducted on the resistive switching layer by using a plasma containing mobile ions to dope the mobile ions into the resistive switching layer. The polarity of the mobile ions is opposite to the polarity of oxygen ions. Then, a second metal layer is sputtered on the resistive switching layer.

Abstract: A resistive random access memory including a first electrode, a separating medium, a resistance changing layer and a second electrode is disclosed. The first electrode has a mounting face. The separating medium is arranged on the first electrode and forms a through hole. A part of the first electrode is not covered by the separating medium. The separating medium has a first dielectric. The resistance changing layer extends along the part of the first electrode as well as along an inner face and the second face of the separating medium. The resistance changing layer has a second dielectric having a dielectric constant larger than a dielectric constant of the first dielectric by 2 or less. The second electrode is arranged on the resistance changing layer. In this arrangement, the problem of unstable forming voltage of the conventional resistive random access memory can be solved.

Abstract: A resistive random access memory includes two electrode layers and a resistive switching layer mounted between the two electrode layers. The resistive switching layer consists essentially of insulating material with oxygen, metal material, and mobile ions. The polarity of the mobile ions is opposite to the polarity of oxygen ions. A method for producing a resistive random access memory includes preparing a first metal layer and sputtering a resistive switching layer on the first metal layer. Surface treatment is conducted on the resistive switching layer by using a plasma containing mobile ions to dope the mobile ions into the resistive switching layer. The polarity of the mobile ions is opposite to the polarity of oxygen ions. Then, a second metal layer is sputtered on the resistive switching layer.

Abstract: A resistive random access memory including two electrode layers and a multi-resistance layer mounted between the two electrode layers. The multi-resistance layer consists essentially of insulating material with oxygen and lithium ions. The number of resistance states of a memory element can be increased by the resistive random access memory to increase the integration density of a memory module having a plurality of memory elements.

Abstract: A resistive random access memory includes an oxygen-poor layer disposed on a first electrode layer and formed by indium tin oxide, indium oxide, tin dioxide, or zinc oxide. An insulating layer is disposed on the oxygen-poor layer and is formed by silicon dioxide or hafnium oxide. A second electrode layer is disposed on the insulating layer. A method for producing a resistive random access memory includes preparing a first electrode layer. An oxygen-poor layer is then formed on the first electrode layer. The oxygen-poor layer is formed by indium tin oxide, indium oxide, tin dioxide, or zinc oxide. Next, an insulating layer is formed on the oxygen-poor layer. The insulating layer formed by silicon dioxide or hafnium oxide. A second electrode layer is then formed on the insulating layer.

Abstract: A resistive memory cell is disclosed. The resistive memory cell comprises a pair of electrodes and a multi-layer resistance-switching network disposed between the pair of electrodes. The multi-layer resistance-switching network comprises a pair of carbon doping layers and a group-IV element doping layer disposed between the pair of carbon doping layers. Each carbon doping layer comprises silicon oxide doped with carbon. The group-IV doping layer comprises silicon oxide doped with a group-IV element. A method of fabricating a resistive memory cell is also disclosed. The method comprises forming a first carbon doping layer on a first electrode using sputtering, forming a group-IV element doping layer on the first carbon doping layer using sputtering, forming a second carbon doping layer on the group-IV element doping layer using sputtering, and forming a second electrode on the second carbon doping layer using sputtering.

Abstract: A resistive memory cell is disclosed. The resistive memory cell comprises a pair of electrodes and a resistance-switching network disposed between the pair of electrodes. The resistance-switching network comprises a group-IV element doping layer and a porous low-k layer. The group-IV doping layer comprises silicon oxide doped with a group-IV element. The porous low-k layer comprises porous silicon oxide or porous hafnium oxide. The group-IV element may comprise zirconium, titanium, or hafnium. The porous low-k layer may be prepared by inductively coupled plasma (ICP) treatment. A method of fabricating a resistive memory is disclosed. The method comprises forming a resistance-switching network on a first electrode using sputtering and forming a second electrode on the resistance-switching network using sputtering. The resistance-switching network comprises a group-IV element doping layer and a porous low-k layer.

Abstract: A resistive memory cell is disclosed. The resistive memory cell comprises a pair of electrodes and a multi-layer resistance-switching network disposed between the pair of electrodes. The multi-layer resistance-switching network comprises a pair of carbon doping layers and a group-IV element doping layer disposed between the pair of carbon doping layers. Each carbon doping layer comprises silicon oxide doped with carbon. The group-IV doping layer comprises silicon oxide doped with a group-IV element. A method of fabricating a resistive memory cell is also disclosed. The method comprises forming a first carbon doping layer on a first electrode using sputtering, forming a group-IV element doping layer on the first carbon doping layer using sputtering, forming a second carbon doping layer on the group-IV element doping layer using sputtering, and forming a second electrode on the second carbon doping layer using sputtering.

Abstract: A resistive random access memory (RRAM), a controlling method for the RRAM, and a manufacturing method therefor are provided. The RRAM includes a first electrode layer; a resistance switching layer disposed on the first electrode layer; a diffusion metal layer disposed on the resistance switching layer; and a second electrode layer disposed on the diffusion metal layer, wherein at least one extension electrode is disposed in the resistance switching layer.

Abstract: A resistive random access memory (RRAM), a controlling method for the RRAM, and a manufacturing method therefor are provided. The RRAM includes a first electrode layer; a resistance switching layer disposed on the first electrode layer; a diffusion metal layer disposed on the resistance switching layer; and a second electrode layer disposed on the diffusion metal layer, wherein at least one extension electrode is disposed in the resistance switching layer.