Abstract: In recovery operations performed after non-volatile memory devices (i.e., flash memories and so on) experience abnormal status, when unstable data pages are found, valid data pages are copied to another physical block from the original physical block directly and the original physical block is not utilized any more, in order to prevent from spreading error. Further, in order to accelerate the determination process, only partial data of a page is read and whether the page is a valid page is determined based on statistic, when finding out which page is a valid page.

Abstract: For single-level cell flash memories and multi-level cell flash memories, different operations can be performed according to their stability when an abnormal status is terminated. Specifically, for the multi-level cell flash memories, when the abnormal status is terminated, a now physical block is used to proceed with write operation, and the previous physical block(s) would not be written any more. On the contrary, for the single-level cell flash memories, when the abnormal status is terminated, the controller needs to perform corresponding operations on the last physical page of the previous physical block(s).

Abstract: In recovery operations performed after non-volatile memory devices (i.e., flash memories and so on) experience abnormal status, when unstable data pages are found, valid data pages are copied to another physical block from the original physical block directly and the original physical block is not utilized any more, in order to prevent from spreading error. Further, in order to accelerate the determination process, only partial data of a page is read and whether the page is a valid page is determined based on statistic, when finding out which page is a valid page.

Abstract: A non-volatile memory device is provided. The non-volatile memory device includes a non-volatile memory, a connection interface, and a controller. The non-volatile memory is divided into a plurality of physical blocks. Each physical block is divided into a plurality of physical pages. The connection interface is connected to a host. The controller is connected to the connection interface. When the controller performs a block-reconfiguration operation, the controller re-adjusts a position in the physical blocks where data is disposed to obtain a usable physical block. Movement of one portion of the data related to the block-reconfiguration operation is performed when the controller operations an initial operation. Movement of another portion of the data related to the block-reconfiguration operation is performed when the controller processes a read command from the host.

Abstract: A data storage device and a FLASH memory control method with a cache space. The FLASH memory control method includes the following steps: using a plurality of channels to access a FLASH memory, wherein the FLASH memory has a plurality of blocks each with a plurality of pages, and the blocks are grouped to be accessed by the different channels; allocating a random access memory to provide a cache space, the cache space having a plurality of cache areas caching write data for the different channels, respectively; distributing the data issued from a host to correspond to the different channels; and reusing a latest-updated cache area of the cache space to cache write data when a logical address requested to be written with data is identical to a logical address that the latest-updated cache area corresponds to.

Abstract: A data storage device with a FLASH memory accessed via multiple channels and a FLASH memory control method. The control method includes the following steps: dividing a plurality of blocks of the FLASH memory into groups to be accessed via different channels; allocating at least one set of cache spaces in a random access memory for temporary write data storage for the different channels; separating write data issued from a host to correspond to the plurality of channels; and, when data arrangement for every channel has been completed in one set of cache spaces, writing the data that has been arranged in the set of cache spaces to the FLASH memory via the plurality of channels corresponding to the different cache spaces of the set of cache spaces.

Abstract: A data storage device and a FLASH memory control method with a cache space. The FLASH memory control method includes the following steps: using a plurality of channels to access a FLASH memory, wherein the FLASH memory has a plurality of blocks each with a plurality of pages, and the blocks are grouped to be accessed by the different channels; allocating a random access memory to provide a cache space, the cache space having a plurality of cache areas caching write data for the different channels, respectively; distributing the data issued from a host to correspond to the different channels; and reusing a latest-updated cache area of the cache space to cache write data when a logical address requested to be written with data is identical to a logical address that the latest-updated cache area corresponds to.