Patents by Inventor Kuang-Hua Lin

Kuang-Hua Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7060595
    Abstract: A circuit substrate includes a board, a plurality of metal layers and an insulator. The board has a plurality of conductive traces layers and a via formed therein. The metal layers are formed on the inner wall of the via and each of the metal layers is electrically connected to its corresponding conductive traces layer. The via is filled with the insulator so that each of the metal layers is electrically isolated from each other. In addition, this invention also provides a fabrication method of the circuit substrate.
    Type: Grant
    Filed: July 28, 2003
    Date of Patent: June 13, 2006
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: In-De Ou, Chih-Pin Hung, Chia-Shang Chen, Kuang-Hua Lin, Shin-Hua Chao
  • Publication number: 20050130431
    Abstract: A method for making a package substrate without etching metal layer on side walls of a die-cavity is disclosed. At least a through slot is formed around a defined die-cavity region of a substrate so as to form a die-cavity portion in the die-cavity region. The through slot has side walls without cutting off the die-cavity portion. A metal layer is formed on the side walls inside the through slot. A dry film is attached on the substrate and the die-cavity portion so as to seal the side walls of the through slot. The metal layer on the side walls is reserved during etching. A die-cavity with metalized side walls is formed after removing the die-cavity portion.
    Type: Application
    Filed: December 12, 2003
    Publication date: June 16, 2005
    Inventors: Chia-Shang Chen, Kuang-Hua Lin, Chi-Jau Tzeng, Jian-Ming Jiang
  • Publication number: 20040080052
    Abstract: A circuit substrate includes a board, a plurality of metal layers and an insulator. The board has a plurality of conductive traces layers and a via formed therein. The metal layers are formed on the inner wall of the via and each of the metal layers is electrically connected to its corresponding conductive traces layer. The via is filled with the insulator so that each of the metal layers is electrically isolated from each other. In addition, this invention also provides a fabrication method of the circuit substrate.
    Type: Application
    Filed: July 28, 2003
    Publication date: April 29, 2004
    Applicants: Advanced Semiconductor Engineering, Inc., ASE Material Inc.
    Inventors: In-De Ou, Chih-Pin Hung, Chia-Shang Chen, Kuang-Hua Lin, Shin-Hua Chao
  • Publication number: 20040050705
    Abstract: A microfluidic device has a plurality of H-shaped micro channels not connected to each other and formed on a substrate. Each of the H-shaped micro channels comprises two main channels separately placed on two opposite sides in parallel and a plurality of sub-channels perpendicularly connected to the two main channels. The present invention is designed in such a way that various reagents dropped into different H-shaped micro channels are immobilized on respective sub-channels because of the different widths of the main channel and sub-channel. Afterwards the reagents are coated with a layer of polymer. The polymer has a porous structure that allows the passage of any sample to be tested. Finally, a plurality of upper channels parallel to one another are directly fabricated in the polymer, or in another layer of polymer stacked on the previous polymer.
    Type: Application
    Filed: September 11, 2003
    Publication date: March 18, 2004
    Inventors: Fan-Gang Tseng, Kuang-Hua Lin, Hui-Ting Hsu