Abstract: The present invention relates to a packaging mold with electrostatic discharge protection comprising a pot block and at least one receiver. The pot block comprises a plurality of pots and runners. Each of the pots branches and connects the runners for injecting molding compound into the runners through the pots. The receiver for supporting a plurality of substrate plates connects the runners for receiving the molding compound from the runners to package the dice on the substrate plates. Each receiver comprises a receiving surface contacting the substrate plate; wherein the receiving surface is roughened to reduce static electric charges generated when separating the substrate plates and the packaging mold. Additionally, the surfaces of the runners are roughened to reduce static electric charges generated in the runners when separating the molding compound and the runners. It prevents the dice packaged from damage due to static electric charges to raise the yield rate of semiconductor package products thereby.

Abstract: A stacked structure of a semiconductor package mainly comprises a first chip, a second chip, a substrate and a lead frame. The first chip and the second chip are attached on the surface of the substrate by a plurality of solder bumps by means of flipchip bonding. Then, the first chip, the second chip and the substrate form a stacked structure. A plurality of plugs of the substrate is provided along an edge of the substrate so as to attach to a plurality of receptacles of the lead frame to form a semiconductor device. The plugs are attached to the receptacles of the lead frame by silver paste to form a semiconductor device in such a way that the first chip and the second chip electrically connect to the lead frame. In addition, the lead frame is bent to form a plurality of fingers, which is placed in a space that is formed by a sidewall of the chip and a surface of the substrate while it is assembled.

Abstract: A stacked chip assembly generally includes a first chip, a second chip and a lead frame. The lower surface of the first chip is pasted onto the lower surface of the second chip by an adhesive film so as to form a stacked chip body. The stacked chip body is disposed on the lead frame. Bonding pads of the upper surface of the first chip are interconnected to the upper surface of the inner leads of the lead frame by bonding wires. Bonding pads of the upper surface of the second chip are interconnected to the lower surface of the inner leads of the lead frame by bonding wires. Therefore, the first chip and the second chip are simultaneously interconnected to an external circuit devices through the lead frame.

Abstract: A semiconductor package has a die and a plurality of leads electrically connected to the die with bonding wires. A heat spreader has an upper face thermally contacted with the die. The heat spreader is formed by a copper core having at least a portion of surface sequentially coated with a metal medium layer and an insulation layer, wherein the metal medium layer has an adhesion degree with insulation material higher than copper. A package body encapsulates the die, the heat spreader and the plurality of leads, wherein the surface area of the heat spreader that contacts with the package body is coated with the metal medium layer and the insulation layer.