Patents by Inventor Kuen Lee

Kuen Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11948744
    Abstract: A multilayer electronic component includes a body including a dielectric layer and internal electrodes disposed alternately with the dielectric layer therebetween and including first and second surfaces opposing each other in a first direction, third and fourth surfaces opposing each other in a second direction, and external electrodes disposed on the body. One end of each internal electrode is connected to the third or fourth surface. The external electrodes include a first electrode layer disposed on the third and fourth surfaces and including a conductive metal and a second electrode layer disposed on the first electrode layer, including silver (Ag) and glass, and further including one or more of palladium (Pd), platinum (Pt), and gold (Au), and the first electrode layer is disposed to cover all of one end of each internal electrode connected to the third and fourth surfaces and does not extend to the other surfaces.
    Type: Grant
    Filed: April 8, 2022
    Date of Patent: April 2, 2024
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Seo Won Jung, Won Kuen Oh, Gyu Ho Yeon, Seo Ho Lee
  • Publication number: 20230395223
    Abstract: The present disclosure generally relates to methods and user interfaces for tracking medications, managing logging actions (e.g., for tracked medications), and/or displaying summaries of tracked medications.
    Type: Application
    Filed: June 1, 2023
    Publication date: December 7, 2023
    Inventors: Christopher D. LAURITZEN, Andrea F. AYRES, Kunal BHUWALKA, Pablo F. CARO, Andrea FIEGER, Siu Kuen LEE, Christopher MAURY, Eric J. MERTZ, Leila MINOWADA, Santosh K. MURUGAN, Jessica PEASE
  • Patent number: 11112845
    Abstract: A probabilistic framework for compiler optimization with multithread power-gating controls includes scheduling all thread fragments of a multithread computer code with the estimated execution time, logging all time stamps of events, and sorting and unifying the logged time stamps. Time slices are constructed using adjacent time stamps of each thread fragment. A power-gating time having a component turned off for each time slice is determined. Power-gateable windows that reduce energy consumption of the time slice is determined according to the power-gating time. The compiler inserts predicated power-gating instructions at locations corresponding to the selected power-gateable windows into the power-gateable computer code.
    Type: Grant
    Filed: December 10, 2015
    Date of Patent: September 7, 2021
    Assignees: National Taiwan University, MFDIATEK INC.
    Inventors: Wen-Li Shih, Jenq-Kuen Lee, Cheng-Yen Lin, Ming-Yu Hung
  • Patent number: 11096612
    Abstract: The present application provides a Capillary number-based method of isolating circulating rare cells from a blood sample from a subject using filtration parameters determined based on the measurement of hemorheological parameters of the sample. The present application also provides a method for determining filtration parameters in a microfluidic elasto-filtration process for isolating circulating rare cells from a blood sample from a subject. The present application further provides a device for isolating circulating rare cells from a blood sample from a subject and a non-transitory computer storage medium for performing methods described in the present application.
    Type: Grant
    Filed: April 26, 2017
    Date of Patent: August 24, 2021
    Assignee: The Hong Kong University of Science and Technology
    Inventors: Yi-Kuen Lee, Cong Zhao, Kashif Riaz
  • Publication number: 20200398946
    Abstract: One or more embodiments disclosed herein relate generally to flotation devices, and more specifically to modular flotation devices with a mechanism to removably attach to other modular devices. In one embodiments, an apparatus includes a first flotation module and a first connector coupled to the first flotation module. The first connector has a first end portion, a second end portion and a sidewall extended from the first end portion to the second end portion. The sidewall defines a plurality of circumferentially defined stepped portions configured to matingly engage a second connector of a second flotation module to couple the first flotation module to the second flotation module. The first connector is selectively operative as one of a female connector or a male connector with respect to the second connector.
    Type: Application
    Filed: May 6, 2019
    Publication date: December 24, 2020
    Inventors: Mike Kirk ANDERSEN, Theresa M. BANNON, Matthew James CALLAHAN, Justin Chyun CHANG, Joshua Lee FINKLE, Nichole HOWELL, Vlasta Anastasia KOMOROUS-KING, Michelle Sau Kuen LEE-SCHMIDT, Chenyu LIU, Steven James MOORE, Carl R. ROMULUS, James Adam SKAATES, Andrew Richardson STEWART, David Jason WILKINS
  • Patent number: 10488911
    Abstract: A method of allocating registers, includes for each of a plurality of live ranges of variables, calculating an energy saving value of each of the plurality of live ranges of the variables; classifying the plurality of live ranges of the variables into a plurality of queues according to the energy saving values of the plurality of live ranges of the variables; and assigning the plurality of live ranges of the variables in the plurality of queues into a plurality of registers.
    Type: Grant
    Filed: November 1, 2016
    Date of Patent: November 26, 2019
    Assignees: National Taiwan University, MEDIATEK INC.
    Inventors: Yuan-Shin Hwang, Jenq-Kuen Lee, Shao-CHung Wang, Li-Chen Kan
  • Publication number: 20190142322
    Abstract: The present application provides a Capillary number-based method of isolating circulating rare cells from a blood sample from a subject using filtration parameters determined based on the measurement of hemorheological parameters of the sample. The present application also provides a method for determining filtration parameters in a microfluidic elasto-filtration process for isolating circulating rare cells from a blood sample from a subject. The present application further provides a device for isolating circulating rare cells from a blood sample from a subject and a non-transitory computer storage medium for performing methods described in the present application.
    Type: Application
    Filed: April 26, 2017
    Publication date: May 16, 2019
    Applicant: The Hong Kong University of Science and Technology
    Inventors: Yi-Kuen Lee, Cong Zhao, Kashif Riaz
  • Publication number: 20180120919
    Abstract: A method of allocating registers, includes for each of a plurality of live ranges of variables, calculating an energy saving value of each of the plurality of live ranges of the variables; classifying the plurality of live ranges of the variables into a plurality of queues according to the energy saving values of the plurality of live ranges of the variables; and assigning the plurality of live ranges of the variables in the plurality of queues into a plurality of registers.
    Type: Application
    Filed: November 1, 2016
    Publication date: May 3, 2018
    Inventors: Yuan-Shin Hwang, Jenq-Kuen Lee, Shao-Chung Wang, Li-Chen Kan
  • Publication number: 20170269931
    Abstract: The present invention provides an affine engine design to the microarchitecture of the graphic processing unit, in which an operand type detection is performed, and then physical scalar, affine, or vector registers and corresponding ALUs with maximum performance improving and energy saving are allocated to perform instruction execution. In runtime, affine and uniform instructions are executed by the affine engine, while general vector instructions are executed by a vector engine, thereby the affine/uniform instruction execution can be dispatched to the affine engine, so the vector engine can enter a power-saving state to save the energy consumption of the GPU.
    Type: Application
    Filed: March 16, 2016
    Publication date: September 21, 2017
    Inventors: Yuan-Shin Hwang, Jenq-Kuen Lee, Shao-Chung Wang, Li-Chen Kan
  • Publication number: 20160378444
    Abstract: A probabilistic framework for compiler optimization with multithread power-gating controls includes scheduling all thread fragments of a multithread computer code with the estimated execution time, logging all time stamps of events, and sorting and unifying the logged time stamps. Time slices are constructed using adjacent time stamps of each thread fragment. A power-gating time having a component turned off for each time slice is determined. Power-gateable windows that reduce energy consumption of the time slice is determined according to the power-gating time. The compiler inserts predicated power-gating instructions at locations corresponding to the selected power-gateable windows into the power-gateable computer code.
    Type: Application
    Filed: December 10, 2015
    Publication date: December 29, 2016
    Inventors: Wen-Li Shih, Jenq-Kuen Lee, Cheng-Yen Lin, Ming-Yu Hung
  • Publication number: 20160216771
    Abstract: A projecting device includes a wireless controller configured for wirelessly detecting a gesture and accordingly generating a wireless signal; and a projector configured for receiving the wireless signal and accordingly controlling a projection image projected by the projector.
    Type: Application
    Filed: April 23, 2015
    Publication date: July 28, 2016
    Inventors: TAI LIANG CHEN, CHUN CHIH WANG, CHI EN WU, JENQ KUEN LEE
  • Patent number: 9201636
    Abstract: A method comprises generating an intermediate representation of a pointer-based program; providing a control flow graph of the intermediate representation; selecting an analysis candidate from the intermediate representation as a traced variable and a root node; determining a definition site of the trace variable according to a use-define chain and the control flow graph; defining a node for each definition site variable; defining an edge by using each definition site variable and the traced variable; using each definition site variable of the definition site as a traced variable; repeating the steps of determining a definition site, defining a node, defining an edge and using each definition site to obtain a divergence relation graph; transforming the divergence relation graph into a directed acyclic graph; and determining whether the analysis candidate is divergent or not according to a divergent node and the directed acyclic graph.
    Type: Grant
    Filed: November 21, 2013
    Date of Patent: December 1, 2015
    Assignee: NATIONAL TSING HUA UNIVERSITY
    Inventors: Shao Chung Wang, Jenq Kuen Lee
  • Patent number: 9122494
    Abstract: A method for code size reduction, which comprises determining basic blocks in an IR module; grouping the basic blocks having duplicate code into groups; providing weighting values corresponding to different instructions of the module, wherein the weighting values are determined based on a plurality of intermediate representation program codes; determining a weighted size of the module, wherein the weighted size of the module is determined by summing weighted sizes of the basic blocks of the module, and the weighted size of each basic block is determined by summing products of numbers of different instructions of the basic blocks and the corresponding weighting values; removing duplicates in one group to obtain a module having one processed group; determining a weighted size of the module having one processed group; and comparing the weighted size of the module to the weighted size of the module having one processed group.
    Type: Grant
    Filed: May 15, 2013
    Date of Patent: September 1, 2015
    Assignee: NATIONAL TSING HUA UNIVERSITY
    Inventors: Kun Hua Yang, Shao Chung Wang, Jenq Kuen Lee
  • Publication number: 20150243259
    Abstract: A transpose unit of an apparatus comprises a plurality of banks each having a plurality of storage units, a write circuit, a plurality of selectors, and a parallel-to-serial circuit. The write circuit is configured to perform selections on the plurality of banks for storing data from a source memory. Each selector comprises an output and a plurality of inputs respectively coupled with the plurality of storage units of a corresponding bank, and the outputs of the plurality of selectors connect in parallel with the parallel-to-serial circuit. The parallel-to-serial circuit has a serial output connecting to a destination memory.
    Type: Application
    Filed: February 26, 2014
    Publication date: August 27, 2015
    Applicant: NATIONAL TSING HUA UNIVERSITY
    Inventors: CHIA CHEN HSU, SHIN KAI CHEN, CHENG YEN LIN, CHIH WEI LIU, JENQ KUEN LEE
  • Publication number: 20150143349
    Abstract: A method comprises generating an intermediate representation of a pointer-based program; providing a control flow graph of the intermediate representation; selecting an analysis candidate from the intermediate representation as a traced variable and a root node; determining a definition site of the trace variable according to a use-define chain and the control flow graph; defining a node for each definition site variable; defining an edge by using each definition site variable and the traced variable; using each definition site variable of the definition site as a traced variable; repeating the steps of determining a definition site, defining a node, defining an edge and using each definition site to obtain a divergence relation graph; transforming the divergence relation graph into a directed acyclic graph; and determining whether the analysis candidate is divergent or not according to a divergent node and the directed acyclic graph.
    Type: Application
    Filed: November 21, 2013
    Publication date: May 21, 2015
    Applicant: NATIONAL TSING HUA UNIVERSITY
    Inventors: SHAO CHUNG WANG, JENQ KUEN LEE
  • Publication number: 20150135186
    Abstract: A computer system is provided. The computer system includes multiple computing devices and a processing unit. The processing unit comprises a device monitoring module, a task classifying module and a task scheduling module. The processing unit is coupled to the computing devices. The device monitoring module is configured to monitor the computing devices so as to obtain loading data. The task classifying module is configured to classify related tasks of multiple tasks as a first group, to classify independent tasks of multiple tasks as a second group and to find a critical path of the related tasks in the first group. The task scheduling module is configured to set a first processing schedule of the first group according to the critical path and the loading data and to set a second processing schedule of the second group according to the first processing schedule.
    Type: Application
    Filed: March 7, 2014
    Publication date: May 14, 2015
    Applicant: INSTITUTE FOR INFORMATION INDUSTRY
    Inventors: Chun-Ting LIN, Cheng-Lin LEE, Yu-Te LIN, Jenq-Kuen LEE, Wei-Ming CHIANG
  • Publication number: 20150113027
    Abstract: A method for determining a logarithmic functional unit comprises providing a segment number; using the segment number to determine a piecewise linear approximation on a plurality of corresponding intervals for approximating a function for converting a fraction; providing a bit precision; converting endpoints separating the plurality of intervals to corresponding binary endpoints separating an additional plurality of intervals in the bit precision; determining an adjusted piecewise linear approximation that has an approximation error less than a threshold and is on the additional plurality of intervals; encoding coefficients of the adjusted piecewise linear approximation; determining a less precise approximation from the adjusted piecewise linear approximation as a candidate linear approximation, wherein the less precise approximation uses an argument value having a least bit-width while still being able to have an approximation error less than the threshold; and implementing the less precise approximation to
    Type: Application
    Filed: October 22, 2013
    Publication date: April 23, 2015
    Applicant: NATIONAL TSING HUA UNIVERSITY
    Inventors: SHIN KAI CHEN, TING YAO HSU, TSUNG CHING LIN, CHIH WEI LIU, JENQ KUEN LEE
  • Patent number: 8953559
    Abstract: The present invention relates to a method and apparatus for supporting location registration and mobility for each service flow in relation to a Mobile Node (MN) having a plurality of wired/wireless network interfaces in a wired/wireless integrated network environment. A method includes receiving a location registration message from a specific Handover Control Agent (HCA) connected to an MN, determining a movement of a flow, configured in another HCA to which the MN is connected, based on predetermined static flow binding information or a network status, sending a location registration Ack. message, comprising information on a HCA in which the flow is configured and to which a Corresponding Node (CN) is connected, to the specific HCA, and sending a location notification message, comprising information on the specific HCA to which the flow will be moved and to which the CN is connected, to the HCA.
    Type: Grant
    Filed: October 23, 2012
    Date of Patent: February 10, 2015
    Assignees: Electronics and Telecommunications Research Institute, Korea University of Technology and Education Industry-University Cooperation Foundation
    Inventors: Kyoung Hee Lee, Sung Kuen Lee, Youn Hee Han, Hyun Woo Lee, Won Ryu
  • Publication number: 20140344791
    Abstract: A method for code size reduction, which comprises determining basic blocks in an IR module; grouping the basic blocks having duplicate code into groups; providing weighting values corresponding to different instructions of the module, wherein the weighting values are determined based on a plurality of intermediate representation program codes; determining a weighted size of the module, wherein the weighted size of the module is determined by summing weighted sizes of the basic blocks of the module, and the weighted size of each basic block is determined by summing products of numbers of different instructions of the basic blocks and the corresponding weighting values; removing duplicates in one group to obtain a module having one processed group; determining a weighted size of the module having one processed group; and comparing the weighted size of the module to the weighted size of the module having one processed group.
    Type: Application
    Filed: May 15, 2013
    Publication date: November 20, 2014
    Applicant: NATIONAL TSING HUA UNIVERSITY
    Inventors: Kun Hua YANG, Shao Chung WANG, Jenq Kuen LEE
  • Patent number: D999838
    Type: Grant
    Filed: December 3, 2021
    Date of Patent: September 26, 2023
    Assignee: Melissa & Doug, LLC
    Inventors: Sofia Dumery, Robert Filipowich, Vlasta Komorous-King, Joshua Lee Finkle, Hortense Desodt, Jonathan Lung, Weishan Liao, Michelle Sau Kuen Lee-Schmidt, Windsor Williams, III, Talya Judith Brettler