Patents by Inventor Kui Han
Kui Han has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11961564Abstract: To program in a nonvolatile memory device including a cell region including first metal pads and a peripheral region including second metal pads and vertically connected to the cell region by the first metal pads and the second metal pads, a memory block is provided with a plurality of sub blocks disposed in a vertical direction where the memory block includes a plurality of cell strings each including a plurality of memory cells connected in series and disposed in the vertical direction. A plurality of intermediate switching transistors are disposed in a boundary portion between two adjacent sub blocks in the vertical direction. Each of the plurality of intermediate switching transistors is selectively activated based on a program address during a program operation. The selectively activating each of the plurality of intermediate switching transistors includes selectively turning on one or more intermediate switching transistors in a selected cell string based on the program address.Type: GrantFiled: October 18, 2021Date of Patent: April 16, 2024Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Chang-Yeon Yu, Kui-Han Ko, Il-Han Park, June-Hong Park, Joo-Yong Park, Joon-Young Park, Bong-Soon Lim
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Publication number: 20240095408Abstract: Embodiments of this application disclose a data protection method and system, a medium, and an electronic device, and belong to the field of communication technologies. In embodiments of this application, a first electronic device establishes a communication connection to a second electronic device. The first electronic device is a trusted device of the second electronic device. When detecting a first trigger condition, the first electronic device sends first data to the second electronic device. The first data is used to trigger the second electronic device to enter a maintenance mode. According to embodiments of this application, the first electronic device triggers the second electronic device to enter the maintenance mode, to protect data of the electronic devices.Type: ApplicationFiled: December 31, 2021Publication date: March 21, 2024Applicant: HUAWEI TECHNOLOGIES CO., LTD.Inventors: Huayuan Han, Bing Ma, Jie Li, Kui Wang, Xuan Zhou, Lei Chen, Qiang Li
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Publication number: 20240069750Abstract: A storage device, including: a nonvolatile memory device including a plurality of memory cells; and a controller configured to perform a write operation on at least one write unit included in the plurality of memory cells, and to perform an erase operation on at least one erase unit included in the plurality of memory cells, wherein the controller is further configured to: allocate a plurality of zones to a storage space of the nonvolatile memory device in response to a request of an external host device, select two or more erase units among a plurality of erase units of the plurality of memory cells to be allocated to each of the plurality of zones based on a zone map table, fixedly and sequentially manage logical addresses of data written in the plurality of zones, wherein the controller includes an internal buffer configured to store first data to be written in a first zone from among the plurality of zones, and wherein the controller is further configured to perform a backup operation for the first data bType: ApplicationFiled: August 30, 2023Publication date: February 29, 2024Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Kui-Yon MUN, Junyeong HAN, Jooyoung HWANG, Gyeongmin KIM, Keunsan PARK, Joon-Whan BAE, Heetak SHIN, Seunghyun CHOI
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Publication number: 20240070033Abstract: A storage device, including a nonvolatile memory device including a plurality of memory cells forming a user area and a reserved area; and a controller configured to perform a write operation on at least one write unit included in the plurality of memory cells, and to perform an erase operation on at least one erase unit included in the plurality of memory cells, wherein the controller includes an internal buffer, wherein the controller is configured to: perform a backup operation by writing first data stored in the internal buffer in a backup erase unit included in the reserved area, and after performing the backup operation adjust a buffering unit of the internal buffer to correspond to a cell type of the backup erase unit.Type: ApplicationFiled: August 25, 2023Publication date: February 29, 2024Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Junyeong HAN, Kui-Yon Mun, Jooyoung Hwang, Keunsan Park, Gyeongmin Kim, Heetak Shin, Seunghyun Choi
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Publication number: 20240069782Abstract: A storage device, including: a nonvolatile memory device including a plurality of memory cells; and a controller configured to, based on receiving an open zone command from an external host device: based on a number of free erase units from among a plurality of erase units included in the plurality of memory cells being greater than a threshold value, allocate at least two free erase units to a first-type zone, and based on the number of the free erase units being smaller than or equal to the threshold value, allocate the at least two free erase units to a second-type zone. wherein the controller is further configured to permit a random write based on a random logical address received from the external host device for the first-type zone, and to permit a zone write based on a sequential logical address received from the external host device for the second-type zone.Type: ApplicationFiled: August 24, 2023Publication date: February 29, 2024Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Joon-Whan BAE, Junyeong HAN, Kui-Yon MUN, Heetak SHIN
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Publication number: 20230197708Abstract: The disclosure discloses an ultraviolet lamp bead package structure and a preparation method thereof. The ultraviolet lamp bead package structure includes a substrate and a first metal layer arranged on each of a package surface and a back surface of the substrate. A Zener chip is arranged on the electrode region of the first metal layer. The first metal layer also has a peripheral region. A second metal layer is arranged on the first metal layer. An Ultra Violet C radiation (UVC) chip is arranged on the electrode region of the second metal layer. The second metal layer is provided with a quartz lens by sealing through the peripheral region of the second metal layer. The quartz lens wraps the UVC chip and the Zener chip. An filler with anti-UVC characteristic is filled between the quartz lens and each of the UVC chip and the Zener chip.Type: ApplicationFiled: February 16, 2023Publication date: June 22, 2023Inventors: Wenping Guo, Qunxiong Deng, Kui Han
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Patent number: 11400586Abstract: A belt drive system includes a driving wheel, a driven wheel and a drive belt. A first and a second drive belt tensioning mechanism are included. When a first drive member rotates, it moves relative to a first mounting seat and along an axial direction of the first drive member to drive the first tensioning device to move relative to the housing. When a second drive member rotates, it drives the second tensioning device to move relative to the second mounting seat. A related automatic walking robot includes a housing, a road wheel set rotatably arranged on the housing, and a walking motor arranged on the housing for driving the road wheel set.Type: GrantFiled: September 26, 2018Date of Patent: August 2, 2022Assignee: Suzhou Cleva Precision Machinery and Technology Co., LtdInventors: Zhao Kong, Kui Han
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Publication number: 20220036954Abstract: To program in a nonvolatile memory device including a cell region including first metal pads and a peripheral region including second metal pads and vertically connected to the cell region by the first metal pads and the second metal pads, a memory block is provided with a plurality of sub blocks disposed in a vertical direction where the memory block includes a plurality of cell strings each including a plurality of memory cells connected in series and disposed in the vertical direction. A plurality of intermediate switching transistors are disposed in a boundary portion between two adjacent sub blocks in the vertical direction. Each of the plurality of intermediate switching transistors is selectively activated based on a program address during a program operation. The selectively activating each of the plurality of intermediate switching transistors includes selectively turning on one or more intermediate switching transistors in a selected cell string based on the program address.Type: ApplicationFiled: October 18, 2021Publication date: February 3, 2022Inventors: Chang-Yeon YU, Kui-Han KO, Il-Han PARK, June-Hong PARK, Joo-Yong PARK, Joon-Young PARK, Bong-Soon LIM
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Patent number: 11183249Abstract: To program in a nonvolatile memory device, a memory block is provided with a plurality of sub blocks disposed in a vertical direction where the memory block includes a plurality of cell strings each including a plurality of memory cells connected in series and disposed in the vertical direction. A plurality of intermediate switching transistors are disposed in a boundary portion between two adjacent sub blocks in the vertical direction. Each of the plurality of intermediate switching transistors is selectively activated based on a program address during a program operation. The selectively activating each of the plurality of intermediate switching transistors includes selectively turning on one or more intermediate switching transistors in a selected cell string based on the program address.Type: GrantFiled: September 25, 2018Date of Patent: November 23, 2021Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Chang-Yeon Yu, Kui-Han Ko, Il-Han Park, June-Hong Park, Joo-Yong Park, Joon-Young Park, Bong-Soon Lim
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Patent number: 10902922Abstract: A nonvolatile memory includes a first sub-block defined by a first string select line and a first word line; a second sub-block defined by a second string select line different from the first string select line and a second word line different from the first word line; a first vacant block defined by the first string select line and the second word line; and a second vacant block defined by the second string select line and the first word line. First data is programmed in the first sub-block with, second data is programmed in the second sub-block, and no data is programmed in the first vacant block and the second vacant block.Type: GrantFiled: May 15, 2019Date of Patent: January 26, 2021Assignee: Samsung Electronics Co., Ltd.Inventors: Hyun Seo, Kui Han Ko, Jin-Young Kim, Il Han Park, Bong Soon Lim
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Publication number: 20200306956Abstract: A belt drive system includes a driving wheel, a driven wheel and a drive belt. A first and a second drive belt tensioning mechanism are included. When a first drive member rotates, it moves relative to a first mounting seat and along an axial direction of the first drive member to drive the first tensioning device to move relative to the housing. When a second drive member rotates, it drives the second tensioning device to move relative to the second mounting seat. A related automatic walking robot includes a housing, a road wheel set rotatably arranged on the housing, and a walking motor arranged on the housing for driving the road wheel set.Type: ApplicationFiled: September 26, 2018Publication date: October 1, 2020Inventors: Zhao Kong, Kui Han
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Patent number: 10748617Abstract: A method of operating a nonvolatile memory device is provided where the nonvolatile memory device includes a plurality of cell strings, and each cell string includes a plurality of multi-level cells. a voltage of a selected word line is sequentially changed to sequentially have a plurality of read voltages for determining threshold voltage states of the plurality of multi-level cells. A voltage of an adjacent word line adjacent to the selected word line is sequentially changed in synchronization with voltage changing time points of the selected word line. A load of the selected word line is reduced and an operation speed of the nonvolatile memory device is increased by synchronizing the voltage change of the selected word line and the voltage change of the adjacent word line in the same direction.Type: GrantFiled: December 17, 2018Date of Patent: August 18, 2020Assignee: Samsung Electronics Co., Ltd.Inventors: Kui-Han Ko, Jin-Young Kim, Il-Han Park, Bong-Soon Lim
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Patent number: 10692578Abstract: Provided is a method performed by a nonvolatile memory device, the method may include: initiating a first program operation corresponding to a first program loop among a plurality of program loops; receiving a suspend command for an urgent read operation during the first program operation; determining a recovery timing from either of a first timing contemporaneous with the receiving the suspend command, and a second timing after completion of the first program operation, based on the suspend command; and initiating a recovery at the determined recovery timing by applying a recovery voltage to a selected word line.Type: GrantFiled: April 17, 2018Date of Patent: June 23, 2020Assignee: SAMSUNG ELECTRONICS CO., LTDInventors: Su-chang Jeon, Kui-han Ko, Dong-hun Kwak, Jin-young Kim
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Publication number: 20200170180Abstract: A smart mower includes a housing with an inner housing located at a lower portion and an outer housing connected with the inner housing and located at an upper portion; a cutting mechanism; and a walking mechanism. The cutting mechanism and the walking mechanism are mounted in the inner housing. A handle is disposed on the inner housing adjacent the outer housing for conveying the smart mower. Projection of the handle on a horizontal plane is within a range of projection of the outer housing on the horizontal plane.Type: ApplicationFiled: August 17, 2018Publication date: June 4, 2020Inventors: Zhao Kong, Kui Han
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Patent number: 10614889Abstract: An erase voltage is applied to channels of a selected string group to erase only the selected string group. A size and a number of the spare blocks for storing meta data are reduced and thus a size of the nonvolatile memory device is reduced by reducing unit capacity of the erase operation through grouping of the cell strings. Lifetime of the nonvolatile memory device is extended by having control over erasing some cell strings and not others. Control of cell strings for erasure includes allowing some control lines to float, in some embodiments. In some embodiments, ground select transistors with different thresholds and appropriately applied voltages are used to control erasure of particular cell strings. In some embodiments, biasing of word lines is applied differently to portions of a particular cell string to only erase a portion of the particular cell string.Type: GrantFiled: October 31, 2018Date of Patent: April 7, 2020Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Kui-Han Ko, Jin-Young Kim, Bong-Soon Lim, Il-Han Park
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Publication number: 20190371411Abstract: Provided are a nonvolatile memory and a method of operating the same. The nonvolatile memory includes a first sub-block defined by a first string select line and a first word line; a second sub-block defined by a second string select line different from the first string select line and a second word line different from the first word line; a first vacant block defined by the first string select line and the second word line; and a second vacant block defined by the second string select line and the first word line. First data is programmed in the first sub-block with, second data is programmed in the second sub-block, and no data is programmed in the first vacant block and the second vacant block.Type: ApplicationFiled: May 15, 2019Publication date: December 5, 2019Applicant: Samsung Electronics Co., Ltd.Inventors: Hyun SEO, Kui Han KO, Jin-Young KIM, II Han PARK, Bong Soon LIM
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Publication number: 20190348122Abstract: A method of operating a nonvolatile memory device is provided where the nonvolatile memory device includes a plurality of cell strings, and each cell string includes a plurality of multi-level cells. a voltage of a selected word line is sequentially changed to sequentially have a plurality of read voltages for determining threshold voltage states of the plurality of multi-level cells. A voltage of an adjacent word line adjacent to the selected word line is sequentially changed in synchronization with voltage changing time points of the selected word line. A load of the selected word line is reduced and an operation speed of the nonvolatile memory device is increased by synchronizing the voltage change of the selected word line and the voltage change of the adjacent word line in the same direction.Type: ApplicationFiled: December 17, 2018Publication date: November 14, 2019Applicant: Samsung Electronics Co., Ltd.Inventors: Kui-Han KO, Jin-Young Kim, II-Han Park, Bong-Soon Lim
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Publication number: 20190221267Abstract: An erase voltage is applied to channels of a selected string group to erase only the selected string group. A size and a number of the spare blocks for storing meta data are reduced and thus a size of the nonvolatile memory device is reduced by reducing unit capacity of the erase operation through grouping of the cell strings. Lifetime of the nonvolatile memory device is extended by having control over erasing some cell strings and not others. Control of cell strings for erasure includes allowing some control lines to float, in some embodiments. In some embodiments, ground select transistors with different thresholds and appropriately applied voltages are used to control erasure of particular cell strings. In some embodiments, biasing of word lines is applied differently to portions of a particular cell string to only erase a portion of the particular cell string.Type: ApplicationFiled: October 31, 2018Publication date: July 18, 2019Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Kui-Han KO, Jin-Young KIM, Bong-Soon LIM, Il-Han PARK
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Publication number: 20190198117Abstract: To program in a nonvolatile memory device, a memory block is provided with a plurality of sub blocks disposed in a vertical direction where the memory block includes a plurality of cell strings each including a plurality of memory cells connected in series and disposed in the vertical direction. A plurality of intermediate switching transistors are disposed in a boundary portion between two adjacent sub blocks in the vertical direction. Each of the plurality of intermediate switching transistors is selectively activated based on a program address during a program operation. The selectively activating each of the plurality of intermediate switching transistors includes selectively turning on one or more intermediate switching transistors in a selected cell string based on the program address.Type: ApplicationFiled: September 25, 2018Publication date: June 27, 2019Inventors: Chang-Yeon YU, Kui-Han KO, Il-Han PARK, June-Hong PARK, Joo-Yong PARK, Joon-Young PARK, Bong-Soon LIM
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Patent number: D938967Type: GrantFiled: August 3, 2020Date of Patent: December 21, 2021Assignee: Apple Inc.Inventors: Guillaume P. Barlier, Lisa K. Forssell, Robert Garcia, III, Joseph D. Gardner, Aurelio Guzmán, Aron Hjartarson, Rongxuan Jin, Wendy M. Klein, Kui Han Lee, Stephanie Wang Nai Ping Perea, Jason D. Rickwald, Christopher J. Romney, Johannes Lucius Wolfgang Saam, Nicolas V. Scapel, Oleksandr Tyemirov, Christopher I. Wilson