Abstract: A storage device, including: a nonvolatile memory device including a plurality of memory cells; and a controller configured to perform a write operation on at least one write unit included in the plurality of memory cells, and to perform an erase operation on at least one erase unit included in the plurality of memory cells, wherein the controller is further configured to: allocate a plurality of zones to a storage space of the nonvolatile memory device based on a request received from an external host device, select two or more erase units from among a plurality of erase units included in the plurality of memory cells to be allocated to each of the plurality of zones based on a zone map table, fixedly and sequentially manage logical addresses of data written in the plurality of zones, wherein the nonvolatile memory device includes a plurality of memory chips, wherein each memory chip of the plurality of memory chips includes a plurality of memory blocks, wherein each memory block of the plurality of memory b

Abstract: A storage device, including: a nonvolatile memory device including a plurality of memory cells; and a controller configured to perform a write operation on at least one write unit included in the plurality of memory cells, and to perform an erase operation on at least one erase unit included in the plurality of memory cells, wherein the controller is further configured to: allocate a plurality of zones to a storage space of the nonvolatile memory device in response to a request of an external host device, select two or more erase units among a plurality of erase units of the plurality of memory cells to be allocated to each of the plurality of zones based on a zone map table, fixedly and sequentially manage logical addresses of data written in the plurality of zones, wherein the controller includes an internal buffer configured to store first data to be written in a first zone from among the plurality of zones, and wherein the controller is further configured to perform a backup operation for the first data b

Abstract: A storage device, including a nonvolatile memory device including a plurality of memory cells forming a user area and a reserved area; and a controller configured to perform a write operation on at least one write unit included in the plurality of memory cells, and to perform an erase operation on at least one erase unit included in the plurality of memory cells, wherein the controller includes an internal buffer, wherein the controller is configured to: perform a backup operation by writing first data stored in the internal buffer in a backup erase unit included in the reserved area, and after performing the backup operation adjust a buffering unit of the internal buffer to correspond to a cell type of the backup erase unit.

Abstract: A storage device, including: a nonvolatile memory device including a plurality of memory cells; and a controller configured to, based on receiving an open zone command from an external host device: based on a number of free erase units from among a plurality of erase units included in the plurality of memory cells being greater than a threshold value, allocate at least two free erase units to a first-type zone, and based on the number of the free erase units being smaller than or equal to the threshold value, allocate the at least two free erase units to a second-type zone. wherein the controller is further configured to permit a random write based on a random logical address received from the external host device for the first-type zone, and to permit a zone write based on a sequential logical address received from the external host device for the second-type zone.

Abstract: A method of controlling a first memory controller that controls a non-volatile memory device includes: the first memory controller receiving first data and a first physical address from a second memory controller via a first interface of the first memory controller; the first memory controller storing the first data in a non-volatile memory buffer of the first memory controller; and the first memory controller programming the first data stored in the non-volatile memory buffer in a first physical region of the non-volatile memory device corresponding to the first physical address.

Abstract: A memory system includes a memory device including memory cells, and a controller that performs a write operation, a read operation, and a check operation on the memory device. During the check operation, the controller controls the memory device to read check data from target memory cells of the memory cells by using a check level, compares the check data with original data stored in the target memory cells, and determines a reliability of the target memory cells or the check data based on a result of the comparison.

Abstract: A memory system includes a memory device, a first controller, and a second controller. The first controller is configured to output a control signal for the memory device and data to be stored in the memory device based on a signal received from a host. The second controller includes a non-volatile memory configured to store the data. The second controller is configured to receive the control signal and the data from the first controller, and control the memory device based on the control signal.

Abstract: A memory system includes a memory device, a first controller, and a second controller. The first controller is configured to output a control signal for the memory device and data to be stored in the memory device based on a signal received from a host. The second controller includes a non-volatile memory configured to store the data. The second controller is configured to receive the control signal and the data from the first controller, and control the memory device based on the control signal.

Abstract: A method of controlling a first memory controller that controls a non-volatile memory device includes: the first memory controller receiving first data and a first physical address from a second memory controller via a first interface of the first memory controller; the first memory controller storing the first data in a non-volatile memory buffer of the first memory controller; and the first memory controller programming the first data stored in the non-volatile memory buffer in a first physical region of the non-volatile memory device corresponding to the first physical address.

Abstract: A memory system includes a memory device including memory cells, and a controller that performs a write operation, a read operation, and a check operation on the memory device. During the check operation, the controller controls the memory device to read check data from target memory cells of the memory cells by using a check level, compares the check data with original data stored in the target memory cells, and determines a reliability of the target memory cells or the check data based on a result of the comparison.

Abstract: A system includes: a nonvolatile memory; a memory controller configured to control the nonvolatile memory, the memory controller including a first buffer memory for temporarily storing write data to be written to the nonvolatile memory; and a second buffer memory having a lower operational speed and a higher memory capacity than the first buffer memory. The memory controller is configured to transmit the write data from the first buffer memory to the second buffer memory and to the nonvolatile memory, and to release an operational state of the first buffer memory after transmitting the write data from the first buffer memory to the second buffer memory and to the nonvolatile memory. Writing additional write data to the first buffer memory is prohibited prior to the release of the operational state of the first buffer memory, and is permitted after the release of the operational state of the first buffer memory.

Abstract: A method of controlling memory devices of a memory controller, the memory devices including a plurality of memory dies, includes receiving at least one data operation request and a power budget from external of the memory controller; determining respective data operation times of the plurality of memory dies, wherein a power consumption due to at least one data operation in response to the at least one data operation request may be equal to or less than the power budget; and controlling the plurality of memory dies based on the data operation times.

Abstract: In one embodiment, the method includes sensing, by a memory device, a temperature of the memory device; and generating, by the memory device, a response to a single received command. The response includes temperature information, and the temperature information provides information on the sensed temperature. In one embodiment, the single received command is a read status request command, the read status request command requests status information on the memory device, and the status information includes the temperature information.

Abstract: A method of controlling memory devices of a memory controller, the memory devices including a plurality of memory dies, includes receiving at least one data operation request and a power budget from external of the memory controller; determining respective data operation times of the plurality of memory dies, wherein a power consumption due to at least one data operation in response to the at least one data operation request may be equal to or less than the power budget; and controlling the plurality of memory dies based on the data operation times.

Abstract: A system includes: a nonvolatile memory; a memory controller configured to control the nonvolatile memory, the memory controller including a first buffer memory for temporarily storing write data to be written to the nonvolatile memory; and a second buffer memory having a lower operational speed and a higher memory capacity than the first buffer memory. The memory controller is configured to transmit the write data from the first buffer memory to the second buffer memory and to the nonvolatile memory, and to release an operational state of the first buffer memory after transmitting the write data from the first buffer memory to the second buffer memory and to the nonvolatile memory. Writing additional write data to the first buffer memory is prohibited prior to the release of the operational state of the first buffer memory, and is permitted after the release of the operational state of the first buffer memory.

Abstract: A storage device includes a memory device configured to store data and a memory controller connected to the memory device through a data strobe line and a plurality of data lines. The storage device adds a predetermined specific pattern in front of data and processes data input following the specific pattern as valid data during a read or write operation. The specific pattern is provided in alignment with a data strobe signal (DQS) latency cycle. The memory controller detects a specific pattern input from the memory device during a read operation and processes data input following the specific pattern as valid data when the detected specific pattern matches an internally stored specific pattern.

Abstract: A method for operating a memory controller is provided. The method includes generating a pseudo random number by using a seed included in a stored seed group corresponding to a page to be currently programmed, wherein the stored seed group is stored among a plurality of seed groups. Data to be programmed into the current page is randomizing by using the pseudo random number and the memory controller outputs the randomized data. A solid state drive (SSD) or other memory storage device such as a memory card includes the memory controller and includes a read only memory (ROM) storing the plurality of seed groups. The memory controller includes a micro-processor and a read only memory (ROM) storing executable code for causing the micro-processor to access the plurality of stored seed groups and to select a seed therefrom corresponding to a page to be currently programmed.

Abstract: A storage system is provided which includes: a storage device including a first memory, which may be nonvolatile memory, and a second memory, which may be a device memory, and configured to request a test on at least one of the first and second memories; and a host configured to test the at least one memory in response to the request for the memory test from the storage device and store the test result in the first memory or a third memory.

Abstract: A storage device includes a nonvolatile memory and a memory controller. The nonvolatile memory performs read, write, and erase operations. The memory controller operates in an operating mode where the memory controller exchanges a voltage signal, set to a reference voltage level within an allowable range, with the nonvolatile memory or receives the voltage signal from an external device. When operating in the operating mode, the memory controller optimizes an operating frequency of the nonvolatile memory depending on a voltage level of the voltage signal and a temperature.

Abstract: A method for manufacturing a memory device includes detecting, with a tester, whether memory cells included in a memory device are defective, and programming, with the tester, start addresses of defect-free memory regions for addressing modes of the memory device based on a result of the detection.