Abstract: A system and process for passing messages directly between instances of Operating System (OSs) and plurality of Coupling Facilities (CFs) through Sharable InterSystem Channels (ISCs) and without polling, in one or more Computer Electronic Complexes (CECs). Primary messages and associated secondary messages are passed by a hypervisor using a hypervisor memory.

Abstract: The setting of interruption initiatives is directly initiated by external adapters. An adapter external to the processors at which the initiative is to be made pending sends a request directly to a system controller coupled to the adapter and the processors. The system controller then broadcasts a command to the processors instructing the processors to set the interruption initiative.

Abstract: The setting of interruption initiatives is directly initiated by external adapters. An adapter external to the processors at which the initiative is to be made pending sends a request directly to a system controller coupled to the adapter and the processors. The system controller then broadcasts a command to the processors instructing the processors to set the interruption initiative.

Abstract: Computer System for extending coupling channels through the addition of specific hardware interrupts and controls to allow 1) sharing of receiver resources among multiple Coupling Facility (CF) logical partitions (LPARs), 2) direct CEC to CEC message passing, and 3) CF interrupts.

Abstract: A method for use in a computer system for extending coupling channels through the addition of specific hardware interrupts and controls to allow 1) sharing of receiver resources among multiple Coupling Facility (CF) logical partitions (LPARs), 2) direct CEC to CEC message passing, and 3) CF interrupts.

Abstract: A method and system for extensions to earlier patents dealing with the implementation of the InterSystem Channel (ISC) link architecture. First, it describes hardware state machines that handle all valid link messaging sequences without any processor involvement. These state machines also process larger commands and responses that may be divided into multiple frame segments. Finally, the missing frame detection is expanded for the multi frame segment commands and responses.

Abstract: A method and system for scheduling multiple frames and packets that are queued for transmission over a link, and queued from a link for storing into main memory. It recognizes priorities, provides fairness, and guarantees forward progress of all users. This method and system provides a mechanism that achieves the objectives with a very small state machine. It takes advantage of the nature of the traffic to calculate priorities in parallel to frame transmission.

Abstract: A method and system for I/O adapters that must rely on a central processor to handle all inbound link events to reduce the number of events signaled to the central processor with hardware state machines that sort out the significant link events and automatically generate the appropriate response on the outbound link thereby greatly reducing the central processor utilization. As optical links fail (unplugging the link is a failure) or when receiving multiple continuous sequences, numerous events must be filtered by the hardware state machines to limit the number of interrupts presented to the central processor.

Abstract: A method and system for a processor to efficiently accesses a remote First-in First-out (FIFO) buffer that is used to record event information. The access involves an interrupt mechanism when the FIFO transitions from the empty state, a mechanism for reading a FIFO entry including FIFO state information, and a mechanism for reading large areas of the FIFO while maintaining the pointers and interrupt protocols.

Abstract: A method and system for an I/O coupling channel to operate in a plurality of modes. The first mode is the new mode providing peer operation with many times more message passing facilities as the old mode. The second mode is used to connect the new channels through a converter to multiple old channels. In this mode, the new channel distributes its message passing resources among the multiple sink ports of the converter that are attached to old channels. The converter keeps no state information and only adjusts line speeds, routs outbound packets, and adds source information to inbound packets. The new channel operating in old compatibility mode gives the illusion to the software of multiple separate channels, one for each converter sink port.

Abstract: Controlling the flow of information between senders and receivers across links being used as channels. In one example, a self-timed interface link is adapted to be used as a channel. Such an interface is referred to as an integrated cluster bus. The flow control for the integrated cluster bus includes, for instance, a Data Request packet that indicates to the transmitter of data that it can now send the data; a continue indicator that specifies that more data is to follow; and a sequence indicator that is used to determine if a particular message is in proper sequence order. The integrated cluster bus does not require large data buffers and offers low latency messaging.

Abstract: A method and system for a processor to efficiently accesses a remote First-in First-out (FIFO) buffer that is used to record event information. The access involves an interrupt mechanism when the FIFO transitions from the empty state, a mechanism for reading a FIFO entry including FIFO state information, and a mechanism for reading large areas of the FIFO while maintaining the pointers and interrupt protocols.

Abstract: A method and system for a processor to efficiently accesses a remote First-in First-out (FIFO) buffer that is used to record event information. The access involves an interrupt mechanism when the FIFO transitions from the empty state, a mechanism for reading a FIFO entry including FIFO state information, and a mechanism for reading large areas of the FIFO while maintaining the pointers and interrupt protocols.

Abstract: Controlling the flow of information between senders and receivers across links being used as channels. In one example, a self-timed interface link is adapted to be used as a channel. Such an interface is referred to as an integrated cluster bus. The flow control for the integrated cluster bus includes, for instance, a Data Request packet that indicates to the transmitter of data that it can now send the data; a continue indicator that specifies that more data is to follow; and a sequence indicator that is used to determine if a particular message is in proper sequence order. The integrated cluster bus does not require large data buffers and offers low latency messaging.

Abstract: Controlling the flow of information between senders and receivers across links being used as channels. In one example, a self-timed interface link is adapted to be used as a channel. Such an interface is referred to as an integrated cluster bus. The flow control for the integrated cluster bus includes, for instance, a Data Request packet that indicates to the transmitter of data that it can now send the data; a continue indicator that specifies that more data is to follow; and a sequence indicator that is used to determine if a particular message is in proper sequence order. The integrated cluster bus does not require large data buffers and offers low latency messaging.

Abstract: A method and system for an I/O coupling channel to operate in a plurality of modes. The first mode is the new mode providing peer operation with many times more message passing facilities as the old mode. The second mode is used to connect the new channels through a converter to multiple old channels. In this mode, the new channel distributes its message passing resources among the multiple sink ports of the converter that are attached to old channels. The converter keeps no state information and only adjusts line speeds, routs outbound packets, and adds source information to inbound packets. The new channel operating in old compatibility mode gives the illusion to the software of multiple separate channels, one for each converter sink port.

Abstract: A method and system for I/O adapters that must rely on a central processor to handle all inbound link events to reduce the number of events signaled to the central processor with hardware state machines that sort out the significant link events and automatically generate the appropriate response on the outbound link thereby greatly reducing the central processor utilization. As optical links fail (unplugging the link is a failure) or when receiving multiple continuous sequences, numerous events must be filtered by the hardware state machines to limit the number of interrupts presented to the central processor.

Abstract: A method for use in a computer system for extending coupling channels through the addition of specific hardware interrupts and controls to allow 1) sharing of receiver resources among multiple Coupling Facility (CF) logical partitions (LPARs), 2) direct CEC to CEC message passing, and 3) CF interrupts.

Abstract: A method and system for a processor to efficiently accesses a remote First-in First-out (FIFO) buffer that is used to record event information. The access involves an interrupt mechanism when the FIFO transitions from the empty state, a mechanism for reading a FIFO entry including FIFO state information, and a mechanism for reading large areas of the FIFO while maintaining the pointers and interrupt protocols.

Abstract: A method and system for scheduling multiple frames and packets that are queued for transmission over a link, and queued from a link for storing into main memory. It recognizes priorities, provides fairness, and guarantees forward progress of all users. This method and system provides a mechanism that achieves the objectives with a very small state machine. It takes advantage of the nature of the traffic to calculate priorities in parallel to frame transmission.