Patents by Inventor Kun Yi

Kun Yi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040168619
    Abstract: A working table includes a housing, a board slidably received in the housing, and a casing secured to the board and moved in concert with the board. A post is slidably engaged through the housing and the casing and has a rack, a spindle is rotatably secured in the housing and slidably engaged through the casing, to guide the casing to move relative to the housing. A gear is rotatably secured in the casing and engaged with the rack of the post, and a worm is slidably engaged on the spindle and engaged with the gear, in order to move the post up and down when the spindle and the worm is rotated relative to the casing and the housing.
    Type: Application
    Filed: February 28, 2003
    Publication date: September 2, 2004
    Inventor: Kun Yi Lin
  • Publication number: 20040164267
    Abstract: The valve blades of the present invention facilitate delayed onset and gradual or fine variations in the flow of gas through the throttle valve to achieve a process interval of interior chamber gas pressures over a broader valve blade step range, achieve aggressive PI over a broad range for enhanced tool throughput, enhance stability of interior chamber gas pressures during substrate processing, and increase tool uptime and production efficiency. In one embodiment, each of the two valve blades in the throttle valve includes at least one, and typically, multiple notches or gaps for a delayed onset, and finely-graded increase, in flow of gas through the valve throughout the step range of the valve blades. In another embodiment, the semicircular valve blades have a cam-shaped configuration and are capable of varying the radius of the circle defined by the two blades.
    Type: Application
    Filed: February 20, 2003
    Publication date: August 26, 2004
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ta-Chin Lee, Kun-Yi Chen, Hue-Ming Kuo
  • Publication number: 20040099218
    Abstract: An ultrasonic nebulizer for producing high-volume sub-micron droplets is disclosed. The ultrasonic nebulizer utilizes a 3 or 5 MHz frequency as an oscillation frequency for producing sub-micron droplets. The nebulizer can also use at least one piezoelectric ceramic oscillator for increasing the volume of the droplets. The ultrasonic nebulizer comprises an ac/dc converter, an oscillator circuit, an amplifying device, a nebulization chamber, and at least one piezoelectric ceramic oscillator. The ac/dc converter rectifies an ac current to a dc current. The oscillator circuit produces an oscillation signal with a frequency larger than or equal to 3 MHz. The amplifying device amplifies the oscillation signal. The nebulization chamber has a lower face for holding a liquid to be nebulized.
    Type: Application
    Filed: July 14, 2003
    Publication date: May 27, 2004
    Applicant: Purzer Pharmaceutical Co., Ltd.
    Inventors: Che-Hua Yang, Hsiu-Kang Chang, Tiao-Ling Hsieh, Kun-Yi Tsai
  • Patent number: 6733372
    Abstract: A grinding machine includes a work table disposed on top of a base, a housing rotatably secured to the base with a shaft and having a roller disposed on one end, a casing has one end secured to the housing and has another roller, a sander belt is engaged over the rollers. The sander belt is adjustable relative to the base and the work table when the housing is rotated and adjusted relative to the base about the shaft. A plate is secured to the base and has a curved slot, the casing has a fastener adjustably engaged in the curved slot of the plate.
    Type: Grant
    Filed: February 21, 2002
    Date of Patent: May 11, 2004
    Inventor: Kun Yi Lin
  • Publication number: 20040025283
    Abstract: A work table having the function of collecting dust or the like may be used to collect fragments or chips produced during the working process of the workpiece.
    Type: Application
    Filed: August 12, 2002
    Publication date: February 12, 2004
    Inventor: Kun-Yi Lin
  • Patent number: 6664177
    Abstract: This invention relates to a method of fabrication used for semiconductor integrated circuit devices, and more specifically, to improve the photolithography processing window of a multi-layered dual damascene process by using a dielectric anti-reflective coating, DARC, comprised of multiple layers of silicon oxynitride, SiON, with varying k, dielectric constant values and thickness, to reduce reflectivity and improve light absorption. By varying both the thickness and the dielectric constant of the layers, the optical properties of light absorption, refractive indices, and light reflection are optimized.
    Type: Grant
    Filed: February 1, 2002
    Date of Patent: December 16, 2003
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Kwang-Ming Lin, Chung-Hung Lu, Szu-An Wu, Ya-Li Tai, Kun-Yi Liu
  • Publication number: 20030173884
    Abstract: An electron amplifier and a method of manufacturing the same are provided. The electron amplifier includes a substrate in which a plurality of through holes are formed, a resistive layer deposited on the sidewalls of the through holes, an electron emissive layer including carbon nanotubes which is deposited on the resistive layer, and an electrode layer formed on each of the upper and lower sides of the substrate. Because the electron emissive layer of the electron amplifier is uniform and provides a high electron emission efficiency, the electron amplification efficiency is improved. The electron amplifier manufacturing method enables economical mass production of electron amplifiers.
    Type: Application
    Filed: February 20, 2003
    Publication date: September 18, 2003
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jung-na Heo, Whi-kun Yi, Jeong-hee Lee, Se-gi Yu, Tae-won Jeong, Chang-soo Lee
  • Publication number: 20030157871
    Abstract: A grinding machine includes a work table disposed on top of a base, a housing rotatably secured to the base with a shaft and having a roller disposed on one end, a casing has one end secured to the housing and has another roller, a sander belt is engaged over the rollers. The sander belt is adjustable relative to the base and the work table when the housing is rotated and adjusted relative to the base about the shaft. A plate is secured to the base and has a curved slot, the casing has a fastener adjustably engaged in the curved slot of the plate.
    Type: Application
    Filed: February 21, 2002
    Publication date: August 21, 2003
    Inventor: Kun Yi Lin
  • Patent number: 6602641
    Abstract: A new method is provided for the use of alignment marks. In prior art methods, a combination mask is mounted in a mask holder. The combination mask contains multiple, different alignment marks for different purposes and steps in a semiconductor processing sequence. This mark is printed onto the surface of a wafer. Using the method of the invention, a reticle is used that does not contain any patterns (a zero-layer reticle), on this zero-layer reticle an alignment mark is created. This zero-layer alignment mark is referred to as the zero-mark alignment mark, this alignment mark can be printed directly onto the wafer surface. Under the invention, the zero-layer reticle takes the place of the prior art mask holder, on the zero-layer reticle an alignment mark is created that can be directly printed from the zero-layer reticle onto the surface of a wafer. The zero-layer reticle further contains a multiplicity of production alignment marks in a location that is fixed with respect to the alignment mark.
    Type: Grant
    Filed: April 19, 2001
    Date of Patent: August 5, 2003
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventor: Kun Yi Liu
  • Patent number: 6602642
    Abstract: An optical proximity correction (OPC) verification mask is disclosed. The mask includes device areas that are separated by scribe lines. One or more OPC test patterns are integrated into the scribe lines for verification purposes. These patterns can include: line-end shortening (LES) patterns, such as serifs and hammerheads added to the ends of lines; corner rounding patterns, such as positive and negative serifs; and, scattering bars (SB's) and anti-scattering bars (ASB's) to compensate for isolated-dense proximity effects and isolated-feature depth of focus reduction. Other OPC patterns may also be included. A method for making the mask, and a semiconductor device created at least in part by a method including use of the mask, are also disclosed.
    Type: Grant
    Filed: August 29, 2001
    Date of Patent: August 5, 2003
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd
    Inventors: Kun-Yi Liu, Chin-Chuan Hsieh, Ching-Ming Chen
  • Publication number: 20030141179
    Abstract: A carbon nanotube manufacturing method is provided. In the carbon nanotube manufacturing method, carbon nanoparticles are dispersed in a strong acid solution and heated at a predetermined temperature under reflux to form carbon nanotubes from the carbon nanoparticles. The carbon nanotubes can be simply produced on a mass-scale at low costs by using the strong acid solution.
    Type: Application
    Filed: January 30, 2003
    Publication date: July 31, 2003
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Se-Gi Yu, Whi-Kun Yi, Jeong-Hee Lee, Yong-Wan Jin, Tae-Won Jeong
  • Publication number: 20030127960
    Abstract: A field emitter device including carbon nanotubes each of which has a protective membrane is provided. The protective membrane is formed of a nitride, a carbide, or an oxide. Suitable nitrides for the protective membrane include boron nitride, aluminum nitride, boron carbon nitride, and gallium nitride. The protective membrane protects the carbon nanotubes from damage due to arcing or an unnecessary remaining gas and thus improves field emission characteristics and stability of the field emitter device.
    Type: Application
    Filed: January 8, 2003
    Publication date: July 10, 2003
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Tae-Won Jeong, Ji-Beom Yoo, Whi-Kun Yi, Jeong-Hee Lee, Se-Gi Yu, Chang-Soo Lee, Jung-Na Heo
  • Publication number: 20030044696
    Abstract: A verification photomask disclosed. The mask may be for process window verification purposes when switching between fabrication equipment, and/or for optical proximity correction (OPC) verification purposes. The mask includes device areas that are separated by scribe lines. One or more verification patterns are integrated into the scribe lines for verification purposes. These patterns can include: proximity patterns, photoresist-spacing patterns, polysilicon end cap patterns, as well as other patterns. A method for making the mask, and a semiconductor device created at least in part by a method including use of the mask, are also disclosed.
    Type: Application
    Filed: May 13, 2002
    Publication date: March 6, 2003
    Applicant: Taiwan Semiconductor Manufacturing Co. Ltd.
    Inventors: Kun-Yi Liu, Ching-Ming Chen, Chin-Chuan Hsieh
  • Publication number: 20030044692
    Abstract: An optical proximity correction (OPC) verification mask is disclosed. The mask includes device areas that are separated by scribe lines. One or more OPC test patterns are integrated into the scribe lines for verification purposes. These patterns can include: line-end shortening (LES) patterns, such as serifs and hammerheads added to the ends of lines; corner rounding patterns, such as positive and negative serifs; and, scattering bars (SB's) and anti-scattering bars (ASB's) to compensate for isolated-dense proximity effects and isolated-feature depth of focus reduction. Other OPC patterns may also be included. A method for making the mask, and a semiconductor device created at least in part by a method including use of the mask, are also disclosed.
    Type: Application
    Filed: August 29, 2001
    Publication date: March 6, 2003
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Kun-Yi Liu, Chin-Chuan Hsieh, Ching-Ming Chen
  • Publication number: 20020013049
    Abstract: A process for forming a conducting structure layer that can reduce metal etching residues, in which a pre in-situ metal layer is added before a metal layer is deposited. The pre in-situ metal layer enables the crystalloid of the metal layer to grow more 5 evenly, and thus reduces the etching residues of the conducting structure layer. A structure of a conducting structure layer is also provided.
    Type: Application
    Filed: May 4, 2001
    Publication date: January 31, 2002
    Inventors: Teng-Tang Yang, Kun-Yi Lu, Ying-Chang Chia, Jiin-Shiarng Wen
  • Patent number: 6030732
    Abstract: During the course of manufacturing an IC, the thickness of the photoresist layer varies. In the presence of multiple steps, the difference between the maximum photoresist thickness and the minimum thickness can be quite substantial. It is sometimes the case that the minimum thickness is insufficient in some spots for proper exposure of the resist to be possible. The presence of such spots is detected by means of a monitor in the form of an optical mask comprising a group of lines whose width is close to the critical dimension together with an isolated line of similar width and a second, wider, isolated line. A photoresist image of the process monitor is formed in the kerf for each of the layers that is deposited, with the mask being shifted by about half its length between successive depositions. This ensures that a step is formed between successive layers so that if the photoresist layer is too thin at some point this will be reflected in the monitor.
    Type: Grant
    Filed: January 7, 1999
    Date of Patent: February 29, 2000
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventor: Kun-Yi Liu
  • Patent number: 5900163
    Abstract: A method for etching a layer of a microelectronic structure includes the steps of masking the layer to be etched so that predetermined portions of the layer are exposed, and providing an etching gas. An additional gas is also provided wherein the additional gas generates a compound having a carbene structure when exposed to a plasma discharge. A plasma of the etching gas and the additional gas is generated to thereby etch the exposed portions of the layer and to form the compound having a carbene structure. A polymer can thus be formed from the compound having the carbene structure on the sidewalls of the etched portions of the layer. Accordingly, the profile of the etched layer can be improved.
    Type: Grant
    Filed: January 16, 1997
    Date of Patent: May 4, 1999
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Whi-kun Yi, Dai-sik Moon, Sung-kyeong Kim, Kyung-hoon Kim, Gyu-hwan Kwag
  • Patent number: 5527166
    Abstract: A locating mechanism of the fixed volute of a scroll compressor comprises a frame, a fixed volute and an orbiting volute. The frame is provided with a predetermined number of locating faces having thereon respectively a locating member which is fastened with the frame and has a sliding connection face of an arcuate construction. The fixed volute is provided with a predetermined number of shoulders which are corresponding in location and number to the locating members and are provided respectively on the outer side thereof with a sliding connection face of an arcuate construction and engageable with the sliding connection face of the locating member. The fixed volute can be caused to slide up and down along the sliding connection face of the locating member. The sliding connection face of the locating member is provided on the top thereof with a retaining portion for preventing the fixed volute from moving upward.
    Type: Grant
    Filed: August 14, 1995
    Date of Patent: June 18, 1996
    Assignee: Industrial Technology Research Institute
    Inventors: Yu-Choung Chang, Kun-Yi Liang, Tse-Liang Hsiao, Chih-Cheng Yang