Patents by Inventor Kunihiko Iizuka
Kunihiko Iizuka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9395856Abstract: A touch panel controller (3) capable of accurately detecting a change in capacitance includes: a driving section (4) which drives capacitors (C1 through CM) in parallel in accordance with N M-dimensional vectors; and an estimating section (5) which obtains linear sums of the capacitors (C1 through CM) in accordance with the driving in parallel and estimates values of the capacitors (C1 through CM) based on an inner product operation carried out with respect to (i) the linear sums of the capacitors (C1 through CM) and (ii) the N M-dimensional vectors, the driving section (4) driving the capacitors (C1 through CM) in parallel in a first order of the N M-dimensional vectors, the estimating section (5) estimating a first estimated value of the capacitors (C1 through CM) in accordance with the driving in parallel in the first order, the driving section (4) driving the capacitors (C1 through CM) in parallel in a second order of the N M-dimensional vectors, the estimating section (5) estimating a second estimated vaType: GrantFiled: January 18, 2012Date of Patent: July 19, 2016Assignee: Sharp Kabushiki KaishiInventor: Kunihiko Iizuka
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Patent number: 8976154Abstract: A touch panel system (71a) includes a capacitance value distribution detection circuit (72). The capacitance value distribution detection circuit (72) switches a connection state between a first connection state and a second connection state, which first connection state makes first signal lines (HL1 to HLM) serve as drive lines (DL1 to DLM) and second signal lines (VL1 to VLM) serve as sense lines (SL1 to SLM), and which second connection state makes the second signal lines (VL1 to VLM) serve as the drive lines (DL1 to DLM) and the first signal lines (HL1 to HLM) serve as the sense lines (SL1 to SLM).Type: GrantFiled: June 4, 2012Date of Patent: March 10, 2015Assignee: Sharp Kabushiki KaishaInventors: Masayuki Miyamoto, Kunihiko Iizuka, Manabu Yumoto, Shinichi Yoshida, Kengo Takahama
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Patent number: 8942937Abstract: A capacitance distribution detection circuit includes a multiplexer, a driver, and a sense amplifier. The multiplexer switches states between a first connection state and a second connection state. The first connection state drives first signal lines in parallel so that voltages are applied, outputs, along second signal lines, a linear sum of electric charges stored in capacitors corresponding to that respective one of the second signal lines, and estimates, a capacitance of capacitors formed along that second signal line. The second connection state drives, the second signal lines in parallel so that voltages are applied, outputs, along the first signal lines, a linear sum of electric charges stored in the capacitors corresponding to that respective one of the first signal lines, and estimates, a capacitance of the capacitors formed along that first signal line.Type: GrantFiled: May 22, 2012Date of Patent: January 27, 2015Assignee: Sharp Kabushiki KaishaInventors: Masayuki Miyamoto, Kunihiko Iizuka
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Publication number: 20140149059Abstract: A capacitance distribution detection circuit (102) includes a multiplexer (104), a driver (105), and a sense amplifier (106), and the multiplexer (104) switches states between a first connection state in which first signal lines (HL1 to HLM) are connected to the driver (105) and second signal lines (VL1 to VLM) are connected to the sense amplifier (106), and a second connection state in which the first signal lines (HL1 to HLM) are connected to the sense amplifier (106) and the second signal lines (VL1 to VLM) are connected to the driver (105). The first connection state (A) (a) drives, on the basis of code sequences (di (=di1, di2, . . . , diN, where i=1, . . .Type: ApplicationFiled: May 22, 2012Publication date: May 29, 2014Applicant: SHARP KABUSHIKI KAISHAInventors: Masayuki Miyamoto, Kunihiko Iizuka
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Publication number: 20140139483Abstract: A capacitance distribution detection circuit (2) includes a multiplexer (4), a driver (5), and a sense amplifier (6), and the multiplexer (4) switches states between a first connection state in which first signal lines (HL1 to HLM) are connected to the driver (5) and second signal lines (VL1 to VLM) are connected to the sense amplifier (6), and a second connection state in which the first signal lines (HL1 to HLM) are connected to the sense amplifier (6) and the second signal lines (VL1 to VLM) are connected to the driver (5).Type: ApplicationFiled: April 4, 2012Publication date: May 22, 2014Applicant: SHARP KABUSHIKI KAISHAInventors: Masayuki Miyamoto, Kunihiko Iizuka
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Patent number: 8730197Abstract: A touch panel controller (1), which can accurately detect changes in capacitance values of respective first and second electrostatic capacitors which are touched, includes: a driving section (4) for driving drive lines (DL1 through DL4) on the basis of a code sequence so as to drive (i) electrostatic capacitors (C31 through C34) provided between the respective drive lines (DL1 through DL4) and a sense line (SL3) and (ii) electrostatic capacitors (C41 through C44) provided between the respective drive lines (DL1 through DL4) and a sense line (SL4) so that (i) a first linear sum of first capacitance values of the respective electrostatic capacitors (C31 through C34) is outputted from the sense line (SL3) and (ii) a second linear sum of second capacitance values of the respective electrostatic capacitors (C41 through C44) is outputted from the sense line (SL4); a differential amplifier (5) for amplifying a difference between the first linear sum and the second linear sum; and a saturation prevention control sectType: GrantFiled: January 23, 2012Date of Patent: May 20, 2014Assignee: Sharp Kabushiki KaishaInventors: Mutsumi Hamaguchi, Masayuki Miyamoto, Kunihiko Iizuka
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Publication number: 20140132541Abstract: A touch panel system (71a) includes a capacitance value distribution detection circuit (72). The capacitance value distribution detection circuit (72) switches a connection state between a first connection state and a second connection state, which first connection state makes first signal lines (HL1 to HLM) serve as drive lines (DL1 to DLM) and second signal lines (VL1 to VLM) serve as sense lines (SL1 to SLM), and which second connection state makes the second signal lines (VL1 to VLM) serve as the drive lines (DL1 to DLM) and the first signal lines (HL1 to HLM) serve as the sense lines (SL1 to SLM).Type: ApplicationFiled: June 4, 2012Publication date: May 15, 2014Applicant: SHARP KABUSHIKI KAISHAInventors: Masayuki Miyamoto, Kunihiko Iizuka, Manabu Yumoto, Shinichi Yoshida, Kengo Takahama
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Publication number: 20140104236Abstract: A touch panel controller (1), which can accurately detect changes in capacitance values of respective first and second electrostatic capacitors which are touched, includes: a driving section (4) for driving drive lines (DL1 through DL4) on the basis of a code sequence so as to drive (i) electrostatic capacitors (C31 through C34) provided between the respective drive lines (DL1 through DL4) and a sense line (SL3) and (ii) electrostatic capacitors (C41 through C44) provided between the respective drive lines (DL1 through DL4) and a sense line (SL4) so that (i) a first linear sum of first capacitance values of the respective electrostatic capacitors (C31 through C34) is outputted from the sense line (SL3) and (ii) a second linear sum of second capacitance values of the respective electrostatic capacitors (C41 through C44) is outputted from the sense line (SL4); a differential amplifier (5) for amplifying a difference between the first linear sum and the second linear sum; and a saturation prevention control sectType: ApplicationFiled: January 23, 2012Publication date: April 17, 2014Applicant: SHARP KABUSHIKI KAISHAInventors: Mutsumi Hamaguchi, Masayuki Miyamoto, Kunihiko Iizuka
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Publication number: 20140035874Abstract: A touch panel controller (3) capable of accurately detecting a change in capacitance includes: a driving section (4) which drives capacitors (C1 through CM) in parallel in accordance with N M-dimensional vectors; and an estimating section (5) which obtains linear sums of the capacitors (C1 through CM) in accordance with the driving in parallel and estimates values of the capacitors (C1 through CM) based on an inner product operation carried out with respect to (i) the linear sums of the capacitors (C1 through CM) and (ii) the N M-dimensional vectors, the driving section (4) driving the capacitors (C1 through CM) in parallel in a first order of the N M-dimensional vectors, the estimating section (5) estimating a first estimated value of the capacitors (C1 through CM) in accordance with the driving in parallel in the first order, the driving section (4) driving the capacitors (C1 through CM) in parallel in a second order of the N M-dimensional vectors, the estimating section (5) estimating a second estimated vaType: ApplicationFiled: January 18, 2012Publication date: February 6, 2014Applicant: SHARP KABUSHIKI KAISHAInventor: Kunihiko Iizuka
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Patent number: 8270535Abstract: An electronic device satisfies: fLO=N×fclk . . . (1); and (N?1)×fclk<fD1<N×fclk<fD2<(N+1)×fclk . . . (2), where: fLO represents a frequency of the local oscillator signal; N represents an integer; fD1 represents a lower limit frequency of the received signal; and fD2 represents an upper limit frequency of the received signal. Even if harmonic components, whose respective frequencies are respective integral multiples of the clock frequency fclk, are mixed as spurious components into a path for a target signal, the harmonic spurious components do not fall within the target wave spectrum observed after the frequency conversion by the mixer. Thus, it is possible to prevent deterioration in reception performance, the deterioration being caused by in-band spurious components arising from higher harmonic waves whose frequencies are respective integral multiples of a clock frequency fclk.Type: GrantFiled: November 19, 2009Date of Patent: September 18, 2012Assignee: Sharp Kabushiki KaishaInventor: Kunihiko Iizuka
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Publication number: 20100177850Abstract: An electronic device satisfies: fLO=N×fclk . . . (1); and (N?1)×fclk<fD1<N×fclk<fD2<(N+1)×fclk . . . (2), where: fLO represents a frequency of the local oscillator signal; N represents an integer; fD1 represents a lower limit frequency of the received signal; and fD2 represents an upper limit frequency of the received signal. Even if harmonic components, whose respective frequencies are respective integral multiples of the clock frequency fclk, are mixed as spurious components into a path for a target signal, the harmonic spurious components do not fall within the target wave spectrum observed after the frequency conversion by the mixer. Thus, it is possible to prevent deterioration in reception performance, the deterioration being caused by in-band spurious components arising from higher harmonic waves whose frequencies are respective integral multiples of a clock frequency fclk.Type: ApplicationFiled: November 19, 2009Publication date: July 15, 2010Inventor: Kunihiko IIZUKA
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Patent number: 7482879Abstract: A variable gain amplifier is provided that can obtain a wide range of gain variation and suppress the deterioration of linearity when switching between amplifying transistors. The variable gain amplifier includes a plurality of cascode amplifiers each including an amplifying transistor and a plurality of cascode transistors connected in a cascode arrangement to an output terminal of the amplifying transistor. The plurality of cascode amplifiers are connected through attenuators. The variable gain amplifier further includes a first controller that controls ON/OFF operations of the plurality of cascode transistors included in each cascode amplifier; and a second controller that controls ON/OFF operations of a plurality of amplifying transistors, only one of which is included in each of the plurality of cascode amplifiers, such that only selected one of the plurality of amplifying transistors is turned on.Type: GrantFiled: December 8, 2006Date of Patent: January 27, 2009Assignee: Sharp Kabushiki KaishaInventors: Masato Koutani, Kunihiko Iizuka, Hiroshi Kawamura
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Voltage-current conversion circuit, amplifier, mixer circuit, and mobile appliance using the circuit
Patent number: 7417486Abstract: A cross-coupled low-distortion voltage-current conversion circuit has transistors T1 to T6. At least one of the transistors has parallel connections of two or more transistors. By arbitrarily setting the number of parallel connections of the transistors T1 to T6, the current distributions of the circuits are optimized while maintaining the conventional low-distortion operation. The invention finds applications in amplifiers and mixers that need to be operated with low distortion and low power consumption. The invention provides a cross-coupled low-distortion voltage-current conversion circuit that has freedom of design and improved performance without increasing power consumption over the entire circuit.Type: GrantFiled: September 28, 2005Date of Patent: August 26, 2008Assignee: Sharp Kabushiki KaishaInventors: Masato Koutani, Kunihiko Iizuka -
Patent number: 7346327Abstract: A wireless receiving circuit includes a mixer, a buffer, an active low-pass filter, and a second order passive low-pass filter which are connected between a signal input terminal and a signal output terminal. The second order passive low-pass filter is for removing an interfering wave that cannot be removed by the active low-pass filter. In the wireless receiving circuit, a first capacitor and a second capacitor are provided. The first capacitor has one terminal connected to an input terminal of the buffer and the other terminal grounded. The second capacitor has one terminal connected to an output terminal of the buffer and the other terminal grounded. These two kinds of capacitors function as the second order passive low-pass filter by being combined with input and output impedance of elements provided on the upstream side and downstream side of the capacitors.Type: GrantFiled: February 22, 2005Date of Patent: March 18, 2008Assignee: Sharp Kabushiki KaishaInventors: Shuichi Kawama, Kunihiko Iizuka
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Patent number: 7330521Abstract: A correlator which can be adapted to a receiver for impulse radio includes a multiplier for multiplying a received impulse train by a received template train, an analog integrator for integrating the result of the multiplication, and a quantizer quantizing the result of the integration, which result is supplied to a digital integrator. An adder is provided on the input side of the analog integrator, and a negative feedback path negatively feeds the result of the quantization back to the analog integrator via the adder. Quantization errors occurring in the quantizer are negatively fed back to the analog integrator and thereby integrated, then quantized by the quantizer again. As a result, it is possible to reduce quantization errors and to improve the S/N ratio.Type: GrantFiled: July 25, 2003Date of Patent: February 12, 2008Assignee: Sharp Kabushiki KaishaInventor: Kunihiko Iizuka
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Publication number: 20070222515Abstract: A variable gain amplifier is provided that can obtain a wide range of gain variation and suppress the deterioration of linearity when switching between amplifying transistors. The variable gain amplifier includes a plurality of cascode amplifiers each including an amplifying transistor and a plurality of cascode transistors connected in a cascode arrangement to an output terminal of the amplifying transistor. The plurality of cascode amplifiers are connected through attenuators. The variable gain amplifier further includes a first controller that controls ON/OFF operations of the plurality of cascode transistors included in each cascode amplifier; and a second controller that controls ON/OFF operations of a plurality of amplifying transistors, only one of which is included in each of the plurality of cascode amplifiers, such that only selected one of the plurality of amplifying transistors is turned on.Type: ApplicationFiled: December 8, 2006Publication date: September 27, 2007Applicant: Sharp Kabushiki KaishaInventors: Masato Koutani, Kunihiko Iizuka, Hiroshi Kawamura
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Patent number: 7154427Abstract: A circuit including analog circuits processes an analog input signal. Further, the circuit including the analog circuits sends a coefficient to a coefficient detection/control circuit. The coefficient is indicative of a predetermined property of each of the analog circuits provided in the circuit. The coefficient detection/control circuit processes and detects the coefficient as a signal, with the result that the property of the analog circuit is detected. Then, the coefficient detection/control circuit sends a control signal to the circuit including the analog circuits. The control signal is generated according to a result of the detection of the coefficient. In accordance with the control signal, the coefficient detection/control circuit adjusts an operation state of the analog circuit so as to control an operation of the circuit including the analog circuits. The coefficient is sent from an external output terminal to outside.Type: GrantFiled: October 6, 2005Date of Patent: December 26, 2006Assignee: Sharp Kabushiki KaishaInventors: Hirofumi Matsui, Kunihiko Iizuka
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Patent number: 7137102Abstract: A program development device providing functions of developing a unitarily designed application program even when utilizing components, in which a multiplicity of interfaces can be used, and a multiplicity of combinations of these components can be provided. The program development device for developing the application program by use of the component having the plurality of interfaces, includes a component selecting module for having the component selected, an interface selection module for having the interface selected for the selected component, and setting the selected interface in a valid or invalid state, a recording unit for retaining a set record of having set the interface in the valid or invalid state, and a edit module for supporting the development of the program by use of the interface set in the valid state or the interface that is not set in the invalid state in accordance with the set record.Type: GrantFiled: February 20, 2001Date of Patent: November 14, 2006Assignee: Fujitsu LimitedInventor: Kunihiko Iizuka
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Publication number: 20060077088Abstract: A circuit including analog circuits processes an analog input signal. Further, the circuit including the analog circuits sends a coefficient to a coefficient detection/control circuit. The coefficient is indicative of a predetermined property of each of the analog circuits provided in the circuit. The coefficient detection/control circuit processes and detects the coefficient as a signal, with the result that the property of the analog circuit is detected. Then, the coefficient detection/control circuit sends a control signal to the circuit including the analog circuits. The control signal is generated according to a result of the detection of the coefficient. In accordance with the control signal, the coefficient detection/control circuit adjusts an operation state of the analog circuit so as to control an operation of the circuit including the analog circuits. The coefficient is sent from an external output terminal to outside.Type: ApplicationFiled: October 6, 2005Publication date: April 13, 2006Inventors: Hirofumi Matsui, Kunihiko Iizuka
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Voltage-current conversion circuit, amplifier, mixer circuit, and mobile appliance using the circuit
Publication number: 20060066362Abstract: A cross-coupled low-distortion voltage-current conversion circuit has transistors T1 to T6. At least one of the transistors has parallel connections of two or more transistors. By arbitrarily setting the number of parallel connections of the transistors T1 to T6, the current distributions of the circuits are optimized while maintaining the conventional low-distortion operation. The invention finds applications in amplifiers and mixers that need to be operated with low distortion and low power consumption. The invention provides a cross-coupled low-distortion voltage-current conversion circuit that has freedom of design and improved performance without increasing power consumption over the entire circuit.Type: ApplicationFiled: September 28, 2005Publication date: March 30, 2006Applicant: SHARP KABUSHIKI KAISHAInventors: Masato Koutani, Kunihiko Iizuka