Abstract: A filtering panel includes a molding layer part; a pattern layer part having an incident surface through which light emitted from a light source and viewing light transmitted to an observer enter, and an accommodation surface which is the reverse surface of the incident surface, wherein the molding layer part is stacked on the incident surface so as to be adjacent thereto, and the pattern layer part adjusts the optical paths of the emitted light and the viewing light; and a filtering layer part formed on a lower incident surface of the pattern layer part having the incident surface of the viewing light that enters from a lower region below a horizontal reference line, wherein the reflectivity of the visible light in the viewing light incident on the lower region is made greater than that of an upper region above the reference line by means of mirror reflection.

Abstract: An integrated circuit (IC) device includes a semiconductor substrate having a via hole extending through at least a part thereof, a conductive structure in the via hole, a conductive barrier layer adjacent the conductive structure; and a via insulating layer interposed between the semiconductor substrate and the conductive barrier layer. The conductive barrier layer may include an outer portion oxidized between the conductive barrier layer and the via insulating layer, and the oxidized outer portion of the conductive barrier layer may substantially surrounds the remaining portion of the conductive barrier layer.

Abstract: A method of manufacturing a semiconductor package includes providing a substrate including a mounting region having a recess space for accommodating a semiconductor chip and a connection region surrounding the mounting region, providing a semiconductor chip in the mounting region, the semiconductor chip including a connection pad provided on a top surface of the semiconductor chip, forming a protective layer covering a top surface of the substrate and the top surface of the semiconductor chip, forming a photosensitive insulating layer on the protective layer after forming the protective layer, patterning the photosensitive insulating layer thereby exposing the protective layer, removing the exposed protective layer, and forming a redistribution line to be electrically connected to the connection pad.

Abstract: An integrated circuit (IC) device includes a semiconductor substrate having a via hole extending through at least a part thereof, a conductive structure in the via hole, a conductive barrier layer adjacent the conductive structure; and a via insulating layer interposed between the semiconductor substrate and the conductive barrier layer. The conductive barrier layer may include an outer portion oxidized between the conductive barrier layer and the via insulating layer, and the oxidized outer portion of the conductive barrier layer may substantially surrounds the remaining portion of the conductive barrier layer.

Abstract: An integrated circuit (IC) device includes a semiconductor substrate having a via hole extending through at least a part thereof, a conductive structure in the via hole, a conductive barrier layer adjacent the conductive structure; and a via insulating layer interposed between the semiconductor substrate and the conductive barrier layer. The conductive barrier layer may include an outer portion oxidized between the conductive barrier layer and the via insulating layer, and the oxidized outer portion of the conductive barrier layer may substantially surrounds the remaining portion of the conductive barrier layer.

Abstract: A method of manufacturing a semiconductor package includes providing a substrate including a mounting region having a recess space for accommodating a semiconductor chip and a connection region surrounding the mounting region, providing a semiconductor chip in the mounting region, the semiconductor chip including a connection pad provided on a top surface of the semiconductor chip, forming a protective layer covering a top surface of the substrate and the top surface of the semiconductor chip, forming a photosensitive insulating layer on the protective layer after forming the protective layer, patterning the photosensitive insulating layer thereby exposing the protective layer, removing the exposed protective layer, and forming a redistribution line to be electrically connected to the connection pad.

Abstract: A shielding unit for a plating apparatus may include a shielding plate, a controlling plate and a rotary actuator. The shielding plate may have a plurality of holes configured to permit a passage of an electrolyte therethrough. The controlling plate may make contact with the shielding plate. The controlling plate may have a plurality of controlling holes for controlling an opening ratio of the plurality of holes of the shielding plate. The rotary actuator may rotate the controlling plate to control the opening ratio of the plurality of holes shielding plate.

Abstract: An integrated circuit device including a through-silicon-via (TSV) structure and methods of manufacturing the same are provided. The integrated circuit device may include the TSV structure penetrating through a semiconductor structure. The TSV structure may include a first through electrode unit including impurities of a first concentration and a second through electrode unit including impurities of a second concentration greater than the first concentration.

Abstract: An integrated circuit (IC) device includes a semiconductor substrate having a via hole extending through at least a part thereof, a conductive structure in the via hole, a conductive barrier layer adjacent the conductive structure; and a via insulating layer interposed between the semiconductor substrate and the conductive barrier layer. The conductive barrier layer may include an outer portion oxidized between the conductive barrier layer and the via insulating layer, and the oxidized outer portion of the conductive barrier layer may substantially surrounds the remaining portion of the conductive barrier layer.

Abstract: A semiconductor device is provided having an insulating layer on a semiconductor substrate. The insulating layer and the semiconductor substrate define a through hole penetrating the semiconductor substrate and the insulating layer. A through electrode is provided in the through hole. A spacer is provided between the semiconductor substrate and the through electrode. An interconnection in continuity with the through electrode is provided on the insulating layer. A barrier layer covering a side and a bottom of the interconnection and a side of the through electrode is provided and the barrier layer is formed in one body.

Abstract: An integrated circuit device includes a substrate through which a first through-hole extends, and an interlayer insulating film on the substrate, the interlayer insulating film having a second through-hole communicating with the first through-hole. A Through-Silicon Via (TSV) structure is provided in the first through-hole and the second through-hole. The TSV structure extends to pass through the substrate and the interlayer insulating film. The TSV structure comprises a first through-electrode portion having a top surface located in the first through-hole, and a second through-electrode portion having a bottom surface contacting with the top surface of the first through-electrode portion and extending from the bottom surface to at least the second through-hole. Related fabrication methods are also described.

Abstract: Provided are electrode-connecting structures or semiconductor devices, including a lower device including a lower substrate, a lower insulating layer formed on the lower substrate, and a lower electrode structure formed in the lower insulating layer, wherein the lower electrode structure includes a lower electrode barrier layer and a lower metal electrode formed on the lower electrode barrier layer, and an upper device including an upper substrate, an upper insulating layer formed under the upper substrate, and an upper electrode structure formed in the upper insulating layer, wherein the upper electrode structure includes an upper electrode barrier layer extending from the inside of the upper insulating layer under a bottom surface thereof and an upper metal electrode formed on the upper electrode barrier layer. The lower metal electrode is in direct contact with the upper metal electrode.

Abstract: A semiconductor device is provided having an insulating layer on a semiconductor substrate. The insulating layer and the semiconductor substrate define a through hole penetrating the semiconductor substrate and the insulating layer. A through electrode is provided in the through hole. A spacer is provided between the semiconductor substrate and the through electrode. An interconnection in continuity with the through electrode is provided on the insulating layer. A barrier layer covering a side and a bottom of the interconnection and a side of the through electrode is provided and the barrier layer is formed in one body.

Abstract: Provided are a semiconductor device, a method of manufacturing the same, and a semiconductor package including the same. The semiconductor device includes: a substrate having a recess region in a predetermined portion of a back side of the substrate; a wiring part disposed on a front side of the substrate and including at least one wiring layer; an insulating layer disposed on the back side of the substrate and including a first portion filling in the recess region and a second portion covering the back side of the substrate of a non-recess region other than the recess region; and a through silicon via (TSV) provided in plurality of and penetrating the first portion to be electrically connected to the at least one wiring layer.

Abstract: An integrated circuit device including a through-silicon-via (TSV) structure and methods of manufacturing the same are provided. The integrated circuit device may include the TSV structure penetrating through a semiconductor structure. The TSV structure may include a first through electrode unit including impurities of a first concentration and a second through electrode unit including impurities of a second concentration greater than the first concentration.

Abstract: An integrated circuit device includes a substrate through which a first through-hole extends, and an interlayer insulating film on the substrate, the interlayer insulating film having a second through-hole communicating with the first through-hole. A Through-Silicon Via (TSV) structure is provided in the first through-hole and the second through-hole. The TSV structure extends to pass through the substrate and the interlayer insulating film. The TSV structure comprises a first through-electrode portion having a top surface located in the first through-hole, and a second through-electrode portion having a bottom surface contacting with the top surface of the first through-electrode portion and extending from the bottom surface to at least the second through-hole. Related fabrication methods are also described.

Abstract: Disclosed herein is a system for managing chemicals using Radio-Frequency Identification (RFID). A storage facility identification tag, attached to a chemical storage facility in a laboratory, stores the unique identification code of the chemical storage facility and a list of chemicals. A chemical identification tag, attached to the cover of a chemical container, stores the unique identification code of the chemical storage facility and chemical-related information. A mobile terminal, provided with an RFID reader, receives and outputs the unique identification code of the chemical storage facility, the list of the chemicals, and the chemical-related information.

Abstract: In methods of manufacturing capacitors, a first metal compound may be deposited on a substrate using first and second source gases. The first and the second source gases may be provided onto the substrate by a first flow rate ratio in which a deposition rate of the first metal compound by surface reaction between the source gases is higher than that by mass transfer between the source gases. A second metal compound may be deposited on the first metal compound and undesired materials may be removed by providing the source gases with a second flow rate ratio different from the first flow rate ratio. Depositing the first and the second metal compounds may be repeated to form a lower electrode. A dielectric layer and an upper electrode may be formed on the lower electrode. Accordingly, permeation of an etching liquid or gas may be reduced during an etching process.

Abstract: A method of forming a ferroelectric capacitor includes forming a lower electrode on a substrate. The lower electrode is oxidized to form a metal oxide film. A ferroelectric film is formed on the metal oxide film while reduction of the oxygen content of the metal oxide film is inhibited. An upper electrode is formed on the ferroelectric film.

Abstract: In a method of processing a semiconductor substrate, a source gas is primarily excited into a first plasma state having a first energy. The primarily excited source gas is provided to a process chamber. The excited source gas in the process chamber is secondarily excited into a second plasma state having a second energy higher than the first energy. The secondarily excited source gas contacts a semiconductor substrate to process the semiconductor substrate.