Abstract: A semiconductor device includes a substrate having a semiconductor fin. A gate structure is over the semiconductor fin, in which the gate structure has a tapered profile and comprises a gate dielectric. A work function metal layer is over the gate dielectric, and a filling metal is over the work function metal layer. A gate spacer is along a sidewall of the gate structure, in which the work function metal layer is in contact with the gate dielectric and a top portion of the gate spacer. An epitaxy structure is over the semiconductor fin.

Abstract: In some embodiments, the present application provides an integrated chip. The integrated chip includes a chip comprising a semiconductor device. A shielding structure abuts the chip. The shielding structure comprises a first horizontal region adjacent to a first horizontal surface of the chip. The first horizontal region comprises a first multilayer structure comprising a first dielectric layer and two or more metal layers. The first dielectric layer is disposed between the two or more metal layers.

Abstract: One aspect of the present disclosure pertains to an integrated (IC) structure. The IC structure includes a semiconductor substrate; an interconnect structure formed over the substrate; and a redistribution layer (RDL) structure formed over the interconnect structure. The RDL structure includes: a RDL pad portion having a pad via array with multiple vias landing on a first top metal line of the interconnect structure; a RDL signal routing portion having a signal routing via landing on a second top metal line of the interconnect structure; and a RDL top portion over the RDL pad portion and the RDL signal routing portion. The multiple vias of the pad via array include a block via and an adjacent sacrificial via, the block via having a block via width, the sacrificial via having a sacrificial via width, and the block via width is greater than the sacrificial via width.

Abstract: A passive radiator module includes a cavity and two passive radiators, and the two passive radiators are disposed on an upper surface and a lower surface of the cavity respectively. Each of the two passive radiators includes a hang edge, a surrounding part and a diaphragm, the surrounding part surrounds the diaphragm, and the surrounding part is positioned between the hang edge and the diaphragm. Each of the upper surface and the lower surface includes a hollow part, the hang edge of any one of the two passive radiators is connected to a corresponding one of the upper surface and the lower surface, and the diaphragm of said any one of the two passive radiators is positioned in the hollow part of the corresponding one of the upper surface and the lower surface.

Abstract: A semiconductor device includes a substrate having a semiconductor fin. A gate structure is over the semiconductor fin, in which the gate structure has a tapered profile and comprises a gate dielectric. A work function metal layer is over the gate dielectric, and a filling metal is over the work function metal layer. A gate spacer is along a sidewall of the gate structure, in which the work function metal layer is in contact with the gate dielectric and a top portion of the gate spacer. An epitaxy structure is over the semiconductor fin.

Abstract: A photolithography system utilizes tin droplets to generate extreme ultraviolet radiation for photolithography. The photolithography system irradiates the droplets with a laser. The droplets become a plasma and emit extreme ultraviolet radiation. The photolithography system senses contamination of a collector mirror by the tin droplets and adjusts the flow of a buffer fluid to reduce the contamination.

Abstract: Methods and semiconductor structures are provided. A semiconductor structure according to the present disclosure includes a plurality of transistors, an interconnect structure electrically coupled to the plurality of transistors, a metal feature disposed over the interconnect structure and electrically isolated from the plurality of transistors, an insulation layer disposed over the metal feature, and a first redistribution feature and a second redistribution feature disposed over the insulation layer. A space between the first redistribution feature and the second redistribution feature is disposed directly over at least a portion of the metal feature.

Abstract: Methods and semiconductor structures are provided. A semiconductor structure according to the present disclosure includes a plurality of transistors, an interconnect structure electrically coupled to the plurality of transistors, a metal feature disposed over the interconnect structure and electrically isolated from the plurality of transistors, an insulation layer disposed over the metal feature, and a first redistribution feature and a second redistribution feature disposed over the insulation layer. A space between the first redistribution feature and the second redistribution feature is disposed directly over at least a portion of the metal feature.

Abstract: An on line prediction method of part surface roughness based on SDAE-DBN algorithm. The tri-axis acceleration sensor is adsorbed on the rear bearing of the machine tool spindle through the magnetic seat to collect the vibration signals of the cutting process, and a microphone is placed in the left front of the processed part to collect the noise signals of the cutting process of the machine tool; the trend term of dynamic signal is eliminated, and the signal is smoothed; a stacked denoising autoencoder is constructed, and the greedy algorithm is used to train the network, and the extracted features are used as the input of deep belief network to train the network; the real-time vibration and noise signals in the machining process are input into the deep network after data processing, and the current surface roughness is set as output by the network.

Abstract: A contamination detection and auto-cleaning equipment and a method using the same are provided. The contamination detection and auto-cleaning equipment includes a contamination detection device and an automatic cleaning device. The contamination detection device is configured for detecting a cleanliness of a sample container. The automatic cleaning device is configured for cleaning the sample container. The contamination detection device includes a light emitter, a detection-light receiver and a controller. The light emitter is configured for emitting an emission light, wherein the emission light becomes a detection light after traveling through the sample container. The detection-light receiver is configured for receiving the detection light to obtain a detection-light intensity. The controller is coupled to the light emitter and the detection-light receiver, and obtain the cleanliness of the sample container according to a variation of the detection-light intensity.

Abstract: The present disclosure is a generator with balanced and controlled attractions among magnets and iron cores. Therefore, this generator has minimal to non-existent rotation resistance on the axis when it is rotated to produce electricity. The magnet fields formed among iron cores with coils are not affected by the balanced attractions among magnets and iron cores. As a result, this generator requires much less mechanical energy input to run for electricity output.

Abstract: The present invention proposes an in-situ freezing machining method for an integrated thin-walled array structure. In the method, the area among cups is cut off first; then, the outer walls of a cup array are machined; and finally, water filling and freezing are carried out, and in-situ freezing machining of the inner walls of the cup array is carried out. Then, hoisting and turning over are carried out, and the area among cavities is cut off; then, the outer walls of a cavity array are machined; and finally, water filling and freezing are carried out, and in-situ freezing machining of the inner walls of the cavity array is carried out. The method realizes in-situ freezing clamping of workpieces, avoids error accumulation caused by repeated installation of a fixture, and can refrigerate efficiently, suppress ambient and cutting thermal interference, and ensure the stability of freezing fixture.

Abstract: Devices and method for forming a shielding assembly including a first chip package structure sensitive to magnetic interference (MI), a second chip package structure sensitive to electromagnetic interference (EMI), and a shield surrounding sidewalls and top surfaces of the first chip package structure and the second chip package structure, in which the shield is a magnetic shielding material. In some embodiments, the shield may include silicon steel, in some embodiments, the shield may include Mu-metal. The silicon-steel-based or Mu-metal-based shield may provide both EMI and MI protection to multiple chip package structures with various susceptibilities to EMI and MI.

Abstract: The present invention proposes an in-situ freezing machining method for an integrated thin-walled array structure. In the method, the area among cups is cut off first; then, the outer walls of a cup array are machined; and finally, water filling and freezing are carried out, and in-situ freezing machining of the inner walls of the cup array is carried out. Then, hoisting and turning over are carried out, and the area among cavities is cut off; then, the outer walls of a cavity array are machined; and finally, water filling and freezing are carried out, and in-situ freezing machining of the inner walls of the cavity array is carried out. The method realizes in-situ freezing clamping of workpieces, avoids error accumulation caused by repeated installation of a fixture, and can refrigerate efficiently, suppress ambient and cutting thermal interference, and ensure the stability of freezing fixture.

Abstract: A photolithography system utilizes tin droplets to generate extreme ultraviolet radiation for photolithography. The photolithography system irradiates the droplets with a laser. The droplets become a plasma and emit extreme ultraviolet radiation. The photolithography system senses contamination of a collector mirror by the tin droplets and adjusts the flow of a buffer fluid to reduce the contamination.

Abstract: A method for forming a semiconductor device structure is provided. The method includes providing a substrate, a fin, and a semiconductor layer. The fin is over the substrate, the semiconductor layer is over the fin, the substrate and the fin are made of different materials, and the fin and the semiconductor layer are made of different materials. The method includes forming a dielectric layer over the semiconductor layer and the fin. The method includes forming a semiconductor structure over a sidewall of the dielectric layer. The method includes removing a first top portion of the dielectric layer over a top surface of the semiconductor layer. The method includes forming a gate over the semiconductor layer, the dielectric layer, and the semiconductor structure.

Abstract: In some embodiments, the present application provides an integrated chip. The integrated chip includes a chip comprising a semiconductor device. A shielding structure abuts the chip. The shielding structure comprises a first horizontal region adjacent to a first horizontal surface of the chip. The first horizontal region comprises a first multilayer structure comprising a first dielectric layer and two or more metal layers. The first dielectric layer is disposed between the two or more metal layers.

Abstract: A photolithography system utilizes tin droplets to generate extreme ultraviolet radiation for photolithography. The photolithography system irradiates the droplets with a laser. The droplets become a plasma and emit extreme ultraviolet radiation. The photolithography system senses contamination of a collector mirror by the tin droplets and adjusts the flow of a buffer fluid to reduce the contamination.

Abstract: A prediction method of part surface roughness and tool wear based on multi-task learning belong to the file of machining technology. Firstly, the vibration signals in the machining process are collected; next, the part surface roughness and tool wear are measured, and the measured results are corresponding to the vibration signals respectively; secondly, the samples are expanded, the features are extracted and normalized; then, a multi-task prediction model based on deep belief networks (DBN) is constructed, and the part surface roughness and tool wear are taken as the output of the model, and the features are extracted as the input to establish the multi-task DBN prediction model; finally, the vibration signals are input into the multi-task prediction model to predict the surface roughness and tool wear.

Abstract: In some embodiments, the present application provides a method for manufacture a memory device. The method includes forming a multilayer stack including a first magnetic layer and a first dielectric layer and forming another magnetic layer. The multilayer stack and the another magnetic layer are tailored to meet dimensions of a package structure. The package structure includes a chip having a memory cell and an insulating material enveloping the chip, where an outer surface of the package structure comprises the insulating material. The tailored multilayer stack and the tailored another magnetic layer are attached to the outer surface of the package structure.