Abstract: A semiconductor device structure, along with methods of forming such, are described. The semiconductor device structure includes a first dielectric feature extending along a first direction, the first dielectric feature comprising a first dielectric layer having a first sidewall and a second sidewall opposing the first sidewall, a first semiconductor layer disposed adjacent the first sidewall, the first semiconductor layer extending along a second direction perpendicular to the first direction, a second dielectric feature extending along the first direction, the second dielectric feature disposed adjacent the first semiconductor layer, and a first gate electrode layer surrounding at least three surfaces of the first semiconductor layer, and a portion of the first gate electrode layer is exposed to a first air gap.

Abstract: Semiconductor structures and methods for forming the same are provided. The semiconductor structure includes a plurality of first nanostructures formed over a substrate, and a dielectric wall adjacent to the first nanostructures. The semiconductor structure also includes a first liner layer between the first nanostructures and the dielectric wall, and the first liner layer is in direct contact with the dielectric wall. The semiconductor structure also includes a gate structure surrounding the first nanostructures, and the first liner layer is in direct contact with a portion of the gate structure.

Abstract: A method for forming a semiconductor device is provided. The method includes forming a plurality of first channel nanostructures and a plurality of second channel nanostructures in an n-type device region and a p-type device region of a substrate, respectively, and sequentially depositing a gate dielectric layer, an n-type work function metal layer, and a cap layer surrounding each of the first and second channel nanostructures. The cap layer merges in first spaces between adjacent first channel nanostructures and merges in second spaces between adjacent second channel nanostructures. The method further includes selectively removing the cap layer and the n-type work function metal layer in the p-type device region, and depositing a p-type work function metal layer over the cap layer in the n-type device region and the gate dielectric layer in the p-type device region. The p-type work function metal layer merges in the second spaces.

Abstract: A semiconductor device and a method for manufacturing the semiconductor device are provided. The semiconductor device comprises a substrate and a wafer disposed on the substrate. The wafer includes a p-doped layer disposed on the substrate; a first diode disposed on the p-doped layer; a second diode disposed on the p-doped layer; a third diode disposed on the p-doped layer; and a dielectric layer disposed on the substrate and covering the first, second, and third diodes. The first, second, and third diodes are disposed side by side.

Abstract: Some implementations described herein include systems and techniques for fabricating a wafer-on-wafer product using a filled lateral gap between beveled regions of wafers included in a stacked-wafer assembly and along a perimeter region of the stacked-wafer assembly. The systems and techniques include a deposition tool having an electrode with a protrusion that enhances an electromagnetic field along the perimeter region of the stacked-wafer assembly during a deposition operation performed by the deposition tool. Relative to an electromagnetic field generated by a deposition tool not including the electrode with the protrusion, the enhanced electromagnetic field improves the deposition operation so that a supporting fill material may be sufficiently deposited.

Abstract: A first packet flow and a second packet flow support a first protocol, a third packet flow and a fourth packet flow support a second protocol, and a priority of the first protocol is lower than a priority of the second protocol. The first packet flow and the third packet flow are transmitted from a first ingress port to a first egress port. The second packet flow and the fourth packet flow are transmitted from a second ingress port to a second egress port. When the packet processing device is in a congested state, a bandwidth modulator performs a first suppression process on the first packet flow at the first ingress port, and the bandwidth modulator performs a second suppression process on the second packet flow at the second egress port or on the third packet flow at the first ingress port.

Abstract: A communication device which is configured to receive a data flow includes a monitor port and a packet processor. The monitor port is configured to receive a packet of the data flow. The packet processor is coupled to the monitor port, and the packet processor is configured to compute a digest value of the packet and compute an identification code of the packet according to the digest value of the packet, and the packet processor searches a status value associated with the identification code in a lookup table so as to determine whether a dropping event of the data flow is recorded.

Abstract: A time-division multiplexing (TDM) scheduler determines a service order for serving N packet transmission requesters. The TDM scheduler includes: N current count value generators configured to serve the N packet transmission requesters respectively, and generate N current count values according to parameters of the N packet transmission requesters, a previous scheduling result generated by the EDD scheduler previously, and a predetermined counting rule; and an earliest due date (EDD) scheduler configured to generate a current scheduling result for determining the service order according to the N current count values and a predetermined urgency decision rule, wherein an extremum of the N current count values relates to one of the N packet transmission requesters, and the EDD scheduler selects this requester as the one to be served preferentially.

Abstract: A method and a system for processing a data flow with an incomplete comparison process are provided. The method is implemented by a network device that includes a flow table and a flow filter in a memory thereof. A flow analyzing module is provided for analyzing and classifying packets of an input flow, and identifying an application category to which the input flow belongs. The flow table is queried according to a result of resolving the input flow for determining whether the input flow matches any flow entry of the flow table. The flow filter is queried if the input flow fails to match any flow entry of the flow table for determining whether features of the input flow match conditions of the flow filter. The input flow is processed accordingly, without needing to copy all flows that do not match the flow entries to the flow table.

Abstract: Disclosed is a data flow classification device including a forwarding circuit and a configuring circuit. The forwarding circuit looks the classification of an input flow up in a lookup table according to the information of the input flow, tags the packets of the input flow with the classification, and outputs the packets to a buffer circuit. The configuring circuit receives and stores the identification and traffic information of multiple flows, and accordingly calculates the traffic of the multiple flows, wherein the multiple flows include the input flow. The configuring circuit further determines an elephant flow threshold according to a queue length of the buffer circuit and a target length, determines the classifications of the multiple flows according to the comparison between the traffic of the multiple flows and the elephant flow threshold, and stores these classifications in the lookup table.

Abstract: A device for packet processing acceleration includes a CPU, a tightly coupled memory (TCM), a buffer descriptor (BD) prefetch circuit, and a BD write back circuit. The BD prefetch circuit reads reception-end (RX) BDs from an RX BD ring of a memory to write them into an RX ring of the TCM, and reads RX header data from a buffer of the memory to write them into the RX ring. The CPU accesses the RX ring to process the RX BDs and RX header data, and generates transmission-end (TX) BDs and TX header data; afterwards, the CPU writes the TX BDs and TX header data into a TX ring of the TCM. The BD write back circuit reads the TX BDs and TX header data from the TX ring, writes the TX BDs into a TX BD ring of the memory, and writes the TX header data into the buffer.

Abstract: A replication list table structure for multicast packet replication is provided. The replication list table structure includes a plurality of entries. Each one of the plurality of entries includes a first field, a second field, a third field and a fourth field. For each one of the plurality of entries, the first field is used to declare whether the entry is an end of a program execution, the second field is used to declare the fourth field as a first type field for indicating a switch how to modify a header of a multicast packet, or as a second type field for indicating the switch, while reading the list, to jump to another one of the plurality entries, and the third field is preset to the first type field for indicating the switch how to modify the header of the multicast packet.

Abstract: The present invention discloses a mesh network system having data flow transmission sorting mechanism that includes station devices, mesh network devices and a portal network apparatus.

Abstract: A time-division multiplexing (TDM) scheduler determines a service order for serving N packet transmission requesters. The TDM scheduler includes: N current count value generators configured to serve the N packet transmission requesters respectively, and generate N current count values according to parameters of the N packet transmission requesters, a previous scheduling result generated by the EDD scheduler previously, and a predetermined counting rule; and an earliest due date (EDD) scheduler configured to generate a current scheduling result for determining the service order according to the N current count values and a predetermined urgency decision rule, wherein an extremum of the N current count values relates to one of the N packet transmission requesters, and the EDD scheduler selects this requester as the one to be served preferentially.

Abstract: A data flow classification device includes a forwarding circuit and a configuring circuit. The forwarding circuit looks the classification of an input flow up in a lookup table according to the information of the input flow, tags the packets of the input flow with the classification, and outputs the packets to a buffer circuit; but if the classification is not found in the lookup table, the forwarding circuit tags the packets with a predetermined classification, outputs the packets to the buffer circuit, and adds the information of the input flow to the lookup table. The configuring circuit determines a flow threshold according to a queue length of the buffer circuit and a target length, learns the traffic of multiple flows from the lookup table, determines the classifications of the multiple flows according to the comparison between the traffic and the flow threshold, and stores these classifications in the lookup table.

Abstract: Disclosed is a time-division multiplexing (TDM) scheduler capable of determining a service order for serving N packet transmission requesters. The TDM scheduler includes: N current count value generators configured to serve the N packet transmission requesters respectively, and generate N current count values according to parameters of the N packet transmission requesters, a previous scheduling result generated by the EDD scheduler previously, and a predetermined counting rule; and an earliest due date (EDD) scheduler configured to generate a current scheduling result for determining the service order according to the N current count values and a predetermined urgency decision rule, wherein an extremum of the N current count values relates to one of the N packet transmission requesters, and the EDD scheduler selects this requester as the one to be served preferentially.

Abstract: A method and a system for processing a data flow with an incomplete comparison process are provided. The method is implemented by a network device that includes a flow table and a flow filter in a memory thereof. A flow analyzing module is provided for analyzing and classifying packets of an input flow, and identifying an application category to which the input flow belongs. The flow table is queried according to a result of resolving the input flow for determining whether the input flow matches any flow entry of the flow table. The flow filter is queried if the input flow fails to match any flow entry of the flow table for determining whether features of the input flow match conditions of the flow filter. The input flow is processed accordingly, without needing to copy all flows that do not match the flow entries to the flow table.

Abstract: Disclosed is a data flow classification device including a forwarding circuit and a configuring circuit. The forwarding circuit looks the classification of an input flow up in a lookup table according to the information of the input flow, tags the packets of the input flow with the classification, and outputs the packets to a buffer circuit. The configuring circuit receives and stores the identification and traffic information of multiple flows, and accordingly calculates the traffic of the multiple flows, wherein the multiple flows include the input flow. The configuring circuit further determines an elephant flow threshold according to a queue length of the buffer circuit and a target length, determines the classifications of the multiple flows according to the comparison between the traffic of the multiple flows and the elephant flow threshold, and stores these classifications in the lookup table.

Abstract: A data flow classification device includes a forwarding circuit and a configuring circuit. The forwarding circuit looks the classification of an input flow up in a lookup table according to the information of the input flow, tags the packets of the input flow with the classification, and outputs the packets to a buffer circuit; but if the classification is not found in the lookup table, the forwarding circuit tags the packets with a predetermined classification, outputs the packets to the buffer circuit, and adds the information of the input flow to the lookup table. The configuring circuit determines a flow threshold according to a queue length of the buffer circuit and a target length, learns the traffic of multiple flows from the lookup table, determines the classifications of the multiple flows according to the comparison between the traffic and the flow threshold, and stores these classifications in the lookup table.

Abstract: The present invention provides a circuit within a switch, wherein the circuit includes a memory and a control circuit. The memory includes at least a first area and a second area, the first area is used to provide a minimum guaranteed storage space for each of a plurality of egress queues, the second area is used to provide a shared space of the plurality of egress queues. The control circuit is coupled to the memory, and when an input port of the switch receives an input packet and stores the input packet into the memory, the control circuit dynamically determines a size of the second area according to a number of the egress queues that the input packet is forwarded to.