Patents by Inventor Kuo Chung
Kuo Chung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11804457Abstract: A package structure has a first die, a second die, the third die, a molding compound, a first redistribution layer, an antenna and conductive elements. The first die, the second die and the third die are molded in a molding compound. The first redistribution layer is disposed on the molding compound and is electrically connected to the first die, the second die and the third die. The antenna is located on the molding compound and electrically connected to the first die, the second die and the third die, wherein a distance of an electrical connection path between the first die and the antenna is smaller than or equal to a distance of an electrical connection path between the second die and the antenna and a distance of an electrical connection path between the third die and the antenna. The conductive elements are connected to the first redistribution layer, wherein the first redistribution layer is located between the conductive elements and the molding compound.Type: GrantFiled: April 1, 2021Date of Patent: October 31, 2023Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chen-Hua Yu, Kuo-Chung Yee
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Publication number: 20230343677Abstract: A semiconductor structure includes a dielectric layer, a conductive pad embedded in the dielectric layer, a semiconductor substrate disposed on the dielectric layer and including a via opening with a notch in proximity to the dielectric layer, a through substrate via (TSV) disposed in the via opening of the semiconductor substrate and extending into the dielectric layer to land on the conductive pad, and a dielectric liner disposed in the via opening of the semiconductor substrate and filling the notch to laterally separate the TSV from the semiconductor substrate. A surface of the dielectric liner facing the TSV is substantially leveled with an inner sidewall of the dielectric layer facing the TSV.Type: ApplicationFiled: April 25, 2022Publication date: October 26, 2023Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wei-Ming Wang, Yu-Hung Lin, Yu-Hsiao Lin, Shih-Peng Tai, Kuo-Chung Yee
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Publication number: 20230326146Abstract: An augmented reality implementing method applied to a server, which includes a plurality of augmented reality objects and a plurality of setting records corresponding to the augmented reality objects respectively is provided. Firstly, the server receives an augmented reality request from a mobile device, where the augmented reality request is related to a target device. Then, the server is communicated with the target device to access current information. Then, the server determines the current information corresponds to which one of the setting records, and selects one of the augmented reality objects based on the determined setting record as a virtual object provided to the mobile device.Type: ApplicationFiled: October 4, 2022Publication date: October 12, 2023Inventors: Kuo-Chung CHIU, Hsuan-Wu WEI, Yen-Ting LIU, Shang-Chih LIANG, Shih-Hua MA, Yi-Hsuan TSAI, Jun-Ting CHEN, Kuan-Ling CHEN
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Patent number: 11781995Abstract: A semiconductor apparatus includes a transfer chamber, an annealing station, a robot arm, an edge detector and a trigger device. The transfer chamber is configured to interface with an electroplating apparatus. The robot arm is arranged to transfer a wafer from the transfer chamber to the annealing station. The edge detector, disposed over a predetermined location between the transfer chamber and the annealing station, comprises a first charge-coupled device (CCD) sensor and a second CCD sensor. When the robot arm is carrying the wafer to pass through the predetermined location, the first CCD sensor and the second CCD sensor are located over a first portion and a second portion of the edge bevel removal area respectively, and the trigger device is configured to activate the first CCD sensor and the second CCD sensor to capture an image of the first portion and an image of the second portion respectively.Type: GrantFiled: March 3, 2022Date of Patent: October 10, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Chao-Tung Wu, Kuo-Chung Yu, Chung-Hao Hu, Sheng-Ping Weng
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Patent number: 11756852Abstract: A semiconductor device including a substrate, a semiconductor package, a plurality of pillars and a lid is provided. The semiconductor package is disposed on the substrate and includes at least one semiconductor die. The plurality of pillars are disposed on the semiconductor package. The lid is disposed on the substrate and covers the semiconductor package and the plurality of pillars. The lid includes an inflow channel and an outflow channel to allow a coolant to flow into and out of a space between the substrate, the semiconductor package, the plurality of pillars and the lid. An inner surface of the lid, which faces and overlaps the plurality of pillars along a stacking direction of the semiconductor package and the lid, is a flat surface.Type: GrantFiled: April 14, 2022Date of Patent: September 12, 2023Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chen-Hua Yu, Chun-Hui Yu, Jeng-Nan Hung, Kuo-Chung Yee, Po-Fan Lin
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Publication number: 20230278857Abstract: Microelectromechanical systems (MEMS) packages and methods of manufacture thereof are described. In an embodiment, a method of manufacturing a MEMS package may include attaching a MEMS structure having a capping structure thereon to a device wafer comprising a plurality of first devices formed therein to form a wafer level MEMS package; and singulating the device wafer having the MEMS structure attached thereto to form a plurality of chip scale MEMS packages.Type: ApplicationFiled: May 12, 2023Publication date: September 7, 2023Inventors: Chen-Hua Yu, Kuo-Chung Yee
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Patent number: 11749607Abstract: Provided are a package and a method of manufacturing the same. The package includes a first die, a second die, a bridge structure, an encapsulant, and a redistribution layer (RDL) structure. The first die and the second die are disposed side by side. The bridge structure is disposed over the first die and the second die to electrically connect the first die and the second die. The encapsulant laterally encapsulates the first die, the second die, and the bridge structure. The RDL structure is disposed over a backside of the bridge structure and the encapsulant. The RDL structure includes an insulating structure and a conductive pattern, the conductive pattern is disposed over the insulating structure and extending through the insulating structure and a substrate of the bridge structure, so as to form at least one through via in the substrate of the bridge structure.Type: GrantFiled: March 27, 2022Date of Patent: September 5, 2023Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chih-Wei Wu, Chen-Hua Yu, Kuo-Chung Yee, Szu-Wei Lu, Ying-Ching Shih
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Patent number: 11731729Abstract: A reciprocating mechanism includes a first connecting element, a crankshaft and a second connecting element. The crankshaft includes a rotation shaft, a first following element and a second following element. The first following element is pivotally disposed on one side of the rotation shaft and movably coupled to the first connecting element. The second following element is pivotally disposed on the other side of the rotation shaft, and a first angle is formed between the first following element and the second following element. The second connecting element is movably coupled to the second following element. The first following element and the second following element are configured to rotate around the rotation shaft so as to be movably coupled to and cause each of the first connecting element and the second connecting element to reciprocate and cyclically pivot along an arc-shaped trajectory.Type: GrantFiled: October 25, 2019Date of Patent: August 22, 2023Assignee: SUNNY WHEEL INDUSTRIAL CO., LTD.Inventors: Hsin-hsiang Hsu, Wen-wang Huang, Kuo-chung Hsu
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Patent number: 11728217Abstract: An embodiment is a package including a first package component. The first package component including a first die attached to a first side of a first interconnect structure, a molding material surrounding the first die, and a second interconnect structure over the molding material and the first die, a first side of the second interconnect structure coupled to the first die with first electrical connectors. The first package component further includes a plurality of through molding vias (TMVs) extending through the molding material, the plurality of TMVs coupling the first interconnect structure to the second interconnect structure, and a second die attached to a second side of the second interconnect structure with second electrical connectors, the second side of the second interconnect structure being opposite the first side of the second interconnect structure.Type: GrantFiled: July 19, 2021Date of Patent: August 15, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chen-Hua Yu, Kuo-Chung Yee, Mirng-Ji Lii, Chien-Hsun Lee, Jiun Yi Wu
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Publication number: 20230252552Abstract: An e-gifting method is provided. The method is performed by a computer device including a processing unit, and includes: receiving, by the processing unit, gift filtering information and receiver information from a giver terminal device; generating, by the processing unit, a candidate gift list according to the gift filtering information and the receiver information, where the candidate gift list includes a plurality of candidate gift items; generating, by the processing unit, a gifting list from the candidate gift items according to giver selecting information from the giver terminal device, where the gifting list includes a plurality of gifting gift items; confirming, by the processing unit, a selected gift item from the gifting gift items according to receiver selecting information from a receiver terminal device; and transmitting, by the processing unit, payment information corresponding to the selected gift item to the giver terminal device.Type: ApplicationFiled: September 7, 2022Publication date: August 10, 2023Inventors: Kuo-Chung CHIU, Hsuan-Wu WEI, Yi-Hua HUANG, Chun-Hao LIAO
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Publication number: 20230245952Abstract: A semiconductor device includes a die stack and an encapsulant covering the die stack. The die stack includes a first die and a second die stacked upon one another, a bonding dielectric layer, and a through die via providing a vertical connection in the die stack. The first die includes a first substrate and a first conductive pad on the first substrate, and the second die includes a second substrate and a second conductive pad on the second substrate. The bonding dielectric layer interposed between the first substrate and the second substrate is in physical contact with at least one selected from the group of the first conductive pad and the second conductive pad. The through die via extends through the first conductive pad and the bonding dielectric layer and lands on the second pad.Type: ApplicationFiled: April 10, 2023Publication date: August 3, 2023Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chen-Hua Yu, Kuo-Chung Yee
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Publication number: 20230245976Abstract: A semiconductor structure includes system-on-integrated chips, a first redistribution circuit structure and first conductive terminals. The system-on-integrated chips each include a die stack having two or more than two tiers, and each tier includes at least one semiconductor die. The first redistribution circuit structure is located on and electrically connected to the system-on-integrated chips. The first conductive terminals are connected on the first redistribution circuit structure, where the first redistribution circuit structure is located between the system-on-integrated chips and the first conductive terminals.Type: ApplicationFiled: April 6, 2023Publication date: August 3, 2023Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chen-Hua Yu, Kuo-Chung Yee
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Patent number: 11694943Abstract: A semiconductor device includes a chip package comprising a semiconductor die laterally encapsulated by an insulating encapsulant, the semiconductor die having an active surface, a back surface opposite to the active surface, and a thermal enhancement pattern on the back surface; and a heat dissipation structure connected to the chip package, the heat dissipation structure comprising a heat spreader having a flow channel for a cooling liquid, and the cooling liquid in the flow channel being in contact with the thermal enhancement pattern.Type: GrantFiled: November 15, 2021Date of Patent: July 4, 2023Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Po-Yuan Teng, Chen-Hua Yu, Hao-Yi Tsai, Kuo-Chung Yee, Tin-Hao Kuo, Shih-Wei Chen
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Patent number: 11685648Abstract: Microelectromechanical systems (MEMS) packages and methods of manufacture thereof are described. In an embodiment, a method of manufacturing a MEMS package may include attaching a MEMS structure having a capping structure thereon to a device wafer comprising a plurality of first devices formed therein to form a wafer level MEMS package; and singulating the device wafer having the MEMS structure attached thereto to form a plurality of chip scale MEMS packages.Type: GrantFiled: July 19, 2021Date of Patent: June 27, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chen-Hua Yu, Kuo-Chung Yee
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Patent number: 11682629Abstract: A package structure and the method thereof are provided. The package structure includes a conductive plate, a semiconductor die, a molding compound, and antenna elements. The conductive plate has a first surface, a second surface and a sidewall connecting the first surface and the second surface. The semiconductor die is located on the second surface of the conductive plate. The molding compound laterally encapsulates the semiconductor die and covers the sidewall and a portion of the second surface exposed by the semiconductor die, wherein the first surface of the conductive plate is coplanar with a surface of the molding compound. The antenna elements are located over the first surface of the conductive plate.Type: GrantFiled: May 10, 2021Date of Patent: June 20, 2023Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Kai-Chiang Wu, Chen-Hua Yu, Kuo-Chung Yee
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Publication number: 20230187408Abstract: An embodiment package includes a first fan-out tier having a first device die, a molding compound extending along sidewalls of the first device die, and a through intervia (TIV) extending through the molding compound. One or more first fan-out redistribution layers (RDLs) are disposed over the first fan-out tier and bonded to the first device die. A second fan-out tier having a second device die is disposed over the one or more first fan-out RDLs. The one or more first fan-out RDLs electrically connects the first and second device dies. The TIV electrically connects the one or more first fan-out RDLs to one or more second fan-out RDLs. The package further includes a plurality of external connectors at least partially disposed in the one or more second fan-out RDLs. The plurality of external connectors are further disposed on conductive features in the one or more second fan-out RDLs.Type: ApplicationFiled: February 3, 2023Publication date: June 15, 2023Inventors: Chen-Hua Yu, Kuo-Chung Yee
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Publication number: 20230170280Abstract: A semiconductor device including a substrate, a semiconductor package, a thermal conductive bonding layer, and a lid is provided. The semiconductor package is disposed on the substrate. The thermal conductive bonding layer is disposed on the semiconductor package. The lid is attached to the thermal conductive bonding layer and covers the semiconductor package to prevent coolant from contacting the semiconductor package.Type: ApplicationFiled: January 17, 2023Publication date: June 1, 2023Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chen-Hua Yu, Chun-Hui Yu, Jeng-Nan Hung, Kuo-Chung Yee, Po-Fan Lin
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Publication number: 20230170320Abstract: A semiconductor device includes a first die, a second die on the first die, and a third die on the second die, the second die being interposed between the first die and the third die. The first die includes a first substrate and a first interconnect structure on an active side of the first substrate. The second die includes a second substrate, a second interconnect structure on a backside of the second substrate, and a power distribution network (PDN) structure on the second interconnect structure such that the second interconnect structure is interposed between the PDN structure and the second substrate.Type: ApplicationFiled: January 12, 2023Publication date: June 1, 2023Inventors: Chen-Hua Yu, Kuo-Chung Yee, Chih-Hang Tung
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Patent number: 11658044Abstract: A semiconductor package includes a wafer and at least one chip attached on first portions of an upper surface of the wafer. Further, the semiconductor package includes an insulating barrier layer, a thermally conductive layer, and a heat sink. The insulating barrier layer is arranged over the at least one chip attached on first portions of an upper surface of the wafer. The thermally conductive layer is arranged over the insulating barrier layer and at least partially encapsulates the at least one chip. The heat sink is arranged over the thermally conductive layer.Type: GrantFiled: March 18, 2021Date of Patent: May 23, 2023Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chun-Hao Tseng, Ying-Hao Kuo, Kuo-Chung Yee
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Patent number: 11658097Abstract: Curable material layer is coated on surface of first die. First die includes first substrate and first contact pad. Second die is bonded to first die. Second die includes second substrate and second contact pad. Second contact pad is located on second substrate, at an active surface of second die. Bonding the second die to the first die includes disposing second die with the active surface closer to the curable material layer and curing the curable material layer. A through die hole is etched in the second substrate from a backside surface of the second substrate opposite to the active surface. The through die hole further extends through the cured material layer, is encircled by the second contact pad, and exposes the first contact pad. A conductive material is disposed in the through die hole. The conductive material electrically connects the first contact pad to the second contact pad.Type: GrantFiled: July 20, 2021Date of Patent: May 23, 2023Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chen-Hua Yu, Kuo-Chung Yee