Abstract: The present invention provides a touch panel used in a display device. The touch panel of the present invention is configured to display images and to receive as well as to process instructions inputted by user's touches. A display substrate partially overlaps with an image driving circuit substrate of the touch panel. A touch sensing circuit is disposed on the inner side of the display substrate. A touch sensing processor is disposed on the inner side of a touch sensing circuit and is also electrically coupled to the touch sensing circuit. Consequently, the thickness of the touch panel as well as the overall thickness of the display device is reduced.

Abstract: A resistance type touch display panel includes a first substrate and a second substrate disposed above the first substrate. The first substrate includes many scan lines and data lines defining many pixel regions on the first substrate, many pixel units and touch units. Each pixel unit is located in one of the pixel regions and electrically connected with one of the scan lines and data lines respectively. Each touch unit is electrically connected with one of the scan lines and data lines and distributed in at least two pixel regions. The second substrate includes many spacers, many touch protrusions and a common electrode covering the spacers and the touch protrusions. Each touch protrusion is located above one of the touch units and a gap is formed between the common electrode disposed on each touch protrusion and the touch unit.

Abstract: A shift register including shift register units controlled by first and second clock signals for generating an output signal. For each unit, in an active period, the first driving device drives the first switch device to activate the output signal, and the second driving device provides a voltage signal according to the first clock signal to drive the first switch device to de-activate the output signal. When the first switch device de-activates the output signal, the second switch device provides the voltage signal to serve as the output signal according to the second clock signal. In the active period, the voltage signal has a low level, and the first and second clock signals are set as alternating-current signals and are opposite to each other. In a blanking period, the voltage signal has a high level, and each of the first and second clock signals is set as a direct-current signal.

Abstract: A touch panel includes two substrates, a sealant positioned between the substrates, a liquid crystal layer disposed between the substrates and enclosed by the sealant, and a first and a second sensing zones disposed on the substrate, wherein the first sensing zone is enclosed by the second sensing zone, and the second sensing zone is enclosed by the sealant. The first and second sensing zones have at least a first sensor and at least a second sensor respectively. The first sensor has a first sensor gap, and the second sensor has a second sensor gap smaller than the first sensor gap.

Abstract: The present invention relates to a liquid crystal display (LCD). The LCD includes a plurality of display units formed with a first substrate, a color matrix formed on the first substrate, and a common electrode formed on the color matrix, a second substrate spaced from the first substrate, a pixel electrode matrix formed on the second substrate, a liquid crystal material disposed between the common electrode and the pixel electrode matrix. The LCD includes a touch sensing member integrated onto the color matrix of the first substrate.

Abstract: A capacitive touch panel and a display device using the capacitive touch panel are provided. The capacitive touch panel includes a first electrode layer, a second electrode layer, and a dielectric layer disposed between two layers. The first electrode layer has a plurality of first A electrode strings and first B electrode strings extended along a first direction. The first A electrode string and the first B electrode string respectively has a plurality of first direction electrodes. The second electrode layer has a plurality of second direction electrodes connected in series along a second direction. The first A and B electrode strings are disconnected in the first electrode layer while they are simultaneously detected for presence of signal variation.

Abstract: A liquid crystal display device, drive circuit, and repair method thereof are provided. The drive circuit includes a plurality of signal lines and a plurality of drivers connected with the signal lines. The drivers have an ordering sequence. Each of the drivers includes a first amplifier and a second amplifier. Each of the first amplifier and the second amplifier includes an input terminal and an output terminal. The output terminal of the first amplifier of each of the driver is coupled to the input terminal of the first amplifier of the next stage driver according to the ordering sequence. The output terminal of the second amplifier of each driver is coupled to the input terminal of the second amplifier of the next stage driver according to the ordering sequence.

Abstract: A gate driving circuit for driving plural scan lines of a liquid crystal display includes N driving circuit units and a control unit. Each of the N driving circuit units sequentially outputs a driving signal to drive a corresponding scan line of the scan lines. The control unit outputs a positive-phase and an opposite-phase clock signal to control the N driving circuit units. After an Nth driving circuit unit of the N driving circuit units outputs the driving signal, the control unit transmits a control signal to at least one of the N driving circuit units. A method for driving the foregoing gate driving circuit is also disclosed.

Abstract: A signal-driving system for constructing gate signals of liquid crystal display (LCD), includes a plural stage of cascaded shift register units. Each stage of shift register unit includes a first pull-up switch unit, which is turned on for outputting a gate pulse on an output of this stage, based on either the first clock signal or the second clock signal; a pull-up driving unit, which is used for providing a driving pulse via a node for driving the first pull-up switch unit; a first pull-down switch unit, which is turned on to connect the output to a low-level voltage source; a second pull-down switch unit, which is turned on to connect said node to the low-level voltage source; a carry buffer unit, which is used for providing a control pulse on the second pull-down switch unit of previous stage, based on either the first clock signal or the second clock signal, and thereby ensuring operation of each stage independent of gate pulse signals outputted from the other stages.

Abstract: A display apparatus comprises a shift register array. The shift register array comprises a plurality of shift registers. At least one shift register comprises a first transistor, a second transistor, a third transistor, and a driving circuit. The gate and the first electrode of the first transistor receive an input signal. The gate of the second transistor is coupled to the second electrode of the first transistor. The second electrode of the second transistor generates an output signal. The first electrode of the second transistor receives a clock signal. The third transistor is used to pull down a voltage level at the gate of the second transistor. The driving circuit determines an on/off status of the third transistor in response to the input signal and the output signal.

Abstract: A shift register unit includes a plurality of register units electrically coupled in cascade. Each register unit outputs an output pulse according to a first clock signal, a second clock signal and an output pulse of a previous register unit. Each register unit includes a first switch unit, a second switch unit, a third switch unit, a fourth switch unit, and a driving unit. The first switch unit is used for conducting the input pulse to a first node when the first switch is turned on. The second switch unit is used for conducting the output pulse of the register unit according to the first clock signal to an output end when the second switch unit is turned on in response to the input pulse. The third switch unit electrically coupled to a supply end is used for conducting a supply voltage to the output end when the second switch unit is turned off.

Abstract: A display device is disclosed, which has a printed circuit board, a display panel, data driver chips and a scan driver circuit. The display panel has a substrate, scan lines and data lines. The scan lines are disposed on the substrate, and the data lines perpendicular to the scan lines are disposed on the substrate. The data driver chips, which are cascaded and mounted on the substrate, are electrically connected to the data lines and the printed circuit board. The scan driver circuit is formed on the substrate and electrically connected to the scan lines and the printed circuit board.

Abstract: Clock generators capable of generating clocks with different frequency according to a binary code. A voltage controlled oscillation module generates a plurality of first clocks (D0˜Dm) with a first frequency (f0), in which the first clocks Di and Di-1 have a fixed phase difference and 1<i<m. A logic control circuit outputs a set of corresponding clocks arranged in a corresponding sequence according to the first clocks and a binary code. A clock synthesizer generates a second clock with a second frequency (f1) according to the set of corresponding clocks, in which f1=A/B f0, A<B and A and B are positive integers.

Abstract: Clock generators capable of generating clocks with different frequency according to a binary code. A voltage controlled oscillation module generates a plurality of first clocks (D0˜Dm) with a first frequency (f0), in which the first clocks Di and Di?1 have a fixed phase difference and 1<i<m. A logic control circuit outputs a set of corresponding clocks arranged in a corresponding sequence according to the first clocks and a binary code. A clock synthesizer generates a second clock with a second frequency (f1) according to the set of corresponding clocks, in which f ? ? ? 1 = A B ? f ? ? ? 0 , A>B and A and B are positive integers.

Abstract: A liquid crystal display includes a pixel electrode coupled in each of a plurality of pixels, wherein the pixel electrode has a first side along which runs a first data line and a second side along which runs a second data line, and a switch element coupling the pixel electrode with one scan line and the first data line. A conductive layer is connected to any of the first or second data line to form a compensation capacitor coupling between the pixel electrode and the first or second data line. The compensation capacitor balances the capacitive coupling at the two sides of the pixel electrode adjacent to the first and second side of the pixel electrode.

Abstract: An active matrix substrate and method for fabricating the same. The active matrix substrate, employed in a flat panel display (FPD), comprises a substrate having an active region and a pad region, a thin film transistor (TFT) disposed within the active region, a data pad and a gate pad, wherein the TFT includes a gate electrode, a semiconductor layer, a source electrode, and a drain electrode. Specifically, the data pad and the gate pad, made of the same material and formed by the same process, are located within the pad region coplanarly. Furthermore, the gate pad is electrically connected to the gate electrode, and the data pad is electrically connected to the source electrode.

Abstract: A display panel comprising a first substrate, a second substrate and a plurality of pillar spacers is provided. The first substrate comprises a first base and a black matrix layer with a plurality of openings. The black matrix layer is disposed on the lower surface of the first base. The second substrate is disposed below the first substrate and separated at a predetermined distance from the first substrate. The plurality of pillar spacers for maintaining the predetermined distance. Each of the pillar spacer having a first end and a second end. The first end is inserted into the portion of the plurality of openings, and the second end extends to contact with the second substrate.

Abstract: A liquid crystal display includes a pixel electrode coupled in each of a plurality of pixels, wherein the pixel electrode has a first side along which runs a first data line and a second side along which runs a second data line, and a switch element coupling the pixel electrode with one scan line and the first data line. A conductive layer is connected to any of the first or second data line to form a compensation capacitor coupling between the pixel electrode and the first or second data line. The compensation capacitor balances the capacitive coupling at the two sides of the pixel electrode adjacent to the first and second side of the pixel electrode.

Abstract: A thin-film-transistor liquid crystal display comprises a display unit which contains a plurality of scanning lines, a plurality of data lines arranged to cross the plurality of scanning lines and defining a plurality of pixels, and a data driving circuit providing pixel data signals to the plurality of data lines. The pixels of each scanning line are divided into groups of N successive pixels, where N is an integer greater than 1. A polarity of the respective pixel data signals for the data lines within each group is the same as each other. The polarity of the respective pixel data signals for each successive group along at least one of the scanning lines alternates between a first polarity and a second polarity.

Abstract: A driving method of a pixel array is provided. The driving method is suitable for a pixel array comprising at least one pixel set in each pixel array, wherein at least one pixel set comprises a plurality of pixels. In the driving method, a voltage having substantially same phase is used to drive the pixel electrodes of the pixels in the same pixel set. In addition, voltages with phases substantially opposite to each other are used to drive the pixel electrodes of the pixels in two adjacent pixel sets. Furthermore, a single gate line is used to drive two adjacent pixels in two different pixel sets respectively. In addition, a single gate line is used to drive a first pixel in one of the pixel set and another pixel in an adjacent column of the first pixel, wherein a phase of the voltage of a pixel electrode of the first pixel and a phase of a voltage of a pixel electrode of the other pixel are substantially different.