Patents by Inventor Kuo-Hua Hsu
Kuo-Hua Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240072155Abstract: A method includes forming a transistor, which includes forming a dummy gate stack over a semiconductor region, and forming an Inter-Layer Dielectric (ILD). The dummy gate stack is in the ILD, and the ILD covers a source/drain region in the semiconductor region. The method further includes removing the dummy gate stack to form a trench in the first ILD, forming a low-k gate spacer in the trench, forming a replacement gate dielectric extending into the trench, forming a metal layer to fill the trench, and performing a planarization to remove excess portions of the replacement gate dielectric and the metal layer to form a gate dielectric and a metal gate, respectively. A source region and a drain region are then formed on opposite sides of the metal gate.Type: ApplicationFiled: November 8, 2023Publication date: February 29, 2024Inventors: Kuo-Hua Pan, Je-Wei Hsu, Hua Feng Chen, Jyun-Ming Lin, Chen-Huang Peng, Min-Yann Hsieh, Java Wu
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Publication number: 20170039983Abstract: A liquid crystal display includes a liquid crystal panel, a source driving circuit, a timing controller, and a gate driving circuit. The source driving circuit converts frame data into a plurality of data voltages, and charges/discharges a first data line according to a data voltage of the plurality of data voltages. The gate driving circuit enables a gate line corresponding to the data voltage. The timing controller sequentially enables a plurality of switch enable lines corresponding to the gate line. A plurality of pixel switches are turned on according to the enabled gate line. A data line switch is turned on according to an enabled switch enable line. The data voltage charges/discharges a corresponding pixel through the turned-on data line switch and one of the turned-on pixel switches.Type: ApplicationFiled: October 19, 2016Publication date: February 9, 2017Inventors: Kuo-Hua Hsu, Yung-Chih Chen, Kuo-Chang Su, Yu-Chung Yang
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Patent number: 9501995Abstract: A liquid crystal display includes a liquid crystal panel, a source driving circuit, a timing controller, and a gate driving circuit. The source driving circuit converts frame data into a plurality of data voltages, and charges/discharges a first data line according to a data voltage of the plurality of data voltages. The gate driving circuit enables a gate line corresponding to the data voltage. The timing controller sequentially enables a plurality of switch enable lines corresponding to the gate line. A plurality of pixel switches are turned on according to the enabled gate line. A data line switch is turned on according to an enabled switch enable line. The data voltage charges/discharges a corresponding pixel through the turned-on data line switch and one of the turned-on pixel switches.Type: GrantFiled: December 5, 2014Date of Patent: November 22, 2016Assignee: AU OPTRONICS CORP.Inventors: Kuo-Hua Hsu, Yung-Chih Chen, Kuo-Chang Su, Yu-Chung Yang
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Patent number: 9105347Abstract: A shift register includes a signal input unit for receiving and providing an input signal, a signal output unit for controlling whether outputting a clock signal according to the input signal provided by the signal input unit, and a plurality of stable modules. Each of the stable modules is electrically coupled to an output terminal of the signal input unit, an output terminal of the signal output unit, and a default potential. Each of the stable modules receives a corresponding operation signal and is enabled in a duty of the corresponding operation signal, such that both the output terminal of the signal input unit and the output terminal of the signal output unit are electrically coupled to the default potential when the input signal is disabled. Before one of the stable modules is disabled, another of the stable modules has already been enabled.Type: GrantFiled: October 11, 2011Date of Patent: August 11, 2015Assignee: AU OPTRONICS CORP.Inventors: Kuo-Chang Su, Yung-Chih Chen, Kuo-Hua Hsu
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Publication number: 20150084948Abstract: A liquid crystal display includes a liquid crystal panel, a source driving circuit, a timing controller, and a gate driving circuit. The source driving circuit converts frame data into a plurality of data voltages, and charges/discharges a first data line according to a data voltage of the plurality of data voltages. The gate driving circuit enables a gate line corresponding to the data voltage. The timing controller sequentially enables a plurality of switch enable lines corresponding to the gate line. A plurality of pixel switches are turned on according to the enabled gate line. A data line switch is turned on according to an enabled switch enable line. The data voltage charges/discharges a corresponding pixel through the turned-on data line switch and one of the turned-on pixel switches.Type: ApplicationFiled: December 5, 2014Publication date: March 26, 2015Inventors: Kuo-Hua Hsu, Yung-Chih Chen, Kuo-Chang Su, Yu-Chung Yang
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Publication number: 20150033717Abstract: A ocean buoyancy power generating system includes a water inlet pipe with a water inlet, a water drawing pipe, a guiding pipe, multiple water drawing devices, a gas charging unit, an ocean power generating and collecting apparatus or ocean thermal energy conversion (OTEC) power generating and collecting apparatus, a first moving apparatus, and a second moving apparatus. Through cyclically discharging the gas to one of the water drawing devices in the water inlet pipe by the gas charging unit, buoyancy is generated on the water drawing device to continuously drive the seawater in the water drawing pipe to move upwards for electric power generation.Type: ApplicationFiled: August 4, 2014Publication date: February 5, 2015Inventor: Kuo-Hua Hsu
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Publication number: 20140198023Abstract: A gate driver circuit including a plurality of gate driver stages is provided. The gate driver stages are combined on the display panel and configured to receive a plurality of clock signals and a start pulse. After being started by the start pulse, the gate driver stages generate a plurality of scan signals based on the clock signals. The scan signals respectively drive a plurality of gate lines of the display panel in a plurality of scan sequences during different frame periods based on the clock signals, wherein at least two scan sequences of the scan sequences are different. Furthermore, a method for driving gate lines of the display panel including the foregoing gate driver circuit is also provided.Type: ApplicationFiled: June 28, 2013Publication date: July 17, 2014Inventor: Kuo-Hua Hsu
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Patent number: 8774348Abstract: A shift register circuit includes plural shift register stages for providing plural gate signals. Each shift register stage includes a pull-up unit, a pull-up control unit, an input unit, a first pull-down unit, a second pull-down unit, and a pull-down control unit. The pull-up control unit generates a first control signal according to a driving control voltage and a first clock. The pull-up unit pulls up a corresponding gate signal according to the first control signal. The input unit is utilized for inputting the gate signal of a preceding shift register stage to become the driving control voltage according to a second clock having a phase opposite to the first clock. The pull-down control unit generates a second control signal according to the driving control voltage. The first and second pull-down units pull down the corresponding gate signal and the first control signal respectively according to the second control signal.Type: GrantFiled: December 24, 2012Date of Patent: July 8, 2014Assignee: AU Optronics Corp.Inventors: Chih-Ying Lin, Kun-Yueh Lin, Yu-Chung Yang, Kuo-Hua Hsu
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Patent number: 8724067Abstract: An active device array substrate includes a substrate, first scan lines, second scan lines, data lines, and pixels. The first and the second scan lines are alternately arranged along a first direction. The data lines are arranged in parallel along a second direction. The pixels are arranged to form first pixel rows and second pixel rows alternately arranged in the first direction. The first pixel row includes first and second pixels electrically connected to the first scan lines, the second scan lines, and the data line, respectively. The second pixel row includes third and fourth pixels electrically connected to the first scan lines, the second scan lines, and the data line, respectively. The pixels between two adjacent data lines are arranged in two columns. Among the pixels in the same column, the pixels in odd rows and in even rows are electrically connected to different data lines, respectively.Type: GrantFiled: June 27, 2013Date of Patent: May 13, 2014Assignee: Au Optronics CorporationInventors: Kuo-Chang Su, Kuo-Hua Hsu, Chun-Hsin Liu, Yung-Chih Chen
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Patent number: 8723772Abstract: A LCD panel with an improved pixel array configuration is provided. The LCD panel uses a column inversion driving method to drive the data lines so as to achieve a stable common voltage. Moreover, by cross-connecting the layout traces of the wiring zone in a specified manner, the gate pulses outputted from every two gate lines neighboring the sub-pixel are not overlapped with each other, so that the frame can be normally displayed.Type: GrantFiled: August 8, 2011Date of Patent: May 13, 2014Assignee: AU Optronics Corp.Inventors: Yu-Chung Yang, Kuo-Chang Su, Yung-Chih Chen, Kuo-Hua Hsu, Chih-Ying Lin, Kun-Yueh Lin
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Patent number: 8687761Abstract: A shift register circuit includes plural shift register stages for providing plural gate signals. Each shift register stage includes an input unit and a pull-up unit. The pull-up unit is utilized for pulling up a gate signal according to a system clock and a driving control voltage. The input unit is employed for outputting the driving control voltage according to a control signal and an input signal. The input unit includes a switch device having a first transistor and a second transistor. The first transistor has a first end for receiving the input signal, a gate end for receiving the control signal, and a second end. The second transistor has a first end electrically connected to the second end of the first transistor, a gate end electrically connected to the first end of the first transistor, and a second end for outputting the driving control voltage.Type: GrantFiled: June 10, 2013Date of Patent: April 1, 2014Assignee: AU Optronics Corp.Inventors: Kuo-Hua Hsu, Yung-Chih Chen, Chun-Huan Chang
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Publication number: 20130293821Abstract: An active device array substrate includes a substrate, first scan lines, second scan lines, data lines, and pixels. The first and the second scan lines are alternately arranged along a first direction. The data lines are arranged in parallel along a second direction. The pixels are arranged to form first pixel rows and second pixel rows alternately arranged in the first direction. The first pixel row includes first and second pixels electrically connected to the first scan lines, the second scan lines, and the data line, respectively. The second pixel row includes third and fourth pixels electrically connected to the first scan lines, the second scan lines, and the data line, respectively. The pixels between two adjacent data lines are arranged in two columns. Among the pixels in the same column, the pixels in odd rows and in even rows are electrically connected to different data lines, respectively.Type: ApplicationFiled: June 27, 2013Publication date: November 7, 2013Inventors: Kuo-Chang Su, Kuo-Hua Hsu, Chun-Hsin Liu, Yung-Chih Chen
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Publication number: 20130272486Abstract: A shift register circuit includes plural shift register stages for providing plural gate signals. Each shift register stage includes an input unit and a pull-up unit. The pull-up unit is utilized for pulling up a gate signal according to a system clock and a driving control voltage. The input unit is employed for outputting the driving control voltage according to a control signal and an input signal. The input unit includes a switch device having a first transistor and a second transistor. The first transistor has a first end for receiving the input signal, a gate end for receiving the control signal, and a second end. The second transistor has a first end electrically connected to the second end of the first transistor, a gate end electrically connected to the first end of the first transistor, and a second end for outputting the driving control voltage.Type: ApplicationFiled: June 10, 2013Publication date: October 17, 2013Inventors: Kuo-Hua Hsu, Yung-Chih Chen, Chun-Huan Chang
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Patent number: 8537094Abstract: A shift register comprises a plurality of stages. In one embodiment, each stage includes a first output, a second output, a pull-up circuit electrically coupled between a node and the second output, a pull-up control circuit electrically coupled to the node, a pull-down control circuit electrically coupled between the node and the first output, and a control circuit electrically coupled to the node and the first output.Type: GrantFiled: March 24, 2010Date of Patent: September 17, 2013Assignee: AU Optronics CorporationInventors: Yu-Chung Yang, Yung-Chih Chen, Chih-Ying Lin, Kuo-Hua Hsu
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Patent number: 8502948Abstract: An active device array substrate includes a substrate, first scan lines, second scan lines, data lines, and pixels. The first and the second scan lines are alternately arranged along a first direction. The data lines are arranged in parallel along a second direction. The pixels are arranged to form first pixel rows and second pixel rows alternately arranged in the first direction. The first pixel row includes first and second pixels electrically connected to the first scan lines, the second scan lines, and the data line, respectively. The second pixel row includes third and fourth pixels electrically connected to the first scan lines, the second scan lines, and the data line, respectively. The pixels between two adjacent data lines are arranged in two columns. Among the pixels in the same column, the pixels in odd rows and in even rows are electrically connected to different data lines, respectively.Type: GrantFiled: August 17, 2010Date of Patent: August 6, 2013Assignee: Au Optronics CorporationInventors: Kuo-Chang Su, Kuo-Hua Hsu, Chun-Hsin Liu, Yung-Chih Chen
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Patent number: 8494108Abstract: A shift register circuit includes plural shift register stages for providing plural gate signals. Each shift register stage includes an input unit and a pull-up unit. The pull-up unit is utilized for pulling up a gate signal according to a system clock and a driving control voltage. The input unit is employed for outputting the driving control voltage according to a control signal and an input signal. The input unit includes a switch device having a first transistor and a second transistor. The first transistor has a first end for receiving the input signal, a gate end for receiving the control signal, and a second end. The second transistor has a first end electrically connected to the second end of the first transistor, a gate end electrically connected to the first end of the first transistor, and a second end for outputting the driving control voltage.Type: GrantFiled: July 20, 2011Date of Patent: July 23, 2013Assignee: AU Optronics Corp.Inventors: Kuo-Hua Hsu, Yung-Chih Chen, Chun-Huan Chang
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Patent number: 8406372Abstract: A shift register of an LCD device includes a plurality of shift register units coupled in series. Each shift register unit includes an input circuit and a pull-down circuit having symmetric structures which enable the LCD device to function in a forward-scan mode and a reverse-scan mode.Type: GrantFiled: May 28, 2012Date of Patent: March 26, 2013Assignee: AU Optronics Corp.Inventors: Kuo-Hua Hsu, Kun-Yueh Lin, Yu-Chung Yang, Kuo-Chang Su
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Patent number: 8396183Abstract: A shift register circuit includes plural shift register stages for providing plural gate signals. Each shift register stage includes an input unit, a pull-up unit, a pull-down unit, a control unit and an auxiliary pull-down unit. The input unit is put in use for outputting a driving control voltage according to at least one first input signal. The pull-up unit pulls up a corresponding gate signal according to the driving control voltage and a system clock. The pull-down unit pulls down the corresponding gate signal to a first power voltage according to a control signal. The control unit is utilized for generating the control signal according to the corresponding gate signal. The auxiliary pull-down unit pulls down the driving control voltage to a second power voltage according to a second input signal.Type: GrantFiled: March 16, 2011Date of Patent: March 12, 2013Assignee: AU Optronics Corp.Inventors: Yu-Chung Yang, Yung-Chih Chen, Kuo-Hua Hsu, Kuo-Chang Su
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Patent number: 8363777Abstract: A shift register circuit includes plural shift register stages for providing plural gate signals. Each shift register stage includes a pull-up unit, a pull-up control unit, an input unit, a first pull-down unit, a second pull-down unit, and a pull-down control unit. The pull-up control unit generates a first control signal according to a driving control voltage and a first clock. The pull-up unit pulls up a corresponding gate signal according to the first control signal. The input unit is utilized for inputting the gate signal of a preceding shift register stage to become the driving control voltage according to a second clock having a phase opposite to the first clock. The pull-down control unit generates a second control signal according to the driving control voltage. The first and second pull-down units pull down the corresponding gate signal and the first control signal respectively according to the second control signal.Type: GrantFiled: September 6, 2012Date of Patent: January 29, 2013Assignee: AU Optronics Corp.Inventors: Chih-Ying Lin, Kun-Yueh Lin, Yu-Chung Yang, Kuo-Hua Hsu
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Patent number: 8351563Abstract: A shift register circuit includes plural shift register stages for providing plural gate signals. The Nth shift register stage of the shift register stages includes an input unit, a pull-up unit and a pull-down unit. The input unit is put in use for outputting an Nth driving control voltage according to an (N?1)th gate signal and an (N?2)th driving control voltage which are generated respectively by the (N?1) th shift register stage and the (N?2) th shift register stage of the shift register stages. The pull-up unit pulls up an Nth gate signal according to the Nth driving control voltage and a system clock. The pull-down unit pulls down the Nth gate signal and the Nth driving control voltage according to an (N+2)th gate signal generated by the (N+2)th shift register stage of the shift register stages.Type: GrantFiled: August 10, 2011Date of Patent: January 8, 2013Assignee: AU Optronics CorpInventors: Yu-Chung Yang, Yung-Chih Chen, Kuo-Hua Hsu, Kuo-Chang Su