Abstract: A semiconductor memory device includes a semiconductor substrate having active areas and a trench isolation region between the active areas. The active areas extend along a first direction. Buried word lines extend along a second direction in the semiconductor substrate. Two of the buried word lines intersect with each of the active areas, separating each of the active areas into a digit line contact area and two cell contact areas. The second direction is not perpendicular to the first direction. A digit line contact is disposed on the digit line contact area. A storage node contact is disposed on each of the two cell contact areas. The digit line contact and the storage node contact are coplanar. At least one digit line extends along a third direction over a main surface of the semiconductor substrate. The at least one digit line is in direct contact with the digit line contact.

Abstract: Semiconductor devices and methods of manufacture thereof are disclosed. In some embodiments, a method of manufacturing a semiconductor device includes providing a substrate, the substrate includes a first fin, a second fin, and an isolation region disposed between the first fin and the second fin. The second fin includes a different material than a material of the substrate. The method includes forming an oxide over the first fin, the second fin, and a top surface of the isolation region at a temperature of about 400 degrees C. or less, and post-treating the oxide at a temperature of about 600 degrees C. or less.

Abstract: A fingerprint sensor apparatus including a fingerprint sensor and a processor circuit is provided. The fingerprint sensor is configured to capture a plurality of local fingerprint images of a fingerprint. The plurality of local fingerprint images include at least one first local fingerprint image and at least one second local fingerprint image. The processor circuit is electrically connected to the fingerprint sensor. The processor circuit is configured to identify the fingerprint according to the at least one first local fingerprint image of the local fingerprint images. The local fingerprint images form a global fingerprint image of the fingerprint. In addition, a method for sensing a fingerprint is also provided.

Abstract: This description relates to a method of forming the gate electrode of a semiconductor device, the method including providing a substrate comprising a dummy gate electrode (DGE), a source/drain (S/D) region, a spacer on a dummy gate sidewall, and an isolation feature, depositing a contact etch stop layer (CESL) over the DGE, the S/D region and the spacer, depositing an interlayer dielectric (ILD) layer over the CESL, performing a first chemical mechanical polishing (CMP) to expose the CESL over the DGE, performing a second CMP to expose the DGE, removing an upper portion of the CESL and the spacer, and performing a third CMP to expose the CESL over the S/D region to produce a structure in which an entire top surface of the CESL over the S/D region and isolation feature is substantially co-planar with a top surface of the DGE.

Abstract: A programming method for a robot arm includes setting and saving operational configurations of the robot arm, establishing an operation process of the robot arm, selecting the operational position icon for applying to the operation sub-process, displaying a selected operational position icon and an operational configuration sub-icon, modifying an operational configuration displayed on the operational configuration sub-icon for facilitating to execute a programming process of the robot arm.

Abstract: A fingerprint sensor apparatus including a sampling unit, an analysing unit and a processor unit is provided. The sampling unit is configured to sense a fingerprint image. The analysing unit is coupled to the sampling unit. The analysing unit is configured to analyse an image parameter of the fingerprint image to obtain an image data, and compare the image data to a reference data to obtain a comparison result. The comparison result includes that the image data locates in which one of a plurality of stages. The processor unit is coupled to the analysing unit. The processor unit is configured to control an electronic device to execute a predetermined operation according to the stage that the image data locates. In addition, a method for controlling the fingerprint sensor apparatus is also provided.

Abstract: The present invention provides quantification and imaging methods and a system of the echo-texture feature, comprising: obtaining an ultrasonic image; calculating all the pixel values in a selected ROI of the ultrasonic image to obtain a regional standard deviation; excluding pixels with a pixel value smaller than a multiple of the regional standard deviation in the selected ROI; counting a set of pixels centered around a Nth pixel to gather a Nth local mean, a Nth local variance and a Nth local coefficient of variance corresponding the set of pixel values, wherein N is from 1 to the number of the pixels remaining in the selected ROI; and obtaining an echo-texture index according to the local means, the local variances, or the local coefficient of variances. The imaging of echo texture which shows the echo texture distribution of the selected ROI with a color scale changing continuously from red to blue is also included. A parameter is provided to adjust the visualization enhancement of the echo texture.

Abstract: A satellite navigation method and system are provided. The system includes a global position system module, an input unit, a picture database, a geographical information system module, an integrating unit, and a display unit. The method includes the following steps. Firstly, a navigation area is determined through the input unit, so as to search out several picture batches in the navigation area from the picture database. Next, a map relating to the navigation area is provided by the GIS module. Then, the picture batches and the map are integrated by the integrating unit to produce an integrated map shown on a first frame of the display unit. Afterwards, several pictures of the picture batch chosen from the first frame displayed on a second frame and satellite navigation information of the picture chosen from the second frame are displayed on a third frame by the display unit.

Abstract: A trench metal-oxide-semiconductor field effect transistor (MOSFET), in accordance with one embodiment, includes a drain region, a plurality of gate regions disposed above the drain region, a plurality of gate insulator regions each disposed about a periphery of a respective one of the plurality of gate regions, a plurality of source regions disposed in recessed mesas between the plurality of gate insulator regions, a plurality of body regions disposed in recessed mesas between the plurality of gate insulator regions and between the plurality of source regions and the drain region.

Abstract: A catalyst system includes a transition metal salt containing a halo group, an acetate group, or a combination thereof, and an organic phosphine ligand. The molar ratio of the organic phosphine ligand to the transition metal salt is greater than 0 and less than or equal to 50.

Abstract: A processing system and a confocal processing method for confocally emitting and receiving ultrasound. Firstly, a first driving electrical signal is generated. Then, at least one first ultrasound signal having a main frequency is emitted to a reflection position according to the first driving electrical signal. With an object at the reflection position, the first ultrasound signal is reflected to form at least one second ultrasound signal. Then, a first analyzed signal whose frequency lower than the main frequency is retrieved from the second ultrasound signal, and other signals are eliminated from the second ultrasound signal, and the first analyzed signal is converted into at least one first analogous signal. Finally, first energy of a first fixed bandwidth of the first analyzed signal is retrieved by the first analogous signal. The method stops generating the first driving electrical signal when the first energy is larger than a predetermined value.

Abstract: A real-time multi-channel EEG signal processor based on an on-line recursive independent component analysis is provided. A whitening unit generates covariance matrix by computing covariance according to a received sampling signal. A covariance matrix generates a whitening matrix by a computation of an inverse square root matrix calculation unit. An ORICA calculation unit computes the sampling signal and the whitening matrix to obtain a post-whitening sampling signal. The post-whitening sampling signal and an unmixing matrix implement an independent component analysis computation to obtain an independent component data. An ORICA training unit implements training of the unmixing matrix according to the independent component data to generate a new unmixing matrix. The ORICA calculation unit may use the new unmixing matrix to implement an independent component analysis computation. Hardware complexity and power consumption can be reduced by sharing registers and arithmetic calculation units.

Abstract: A memory array includes a semiconductor substrate having thereon a plurality of active areas and trench isolation regions between the active areas. Buried word lines are disposed in the semiconductor substrate. Two of the buried word lines intersect with each of the active areas, separating each of the active areas into three portions including a digit line contact area and two cell contact areas. Buried digit lines are disposed in the semiconductor substrate above the buried word lines. An epitaxial silicon layer extends from exposed sidewalls and a top surface of each of the cell contact areas.

Abstract: A semiconductor substrate is provided. Active areas and trench isolation regions are formed. The active areas extend along a first direction. Buried word lines extending along a second direction are formed in the semiconductor substrate. Two of the buried word lines intersect with each of the active areas, separating each of the active areas into a digit line contact area and two cell contact areas. Buried digit lines extending along a third direction are formed above the buried word lines. An upper portion of the trench isolation region is removed to form an L-shaped recessed area around each of the cell contact areas. The L-shaped recessed area exposes sidewalls of the cell contact areas. An epitaxial silicon growth process is then performed to grow an epitaxial silicon layer from the exposed sidewalls and a top surface of each of the cell contact areas, thereby forming enlarged cell contact areas.

Abstract: An eyeglasses structure enabling image enhancement comprises a frame body, two lens bodies jointed with the frame body, at least two transparent displays and at least one or else more than one image capture devices, wherein the interior of the frame body is connected to a processor used to perform image clarification processes on the image captured by the image capture device and forwardly extended from the frame body in order to improve its resolution, and also output the synchronously clarified image to the transparent display such that the image actually seen by the eyeball of a user through the lens body can overlap with the synchronously clarified image shown on the two transparent displays thereby sharpening the scenery image observed by the eyeball of the user through the lens body.

Abstract: Systems and methods for narrow semiconductor trench structures. In a first method embodiment, a method for forming a narrow trench comprises forming a first layer of insulating material on a substrate and creating a trench through the first layer of insulating material and into the substrate. A second insulating material is formed on the first layer and on exposed portions of the trench and the second insulating material is removed from the first layer of insulating material and the bottom of the trench. The trench is filled with an epitaxial material and the first layer of insulating material is removed. A narrow trench is formed by the removal of remaining portions of the second insulating material.

Abstract: This description relates to a method of forming the gate electrode of a semiconductor device, the method including providing a substrate comprising a dummy gate electrode (DGE), a source/drain (S/D) region, a spacer on a dummy gate sidewall, and an isolation feature, depositing a contact etch stop layer (CESL) over the DGE, the S/D region and the spacer, depositing an interlayer dielectric (ILD) layer over the CESL, performing a first chemical mechanical polishing (CMP) to expose the CESL over the DGE, performing a second CMP to expose the DGE, removing an upper portion of the CESL and the spacer, and performing a third CMP to expose the CESL over the S/D region to produce a structure in which an entire top surface of the CESL over the S/D region and isolation feature is substantially co-planar with a top surface of the DGE.

Abstract: The invention provides an analysis method of ultrasound echo signals based on statistics of scatterer distributions. The beginning of steps, choosing an ultrasound echo signal as a center, and calculating the signal image values of all ultrasound echo signals within a window block in an ultrasound image data to obtain an ultrasound scatterer value. Then, choosing another ultrasound echo signal as the center to repeat the previous steps until all of ultrasound echo signals may be calculated. The interval between each of ultrasound echo signal is one point distance. Finally, to output an ultrasound scatterer mode image with all ultrasound scatterer values by utilizing color scale. The ultrasound scatterer mode image can assist doctor to confirm the relative region of lesion in a target organ.

Abstract: The invention discloses a vehicular communication system and a routing method thereof. The routing method includes the following steps. When a first relay node of the relay nodes, which locates in a last road slot of each of the road section, receives the route reply packet, the first relay node is configured to obtain a plurality of moving traces of a plurality of specific relay nodes according to the route reply packet; estimate at least one connection life period related to a plurality of specific road slots according to the moving traces; estimate at least one connection available interval of the specific road section according to the at least one connection life period; and append the at least one connection available interval to the route reply packet and forward the route reply packet.

Abstract: A slotted set screw includes a shank, a slot, a cut metal waste storing recess and an outer thread portion. The slot is provided an end of the shank and includes an opening and a slot bottom surface. The cut metal waste storing recess is provided on the opening of the slot and includes a first vertical wall, a second vertical wall and a horizontal bottom surface. A first horizontal bottom edge connects between the first vertical wall and the horizontal bottom surface while a second horizontal bottom edge connects between the second vertical wall and the horizontal bottom surface. An included angle is formed between the first horizontal bottom edge or the second horizontal bottom edge and a longitudinal axis of the slot less than a right angle. In an embodiment, the bottom surface is lower than a level of the slot bottom surface in a vertical direction.