Patents by Inventor Kuo Lin

Kuo Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250169146
    Abstract: A semiconductor device includes: a substrate; a channel layer disposed on the substrate; a barrier layer disposed on the channel layer; and a cap layer disposed on the barrier layer. The semiconductor device further includes: a gate electrode disposed on the barrier layer; a source electrode and a drain electrode disposed on the barrier layer and respectively at opposite sides of the gate electrode; a spike region formed below at least one of the source electrode and the drain electrode; and a passivation layer disposed on the barrier layer and extending onto sidewalls and top surfaces of the source electrode and the drain electrode. The spike region includes titanium nitride (TiN). The passivation layer is in contact with the cap layer.
    Type: Application
    Filed: January 17, 2025
    Publication date: May 22, 2025
    Inventors: Chieh-Chih HUANG, Yan-Cheng LIN, Cheng-Kuo LIN, Wei-Chou WANG, Che-Kai LIN, Jiun-De WU
  • Publication number: 20250150919
    Abstract: A method for enhancing roaming performance is provided. The method is implemented by a station MLD and comprises: communicating with a current AP through at least two links, wherein the at least two links comprise a first link and a second link; disabling the second link connected to the current AP; establishing an association with a target AP through a new second link; transmitting a message to the target AP through the new second link to notify a network node that the STA is camping on a cell served by the target AP and to disable the new second link connected to the target AP; retrieving buffered packets from the current AP through the first link for a time duration; disconnecting from the current AP after the time duration; and enabling the new first link and the new second link to retrieve packets from the target AP.
    Type: Application
    Filed: November 6, 2024
    Publication date: May 8, 2025
    Inventors: Chun-Ting WU, Yu-Shu CHANG, Ray-Kuo LIN
  • Patent number: 12276849
    Abstract: Disclosed is an optical module, including a circuit board, a thermally conductive substrate, a structural adhesive, a silicon photonic chip, a laser assembly, and a fiber array assembly coupled to the silicon photonic chip. The thermally conductive substrate includes a first surface, a second surface, and a first bearing seat, a second bearing seat and a third bearing seat disposed on the first surface and exposed from the opening of the circuit board. The area of the second surface is smaller than that of the first surface. Part of the first surface contacts the circuit board. The thermally conductive substrate is fixed to the circuit board by the structural adhesive. The silicon photonic chip is disposed on the first bearing seat, the laser assembly is disposed on the second bearing seat, and a joint of the fiber array assembly is disposed on the third bearing seat.
    Type: Grant
    Filed: December 5, 2022
    Date of Patent: April 15, 2025
    Assignee: DONGGUAN LUXSHARE TECHNOLOGIES CO., LTD
    Inventors: QianBing Yan, Min-Sheng Kao, ChunFu Wu, Yueh-Kuo Lin, LinChun Li, Chung-Hsin Fu
  • Patent number: 12248173
    Abstract: Disclosed is an optical module, including a lower housing, an upper housing covering the lower housing, a circuit board, a first metal base, a second metal base, a silicon photonic chip, and a light emission module including a laser chip and an optical path assembly. The first metal base is disposed on one side of the upper housing. The second metal base is disposed on one side of the lower housing. The circuit board with a hollow region is disposed on the second metal base. The silicon photonic chip is disposed on the second metal base exposed from the hollow region. The laser chip is disposed on the first metal base. The optical path assembly is disposed on the first metal base and/or on the second metal base exposed from the hollow region, and guides a third optical signal emitted by the laser chip to the silicon photonic chip.
    Type: Grant
    Filed: December 22, 2022
    Date of Patent: March 11, 2025
    Assignee: DONGGUAN LUXSHARE TECHNOLOGIES CO., LTD
    Inventors: Chung-Hsin Fu, Min-Sheng Kao, ChunFu Wu, Yi-Tseng Lin, Chih-Wei Yu, Chien-Tzu Wu, QianBing Yan, Yueh-Kuo Lin
  • Patent number: 12237382
    Abstract: A semiconductor device includes: a substrate; a channel layer disposed on the substrate, wherein the channel layer is made of GaN; a barrier layer disposed on the channel layer, wherein the barrier layer is made of AlzGa1-zN; and an inserting structure inserted between the channel layer and the barrier layer. The inserting structure includes: a first inserting layer disposed on the channel layer, wherein the first inserting layer is made of AlxGa1-xN; and a second inserting layer disposed on the first inserting layer, wherein the second inserting layer is made of AlyGa1-yN, and y is greater than x. The semiconductor device further includes: a gate electrode disposed on the barrier layer; a source electrode and a drain electrode disposed on the barrier layer and respectively at opposite sides of the gate electrode; and a spike region formed below at least one of the source electrode and the drain electrode.
    Type: Grant
    Filed: May 30, 2022
    Date of Patent: February 25, 2025
    Assignee: WIN SEMICONDUCTORS CORP.
    Inventors: Chieh-Chih Huang, Yan-Cheng Lin, Cheng-Kuo Lin, Wei-Chou Wang, Che-Kai Lin, Jiun-De Wu
  • Publication number: 20250047189
    Abstract: A control device includes a first capacitor, a drive controller, a constant current source, a discharge-controlled current source, a current mirror, and a sample-and-hold circuit. The constant current source generates a constant current. The discharge-controlled current source is coupled to the constant current source and the first capacitor. The current mirror is coupled to the first capacitor and the primary side of a primary-side switch. The current mirror generates a copy current, thereby generating a copy voltage across the first capacitor. When the drive controller turns on the primary-side switch, the sample-and-hold circuit drives the discharge-controlled current source to sample and hold a control current from the constant current and the copy current. When the node voltage is higher than the copy voltage, the comparison circuit drives the drive controller to turn off the primary-side switch.
    Type: Application
    Filed: October 24, 2023
    Publication date: February 6, 2025
    Inventors: KE-HORNG CHEN, YING-FENG WU, YU-CHOU KO, KUO-LIN ZHENG, KE-MING SU
  • Publication number: 20240405682
    Abstract: A bidirectional hybrid power conversion system includes a symmetric hybrid unit, a transient state detection unit, a conversion control unit, and a feedback unit. The symmetric hybrid unit converts an input voltage into an output voltage with different conversion ratios. The feedback unit generates a feedback signal according to the output voltage and a reference voltage. The conversion control unit is connected with the symmetric hybrid unit and the feedback unit controls the symmetric hybrid unit to adjust the conversion ratio for regulating the output voltage according to the feedback signal. The transient state detection unit is connected with the feedback unit and the conversion control unit outputs a detection signal to the conversion unit according to the feedback signal. According to the detection signal, the conversion control unit controls the symmetric hybrid unit adjusts the conversion ratio, and converts the input voltage into the output voltage stably.
    Type: Application
    Filed: November 14, 2023
    Publication date: December 5, 2024
    Inventors: KE-HORNG CHEN, KE-MING SU, YU-CHOU KO, KUO-LIN ZHENG, YING-FENG WU
  • Publication number: 20240372459
    Abstract: A driving device includes a first current source, a second current source, a first common-mode current elimination (CMCE) circuit, a second common-mode current elimination (CMCE) circuit, a current-to-voltage converter, and a first comparator. The current sources provide constant currents. The current-to-voltage converter includes a first current mirror and a second current mirror. The control terminal of the first current mirror is coupled to the second CMCE circuit. The control terminal of the second current mirror is coupled to the first CMCE circuit. The first current mirror and the second current mirror receive the constant currents, common-mode currents, and differential currents, thereby controlling the first CMCE circuit and the second CMCE circuit to generate a voltage difference that excludes a common-mode voltage corresponding to the common-mode currents. The first comparator receives the voltage difference to drive a field-effect transistor.
    Type: Application
    Filed: November 9, 2023
    Publication date: November 7, 2024
    Inventors: KE-HORNG CHEN, KUO-LIN ZHENG, YU-CHOU KO, KE-MING SU, YING-FENG WU
  • Publication number: 20240235349
    Abstract: An electric motor with double stators includes a first stator, a first stator and a rotor assembly. The rotor assembly is located between the first stator and the second stator in a radial direction. The rotor assembly includes a rotor body, a plurality of first rotor slots, a plurality of second rotor slots, a plurality of first magnets, and a plurality of second magnets. A first air gap is formed between the rotor body and the first stator, and a second air gap is formed between the rotor body and the second stator. The material of the first magnets is different to the material of the second magnets, and any position of the first magnets is different to any position of the second magnets.
    Type: Application
    Filed: April 12, 2023
    Publication date: July 11, 2024
    Inventors: YU-HSUN WU, KUO-LIN CHIU, YA-LING CHANG, CHUN-CHIEH CHANG
  • Patent number: 11955960
    Abstract: The invention uses the control circuit formed on the silicon wafer to detect the leakage current of transistor formed on the depletion mode GaN wafer and then adjust the gate voltage of the depletion mode GaN transistor according to the detected leakage current. Essentially, the gate voltage is reduced or viewed as made more negative when the detected leakage current is larger a specific value. Thus, the gate voltage can be gradually adjusted to approach a specific threshold voltage that right block the leakage current. In other words, by making the gate voltage more negative when non-zero leakage current is detected and even by making the gate voltage more positive when zero leakage current is detected, the depletion mode GaN transistor can be adjusted to have an acceptable or even zero leakage current, a high reaction rate and an optimized efficiency.
    Type: Grant
    Filed: August 23, 2022
    Date of Patent: April 9, 2024
    Assignee: CHIP-GAN POWER SEMICONDUCTOR CORPORATION
    Inventors: Ke-Horng Chen, Tzu-Hsien Yang, Yong-Hwa Wen, Kuo-Lin Cheng
  • Publication number: 20240080675
    Abstract: A method for performing network control in a wireless communications system and associated apparatus are provided. The method may include: carrying a set of link information in a preamble of a first data transmission frame transmitted from the first network device to a second network device, wherein the set of link information may include at least one indication among the following indications: a destination device indication, a device assignment indication and a transmission power control indication; wherein a third network device is arranged to monitor wireless transmission in the wireless communications system to obtain the set of link information from the first data transmission frame, and determine spatial reuse (SR) transmission availability of the third network device based on the set of link information.
    Type: Application
    Filed: August 4, 2023
    Publication date: March 7, 2024
    Applicant: MEDIATEK INC.
    Inventors: Hsin-Chun Huang, Po-Chun Fang, Tsung-Jung Lee, Ray-Kuo Lin
  • Publication number: 20240072790
    Abstract: The invention uses the control circuit formed on the silicon wafer to detect the leakage current of transistor formed on the depletion mode GaN wafer and then adjust the gate voltage of the depletion mode GaN transistor according to the detected leakage current. Essentially, the gate voltage is reduced or viewed as made more negative when the detected leakage current is larger a specific value. Thus, the gate voltage can be gradually adjusted to approach a specific threshold voltage that right block the leakage current. In other words, by making the gate voltage more negative when non-zero leakage current is detected and even by making the gate voltage more positive when zero leakage current is detected, the depletion mode GaN transistor can be adjusted to have an acceptable or even zero leakage current, a high reaction rate and an optimized efficiency.
    Type: Application
    Filed: August 23, 2022
    Publication date: February 29, 2024
    Inventors: KE-HORNG CHEN, TZU-HSIEN YANG, YONG-HWA WEN, KUO-LIN CHENG
  • Publication number: 20240073953
    Abstract: Coordinated-spatial reuse (CO-SR) transmission methods are provided. In a CO-SR transmission method, a transceiver of a sharing access point (AP) may transmit an announcement frame to a shared AP, the transceiver may receive a first block acknowledgement (BA) frame from a first station (STA) associated with the sharing AP, and the transceiver may transmit a dummy clear-to-send (CTS) frame before transmitting the next announcement frame in response to the first STA being a first legacy STA.
    Type: Application
    Filed: August 24, 2023
    Publication date: February 29, 2024
    Inventors: Tsungjung LEE, Pochun FANG, Ray-Kuo LIN
  • Publication number: 20240031094
    Abstract: A method for performing mesh control in a wireless communications system and associated apparatus are provided. The method may include: carrying a set of link information in a preamble of a first data transmission frame transmitted from the first mesh device to a second mesh device, wherein the set of link information may include at least one indication among the following indications: a source-destination relationship indication between the first mesh device and the second mesh device and at least one predicted signal strength measured for the first mesh device and the second mesh device; wherein a third mesh device is arranged to monitor wireless transmission in the wireless communications system to obtain the set of link information from the first data transmission frame, and determine SR transmission availability of the third mesh device based on the set of link information.
    Type: Application
    Filed: February 14, 2023
    Publication date: January 25, 2024
    Applicant: MEDIATEK INC.
    Inventors: Po-Chun Fang, Ray-Kuo Lin, Tsung-Jung Lee
  • Publication number: 20240012974
    Abstract: An integrated circuit includes a functional circuit and a first power switch chain. The first power switch chain includes a first power switch circuit and a second power switch circuit and is coupled between a power source and the functional circuit. The first power switch chain is configured to receive a first control signal, and the first control signal is configured to turn on or turn off the first power switch circuit and the second power switch circuit. A first resistance value of the first power switch circuit is different from a second resistance value of the second power switch circuit.
    Type: Application
    Filed: July 2, 2023
    Publication date: January 11, 2024
    Inventor: Tien-Kuo LIN
  • Publication number: 20240004150
    Abstract: Disclosed is an optical module, including a circuit board, a thermally conductive substrate, a structural adhesive, a silicon photonic chip, a laser assembly, and a fiber array assembly coupled to the silicon photonic chip. The thermally conductive substrate includes a first surface, a second surface, and a first bearing seat, a second bearing seat and a third bearing seat disposed on the first surface and exposed from the opening of the circuit board. The area of the second surface is smaller than that of the first surface. Part of the first surface contacts the circuit board. The thermally conductive substrate is fixed to the circuit board by the structural adhesive. The silicon photonic chip is disposed on the first bearing seat, the laser assembly is disposed on the second bearing seat, and a joint of the fiber array assembly is disposed on the third bearing seat.
    Type: Application
    Filed: December 5, 2022
    Publication date: January 4, 2024
    Applicant: Dongguan Luxshare Technologies Co., Ltd
    Inventors: QianBing YAN, Min-Sheng KAO, ChunFu WU, Yueh-Kuo LIN, LinChun LI, Chung-Hsin FU
  • Publication number: 20230371732
    Abstract: A container assembly in accordance with one embodiment of the present disclosure includes an outer container having a first open end and a second closed end and defining an inner cavity; and a plunging assembly configured to be received within the outer container, the plunging assembly having a first end and a second end, wherein the plunging assembly includes an inner sleeve having a first end and a second end and a wall defining an inner bore, and wherein the plunging assembly includes an extraction assembly having a body having a first end and a second end and a side wall extending for at least a portion of the distance between the first and second ends of the body, wherein the first end of the body is coupled to the inner sleeve at or near the second end of the inner sleeve, and wherein the body includes a first sieve portion, and wherein the extraction assembly further includes a strainer having a second sieve portion, wherein the strainer is removably couplable to the body.
    Type: Application
    Filed: May 17, 2023
    Publication date: November 23, 2023
    Inventors: Travis Merrigan, Patrick Crosby, Scott Rolfson, Cheng Kuo Lin, Kai Chuan Chuang
  • Publication number: 20230333317
    Abstract: Disclosed is an optical module, including a lower housing, an upper housing covering the lower housing, a circuit board, a first metal base, a second metal base, a silicon photonic chip, and a light emission module including a laser chip and an optical path assembly. The first metal base is disposed on one side of the upper housing. The second metal base is disposed on one side of the lower housing. The circuit board with a hollow region is disposed on the second metal base. The silicon photonic chip is disposed on the second metal base exposed from the hollow region. The laser chip is disposed on the first metal base. The optical path assembly is disposed on the first metal base and/or on the second metal base exposed from the hollow region, and guides a third optical signal emitted by the laser chip to the silicon photonic chip.
    Type: Application
    Filed: December 22, 2022
    Publication date: October 19, 2023
    Applicant: Dongguan Luxshare Technologies Co., Ltd
    Inventors: Chung-Hsin FU, Min-Sheng KAO, ChunFu WU, Yi-Tseng LIN, Chih-Wei YU, Chien-Tzu WU, QianBing YAN, Yueh-Kuo LIN
  • Publication number: 20230279691
    Abstract: A hardtop car-top tent includes first and second casing members, which are respectively formed with first and second accommodation spaces and are pivotally connected to have the first and accommodation spaces corresponding to each other; first support elements, which have two ends respectively mounted to the first and second casing members, such that the first support elements support the first casing member to form a predetermined included angle between the first and second casing members; a second support element, which includes first and second frame members connected between the first and second accommodation spaces of the first and second casing members; and a first covering member, which has two ends respectively connected to the first and second accommodation space, and is positioned against the second support element, so as to make the first covering member forming a front-side surface, a left-side surface, and a right-side surface.
    Type: Application
    Filed: May 31, 2022
    Publication date: September 7, 2023
    Inventor: KUO-LIN TSAO
  • Patent number: D1004521
    Type: Grant
    Filed: May 31, 2022
    Date of Patent: November 14, 2023
    Inventor: Kuo-Lin Tsao