Abstract: The invention uses the control circuit formed on the silicon wafer to detect the leakage current of transistor formed on the depletion mode GaN wafer and then adjust the gate voltage of the depletion mode GaN transistor according to the detected leakage current. Essentially, the gate voltage is reduced or viewed as made more negative when the detected leakage current is larger a specific value. Thus, the gate voltage can be gradually adjusted to approach a specific threshold voltage that right block the leakage current. In other words, by making the gate voltage more negative when non-zero leakage current is detected and even by making the gate voltage more positive when zero leakage current is detected, the depletion mode GaN transistor can be adjusted to have an acceptable or even zero leakage current, a high reaction rate and an optimized efficiency.

Abstract: Semiconductor structures and methods for forming the same are provided. The semiconductor structure includes a plurality of first nanostructures formed over a substrate, and a dielectric wall adjacent to the first nanostructures. The semiconductor structure also includes a first liner layer between the first nanostructures and the dielectric wall, and the first liner layer is in direct contact with the dielectric wall. The semiconductor structure also includes a gate structure surrounding the first nanostructures, and the first liner layer is in direct contact with a portion of the gate structure.

Abstract: A semiconductor device according to the present disclosure includes a source feature and a drain feature, a plurality of semiconductor nanostructures extending between the source feature and the drain feature, a gate structure wrapping around each of the plurality of semiconductor nanostructures, a bottom dielectric layer over the gate structure and the drain feature, a backside power rail disposed over the bottom dielectric layer, and a backside source contact disposed between the source feature and the backside power rail. The backside source contact extends through the bottom dielectric layer.

Abstract: A semiconductor structure includes an interfacial layer disposed over a semiconductor channel region, a metal oxide layer disposed over the interfacial layer, a high-k gate dielectric layer disposed over the metal oxide layer, a metal halide layer disposed over the high-k gate dielectric layer, and a metal gate electrode disposed over the high-k gate dielectric layer. The metal oxide layer and the interfacial layer form a dipole moment. The metal oxide layer includes a first metal. The metal halide layer includes a second metal different from the first metal.

Abstract: A semiconductor device structure, along with methods of forming such, are described. The structure includes a first source/drain epitaxial feature, a second source/drain epitaxial feature disposed adjacent the first source/drain epitaxial feature, a first dielectric layer disposed between the first source/drain epitaxial feature and the second source/drain epitaxial feature, a first dielectric spacer disposed under the first dielectric layer, and a second dielectric layer disposed under the first dielectric layer and in contact with the first dielectric spacer. The second dielectric layer and the first dielectric spacer include different materials.

Abstract: The present disclosure provides a semiconductor structure, including a substrate having a front surface, a first semiconductor layer proximal to the front surface, a second semiconductor layer over the first semiconductor layer, a gate having a portion between the first semiconductor layer and the second semiconductor layer, a spacer between the first semiconductor layer and the second semiconductor layer, contacting the gate, and a source/drain (S/D) region, wherein the S/D region is in direct contact with a bottom surface of the second semiconductor layer, and the spacer has an upper surface interfacing with the second semiconductor layer, the upper surface including a first section proximal to the S/D region, a second section proximal to the gate, and a third section between the first section and the second section.

Abstract: A semiconductor device includes a semiconductor substrate; a plurality of channel regions, including a p-type channel region and an n-type channel region, disposed over the semiconductor substrate; and a gate structure. The gate structure includes a gate dielectric layer disposed over the plurality of channel regions and a work function metal (WFM) structure disposed over the gate dielectric layer. The WFM structure includes an n-type WFM layer over the n-type channel region and not over the p-type channel region and further includes a p-type WFM layer over both the n-type WFM layer and the p-type channel region. The gate structure further includes a fill metal layer disposed over the WFM structure and in direct contact with the p-type WFM layer.

Abstract: In some embodiments, the present disclosure relates to an integrated chip. The integrated chip includes a first channel structure configured to transport charge carriers within a first transistor device and a first gate electrode layer wrapping around the first channel structure. A second channel structure is configured to transport charge carriers within a second transistor device. A second gate electrode layer wraps around the second channel structure. The second gate electrode layer continuously extends from around the second channel structure to cover the first gate electrode layer. A third channel structure is configured to transport charge carriers within a third transistor device. A third gate electrode layer wraps around the third channel structure. The third gate electrode layer continuously extends from around the third channel structure to cover the second gate electrode layer.

Abstract: Semiconductor structures and the manufacturing method thereof are disclosed. An exemplary semiconductor structure according to the present disclosure includes a substrate having a p-type well or an n-type well, a first base portion over the p-type well, a second base portion over the n-type well, a first plurality of channel members over the first base portion, a second plurality of channel members over the second base portion, an isolation feature disposed between the first base portion and the second base portion, and a deep isolation structure in the substrate disposed below the isolation feature.

Abstract: A method for forming a semiconductor device is provided. The method includes forming a plurality of first channel nanostructures and a plurality of second channel nanostructures in an n-type device region and a p-type device region of a substrate, respectively, and sequentially depositing a gate dielectric layer, an n-type work function metal layer, and a cap layer surrounding each of the first and second channel nanostructures. The cap layer merges in first spaces between adjacent first channel nanostructures and merges in second spaces between adjacent second channel nanostructures. The method further includes selectively removing the cap layer and the n-type work function metal layer in the p-type device region, and depositing a p-type work function metal layer over the cap layer in the n-type device region and the gate dielectric layer in the p-type device region. The p-type work function metal layer merges in the second spaces.

Abstract: A display may have an array of pixels. Display driver circuitry may supply data and control signals to the pixels. Each pixel may have seven transistors, a capacitor, and a light-emitting diode such as an organic light-emitting diode. The seven transistors may receive control signals using horizontal control lines. Each pixel may have first and second emission enable transistors that are coupled in series with a drive transistor and the light-emitting diode of that pixel. The first and second emission enable transistors may be coupled to a common control line or may be separately controlled so that on-bias stress can be effectively applied to the drive transistor. The display driver circuitry may have gate driver circuits that provide different gate line signals to different rows of pixels within the display. Different rows may also have different gate driver strengths and different supplemental gate line loading structures.

Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.

Abstract: A single smart health device able to monitor all physiological aspects of a human body includes a body fluid detection module, a temperature detection module, an electrocardiogram detection module, and a control module. The body fluid detection module tests and detects amounts of biological substances in body fluids. The temperature detection module detects a temperature of the human body. The electrocardiogram detection module detects a heart rate of the human body. The control module is electrically connected to the body fluid detection module, the temperature detection module, and the electrocardiogram detection module, and obtains the detected amounts of biological substances, the detected temperature, and the detected heart rate.

Abstract: A method for performing network control in a wireless communications system and associated apparatus are provided. The method may include: carrying a set of link information in a preamble of a first data transmission frame transmitted from the first network device to a second network device, wherein the set of link information may include at least one indication among the following indications: a destination device indication, a device assignment indication and a transmission power control indication; wherein a third network device is arranged to monitor wireless transmission in the wireless communications system to obtain the set of link information from the first data transmission frame, and determine spatial reuse (SR) transmission availability of the third network device based on the set of link information.

Abstract: The invention uses the control circuit formed on the silicon wafer to detect the leakage current of transistor formed on the depletion mode GaN wafer and then adjust the gate voltage of the depletion mode GaN transistor according to the detected leakage current. Essentially, the gate voltage is reduced or viewed as made more negative when the detected leakage current is larger a specific value. Thus, the gate voltage can be gradually adjusted to approach a specific threshold voltage that right block the leakage current. In other words, by making the gate voltage more negative when non-zero leakage current is detected and even by making the gate voltage more positive when zero leakage current is detected, the depletion mode GaN transistor can be adjusted to have an acceptable or even zero leakage current, a high reaction rate and an optimized efficiency.

Abstract: A conductive bump structure of a circuit board includes at least one composite conductive bump formed in at least one bump preservation region on a conductive layer of the circuit board. The composite conductive bump includes a raised portion and a conductive pillar. The raised portion is raised from a top surface of the conductive layer by a height. A bottom of the conductive pillar is in contact with and is combined with a curved top surface of the raised portion, and a top of the conductive pillar is raised upwards to protrude beyond the top planar surface of the conductive layer by a protrusion height.

Abstract: Coordinated-spatial reuse (CO-SR) transmission methods are provided. In a CO-SR transmission method, a transceiver of a sharing access point (AP) may transmit an announcement frame to a shared AP, the transceiver may receive a first block acknowledgement (BA) frame from a first station (STA) associated with the sharing AP, and the transceiver may transmit a dummy clear-to-send (CTS) frame before transmitting the next announcement frame in response to the first STA being a first legacy STA.

Abstract: A system for assessing extubation includes a respiratory assistance device, an artificial intelligence platform, and a hospital information system. The respiratory assistance device is adapted to communicate with a trachea of a patient. The artificial intelligence platform includes a prediction module. A method for assessing extubation includes the following steps. Measured values of respiratory parameters of the patient are recorded by the respiratory assistance device. The recorded times and the measured values of the respiratory parameters corresponding to each of the recording times are transmitted to the artificial intelligence platform. The prediction module analyzes the measured values of respiratory parameters within a predetermined time period according to a prediction model to generate a prediction result. The prediction result is transmitted to the hospital information system and is recorded into a medical record of the patient.

Abstract: A method for performing mesh control in a wireless communications system and associated apparatus are provided. The method may include: carrying a set of link information in a preamble of a first data transmission frame transmitted from the first mesh device to a second mesh device, wherein the set of link information may include at least one indication among the following indications: a source-destination relationship indication between the first mesh device and the second mesh device and at least one predicted signal strength measured for the first mesh device and the second mesh device; wherein a third mesh device is arranged to monitor wireless transmission in the wireless communications system to obtain the set of link information from the first data transmission frame, and determine SR transmission availability of the third mesh device based on the set of link information.