Patents by Inventor Kuo-Sheng Chuang

Kuo-Sheng Chuang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190311930
    Abstract: A semiconductor processing station including a platform, a load port, and a carrier transport track is provided. The platform includes an intake/outtake port and a plurality of processing modules. The load port includes a load chamber, a movable cover, and a carrier transfer module. The load chamber communicates with the intake/outtake port and has a load opening at its top end for receiving a transport carrier within the load chamber. The movable cover is disposed at the load opening and configured to seal the load opening. The carrier transfer module is configured to transfer the transport carrier to the intake/outtake port. The carrier transport track has a bottom side configured to open the load chamber.
    Type: Application
    Filed: June 24, 2019
    Publication date: October 10, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: You-Hua Chou, Chih-Wei Huang, Kuo-Sheng Chuang, Cheng-Chung Chien
  • Patent number: 10399231
    Abstract: A substrate handling device includes a substrate reception area defined by an edge. The substrate reception area includes a planar surface and a plurality of contact structures. At least one contact structure of the plurality of contact structures is located at the edge and at least one contact structure of the plurality of contact structures is located on the planar surface. The substrate reception area and planar surface are made of a first material. Each contact structure of the plurality of contact structures includes a second material different from the first material, the second material having a hardness aligned to a hardness of a substrate material.
    Type: Grant
    Filed: May 22, 2017
    Date of Patent: September 3, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: You-Hua Chou, Kuo-Sheng Chuang
  • Publication number: 20190267458
    Abstract: A transistor includes a channel region, a gate stack, and source and drain structures. The channel region comprises silicon germanium and has a first silicon-to-germanium ratio. The gate stack is over the channel region and comprises a silicon germanium oxide layer over the channel region, a high-? dielectric layer over the silicon germanium oxide layer, and a gate electrode over the high-? dielectric layer. The silicon germanium oxide layer has a second silicon-to-germanium ratio. The second silicon-to-germanium ratio is substantially the same as the first silicon-to-germanium ratio. The channel region is between the source and drain structures.
    Type: Application
    Filed: May 13, 2019
    Publication date: August 29, 2019
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Kuo-Sheng CHUANG, You-Hua CHOU, Ming-Chi HUANG
  • Patent number: 10332769
    Abstract: A semiconductor processing station comprises a platform and a load port, wherein the platform includes an intake/outtake port and a plurality of processing modules. The load port includes a load chamber, a movable cover and a carrier transfer module. The load chamber communicates with the intake/outtake port and has a load opening at its top end for receiving a transport carrier within the load chamber. The movable cover is disposed at the load opening and is configured to seal the load opening. The carrier transfer module is configured to transfer the transport carrier to the intake/outtake port. A semiconductor process and a method of operating a semiconductor processing station are also provided.
    Type: Grant
    Filed: January 15, 2016
    Date of Patent: June 25, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: You-Hua Chou, Chih-Wei Huang, Kuo-Sheng Chuang, Cheng-Chung Chien
  • Patent number: 10297505
    Abstract: A method of manufacturing a semiconductor device includes forming a first insulating film over a first fin structure and a second insulating film over a second fin structure, coating a protective layer over the second insulating film, removing the first insulating film to expose a portion of the first fin structure, and forming a first oxide film over the exposed portion of the first fin structure using a non-aqueous solvent-based chemical.
    Type: Grant
    Filed: January 23, 2018
    Date of Patent: May 21, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Kuo-Sheng Chuang, You-Hua Chou, Yusuke Oniki
  • Patent number: 10290716
    Abstract: A semiconductor device has a semiconductor substrate. A silicon germanium layer is disposed on the semiconductor substrate. The silicon germanium layer has a first silicon-to-germanium ratio. A first gate structure is disposed on the silicon germanium layer, and the first gate structure includes an interfacial layer on the silicon germanium layer. The interface layer has a second silicon-to-germanium ratio substantially the same as the first silicon-to-germanium ratio of the silicon germanium layer. The first gate structure also includes a high-dielectric layer on the interfacial layer and a first gate electrode on the high-? dielectric layer.
    Type: Grant
    Filed: July 30, 2017
    Date of Patent: May 14, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Kuo-Sheng Chuang, You-Hua Chou, Ming-Chi Huang
  • Publication number: 20190107493
    Abstract: A method of evaluating characteristics of a work piece includes forming a photosensitive layer on the work piece. Then an ion implantation is performed on the work piece. The work piece is radiated, and an optical intensity of the photosensitive material on the work piece is calculated. The ion implantation pattern is evaluated according to the optical intensity. A chemical structure of the photosensitive material is changed upon the ion implantation. The work piece is recovered by reversing the chemical structure of the photosensitive material or removing the ion interrupted photosensitive material by chemicals.
    Type: Application
    Filed: November 30, 2018
    Publication date: April 11, 2019
    Inventors: Kuo-Sheng CHUANG, You-Hua Chou
  • Patent number: 10175176
    Abstract: A method of evaluating characteristics of a work piece includes forming a photosensitive layer on the work piece. Then an ion implantation is performed on the work piece. The work piece is radiated, and an optical intensity of the photosensitive material on the work piece is calculated. The ion implantation pattern is evaluated according to the optical intensity. A chemical structure of the photosensitive material is changed upon the ion implantation. The work piece is recovered by reversing the chemical structure of the photosensitive material or removing the ion interrupted photosensitive material by chemicals.
    Type: Grant
    Filed: May 18, 2016
    Date of Patent: January 8, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
    Inventors: Kuo-Sheng Chuang, You-Hua Chou
  • Publication number: 20190006476
    Abstract: A semiconductor device has a semiconductor substrate. A silicon germanium layer is disposed on the semiconductor substrate. The silicon germanium layer has a first silicon-to-germanium ratio. A first gate structure is disposed on the silicon germanium layer, and the first gate structure includes an interfacial layer on the silicon germanium layer. The interface layer has a second silicon-to-germanium ratio substantially the same as the first silicon-to-germanium ratio of the silicon germanium layer. The first gate structure also includes a high-dielectric layer on the interfacial layer and a first gate electrode on the high-? dielectric layer.
    Type: Application
    Filed: July 30, 2017
    Publication date: January 3, 2019
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Kuo-Sheng CHUANG, You-Hua CHOU, Ming-Chi HUANG
  • Publication number: 20180337078
    Abstract: A substrate handling device includes a substrate reception area defined by an edge. The substrate reception area includes a planar surface and a plurality of contact structures. At least one contact structure of the plurality of contact structures is located at the edge and at least one contact structure of the plurality of contact structures is located on the planar surface. The substrate reception area and planar surface are made of a first material. Each contact structure of the plurality of contact structures includes a second material different from the first material, the second material having a hardness aligned to a hardness of a substrate material.
    Type: Application
    Filed: May 22, 2017
    Publication date: November 22, 2018
    Inventors: You-Hua CHOU, Kuo-Sheng CHUANG
  • Publication number: 20180321581
    Abstract: A method of manufacturing a photomask includes depositing a first absorbing layer over a substrate, patterning the first absorbing layer using a photoresist, and depositing a conformal second absorbing layer along surfaces of the first absorbing layer.
    Type: Application
    Filed: May 4, 2017
    Publication date: November 8, 2018
    Inventors: You-Hua CHOU, Kuo-Sheng CHUANG
  • Publication number: 20180315661
    Abstract: A method of manufacturing a semiconductor device includes forming a first insulating film over a first fin structure and a second insulating film over a second fin structure, coating a protective layer over the second insulating film, removing the first insulating film to expose a portion of the first fin structure, and forming a first oxide film over the exposed portion of the first fin structure using a non-aqueous solvent-based chemical.
    Type: Application
    Filed: January 23, 2018
    Publication date: November 1, 2018
    Inventors: Kuo-Sheng CHUANG, You-Hua CHOU, Yusuke ONIKI
  • Publication number: 20180308702
    Abstract: A semiconductor device includes a non-insulator structure, at least one carbon nano-tube (CNT), a dielectric layer, and a graphene-based conductive layer. The CNT is over the non-insulator structure. The dielectric layer surrounds the CNT. The graphene-based conductive layer is over the at least one CNT. The CNTs and the graphene-based conductive layer have low resistance.
    Type: Application
    Filed: August 31, 2017
    Publication date: October 25, 2018
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: You-Hua CHOU, Kuo-Sheng CHUANG
  • Publication number: 20180301375
    Abstract: A method of forming a conductive powder includes reducing, by a reduction reaction, a conductive powder precursor gas using a plasma. Reducing the conductive powder precursor gas forms the conductive powder. The method further includes filtering the conductive powder based on particle size. The method further includes dispersing a portion of the conductive powder having a particle size below a threshold value in a fluid.
    Type: Application
    Filed: April 18, 2017
    Publication date: October 18, 2018
    Inventors: You-Hua CHOU, Kuo-Sheng CHUANG
  • Publication number: 20180284628
    Abstract: An apparatus for a lithography device is provided, which includes a laser-based particle eliminating component and a particle collector. The laser-based particle eliminating component includes a laser emitter and a laser absorbing member. The laser emitter is configured to emit laser beams for irradiating particles in a space near a photomask of the lithography device. The laser absorbing member is disposed opposite to the laser emitter for absorbing the laser beams. The particle collector is configured for collecting the irradiated particles.
    Type: Application
    Filed: March 28, 2017
    Publication date: October 4, 2018
    Inventors: You-Hua Chou, Kuo-Sheng Chuang
  • Publication number: 20180284602
    Abstract: A method for forming a photomask includes the following steps. A substrate is provided, which has a pattern region and a peripheral region surrounding the pattern region. A first etching operation is performed on a first surface of the substrate to remove first portions of the substrate in the pattern region, so as to form recesses in the pattern region of the substrate. A blasting operation is performed on the first surface of the substrate. A BARC layer is formed filling the recesses and over the first surface of the substrate. A second etching operation is performed on a second surface of the substrate opposite to the first surface until portions of the BARC layer in the recesses are exposed. The BARC layer is removed after the second etching operation, so as to form openings in the substrate in the pattern region.
    Type: Application
    Filed: March 28, 2017
    Publication date: October 4, 2018
    Inventors: You-Hua Chou, Kuo-Sheng Chuang
  • Patent number: 10088761
    Abstract: An apparatus for a lithography device is provided, which includes a laser-based particle eliminating component and a particle collector. The laser-based particle eliminating component includes a laser emitter and a laser absorbing member. The laser emitter is configured to emit laser beams for irradiating particles in a space near a photomask of the lithography device. The laser absorbing member is disposed opposite to the laser emitter for absorbing the laser beams. The particle collector is configured for collecting the irradiated particles.
    Type: Grant
    Filed: March 28, 2017
    Date of Patent: October 2, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: You-Hua Chou, Kuo-Sheng Chuang
  • Patent number: 9892954
    Abstract: A wafer processing system includes at least one metrology chamber, a process chamber, and a controller. The at least one metrology chamber is configured to measure a thickness of a first layer on a back side of a wafer. The process chamber is configured to perform a treatment on a front side of the wafer. The front side is opposite the back side. The process chamber includes therein a multi-zone chuck. The multi-zone chuck is configured to support the back side of the wafer. The multi-zone chuck has a plurality of zones with controllable clamping forces for securing the wafer to the multi-zone chuck. The controller is coupled to the metrology chamber and the multi-zone chuck. The controller is configured to control the clamping forces in the corresponding zones in accordance with measured values of the thickness of the first layer in the corresponding zones.
    Type: Grant
    Filed: March 20, 2014
    Date of Patent: February 13, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Nai-Han Cheng, Chi-Ming Yang, You-Hua Chou, Kuo-Sheng Chuang, Chin-Hsiang Lin
  • Patent number: 9776216
    Abstract: A dispensing method is disclosed that includes the following steps: a cleaning sleeve is provided to surround a spray member. A first fluid is previously dispensed from a first fluid outlet of the spray member. A second fluid is sprayed from a second fluid outlet of the cleaning sleeve to clean the spray member. The cleaning sleeve is opened or slid away from the spray member, such that the first fluid outlet of the spray member is exposed to a substrate. The first fluid is dispensed from the first fluid outlet of the spray member to the substrate.
    Type: Grant
    Filed: November 27, 2013
    Date of Patent: October 3, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Weibo Yu, Kuo-Sheng Chuang, Wen-Yu Ku, Chin-Hsiang Lin
  • Publication number: 20170207078
    Abstract: An atomic layer deposition apparatus comprises a processing chamber, at least one partition and an injector. The at least one partition is disposed in the processing chamber for dividing the processing chamber into a plurality of sections. The injector includes a plurality of nozzles disposed in the processing chamber and configured to respectively provide a reacting gaseous flow to each of the plurality of sections. A semiconductor process is also provided.
    Type: Application
    Filed: January 15, 2016
    Publication date: July 20, 2017
    Inventors: You-Hua Chou, Kuo-Sheng Chuang